Update power calculation to avoid low framerate or
frame drop issues
Change-Id: Ice306a44d4ea8242d965c0e5d03edffc0f5e0f8b
Signed-off-by: Ashish Patil <quic_ashpat@quicinc.com>
Add support to enable ring buffer for enc intermediate
bin buffer to improve encoding performance.
Change-Id: Ifbf50cb48278c62c09a20bc7626a3b6288813830
Signed-off-by: Akshata Sahukar <quic_asahukar@quicinc.com>
Align hfi property and memory file to pick interface changes
for encoder ring buffer support
Change-Id: Icde4cdffe5275d416c51c36e562bb832027b0fa1
Signed-off-by: Akshata Sahukar <quic_asahukar@quicinc.com>
Align hfi property and registers file with to pick synx fence
related interface changes
Change-Id: I19e5cce4d67f2f1eeacf917f9e688d2bb20f6585
Signed-off-by: Akshata Sahukar <quic_asahukar@quicinc.com>
New bandwidth and frequency calculation functions
for lanai.
Change-Id: I0ec4a74bc24598628fe94a6ebbe9df5e3cb71a9c
Signed-off-by: Ashish Patil <quic_ashpat@quicinc.com>
In assert xo reset failure case, count increment and
usleep are skipped resulting in indefinite while loop.
Correct the conditions to avoid looping indefinitely.
Change-Id: I38fae272f0c7c676e1454e1fb0a8bfee860ea2f0
Signed-off-by: Maheshwar Ajja <quic_majja@quicinc.com>
remove all conditional compilation in video driver.
With this change, all files willbe always compiled
and will be available in final kernel object file.
Change-Id: I9843c246e23bd1ee4fb8918e5cfa840e2defd432
Signed-off-by: Govindaraj Rajagopal <quic_grajagop@quicinc.com>
In case of watchdog interrupt, power off sequence will
get called which will make intr_status to 0 due to which
enable_irq gets called from isr_handler irrespective of
watchdog interrupt. Now during power up sequence again
when the enable_irq gets called, it will through
"Unbalanced enable for irq" error.
Added a fix for the same.
Call trace ->
enable_irq+0x9c/0xf8
__power_on_ar50lt+0x2d4/0x320 [msm_video]
__load_fw+0x92c/0x1368 [msm_video]
venus_hfi_core_init+0x64/0x468 [msm_video]
msm_vidc_core_init+0x158/0x4bc [msm_video]
msm_vidc_open+0x90/0x804 [msm_video]
Change-Id: Ic675d7540ef029e530a8cd5b87fb97f72e72057f
Signed-off-by: Vedang Nagar <quic_vnagar@quicinc.com>
update buffer size only for film grain content.
Change-Id: Ia9230d36ef0c917723fdb1eea82adfb8df3b3413
Signed-off-by: Manikanta Kanamarlapudi <quic_kmanikan@quicinc.com>
- add support to intialise device region by reading data from
platform to resources.
- add support for iommu_map and iommu_unmap apis.
- allocate a 4K page and send this address through
HFI_MMAP_ADDR register.
- map AON region, send virtual address and size as payload.
Change-Id: I5aa26593309a220c5de62836e432c1bd5a63ba1d
Signed-off-by: Darshana Patil <quic_darshana@quicinc.com>
Added changes to support generic power domain and opp table.
This is an alternative for downstream regulator framework.
power domain can be enabled using below dtsi entries.
power-domains =
<&videocc MVS0C_GDSC>,
<&videocc MVS0_GDSC>,
<&rpmhpd SM8450_MXC>,
<&rpmhpd SM8450_MMCX>
power-domain-names =
"iris-ctl", "vcodec", "mx", "mmcx";
Power domain handles willbe parsed at driver side using below api's.
- dev_pm_domain_attach_by_name()
- devm_pm_opp_attach_genpd()
devm_pm_opp_attach_genpd() provides consumer virtual device handles
and i.e linked to core->dev using device_link_add().
MXC, MMCX rails wilbe powered up by scaling desired rate using
dev_pm_opp_set_rate().
Change-Id: I3d73434cb772078f031aec7cadc2d42ab930edd0
Signed-off-by: Govindaraj Rajagopal <quic_grajagop@quicinc.com>
update copyright markings to 2023 in all files.
Change-Id: I6842d56c4a8fff6a7a93d0c1d4bc049041297b02
Signed-off-by: Darshana Patil <quic_darshana@quicinc.com>
Use devm_reset_control_get_exclusive_released() instead of
devm_reset_control_get() to get the reset control of video_xo_reset
clock as it is shared reset clock between eva and video drivers.
Use reset_control_acquire() before assert and reset_control_release()
after de-assert video_xo_reset clock to avoid eva driver operating on
it in parallel.
Change-Id: I4936ed7a4556bb56d4b28546084fc877080308ef
Signed-off-by: Deepa Guthyappa Madivalara <quic_dmadival@quicinc.com>
Signed-off-by: Darshana Patil <quic_darshana@quicinc.com>
Set mvs0c clock flags (force mem and pheripheral on).
Change-Id: I52380a30a4c74d9658f989377b5c77209cd8a33e
Signed-off-by: Maheshwar Ajja <quic_majja@quicinc.com>
introduced core error state and added changes
to refine core state machine.
Change-Id: Ib3b94fd3798e902b7a6cfc5de45820558c89806e
Signed-off-by: Govindaraj Rajagopal <quic_grajagop@quicinc.com>
Poll for AON spare register BIT(0) to become zero before
asserting XO reset from video driver to ensure CVP/EVA driver
is not asserting XO reset around the same time. Asserting
XO reset by both driver at the same time may result in
unpredictable behavior.
Change-Id: I71a0bd0175ef7701c9a855abbf3c2e741d937dfb
Signed-off-by: Maheshwar Ajja <quic_majja@quicinc.com>
Remove addtional mvs0c clock reset which is not
required from power off sequence
Change-Id: I2077cb0ceee6451cd2d2af067ac8a7be3335dd16
Signed-off-by: Deepa Guthyappa Madivalara <quic_dmadival@quicinc.com>
Introduce core->sub_state similar to inst->sub_state.
[1] pm_suspended - moved to this substate in case of PM suspend
[2] handoff - moved to this state after successful
handoff_regulator call.
[3] fw_power_control - moved to this state in case of IFPC.
[4] power_enable - will track core power_on/power_off status.
[5] page_fault - used to rate_limit fault logs.
[6] cpu_wd - indicates hw fired wd interrupt.
[7] video_unresponsive - moved to this state if sync cmd fails.
Change-Id: Iceb65cf404fd93aff7846860b0276307e4eab570
Signed-off-by: Govindaraj Rajagopal <quic_grajagop@quicinc.com>
Move adjust/set control functions to common/platform.c as part of
upstream effort.
This is part 1 of the change.
Change-Id: I8c440740fe785b5b052c4d44963ea34c21419fa4
Signed-off-by: Ankush Mitra <quic_ankumitr@quicinc.com>
Add assert and deassert axi and mvs0c resets to
avoid video hardware unresponsive issues due to
multiple power collapse sequence execution.
Change-Id: I25ec99eab6b50111161ec9486ea1155bee63f7fc
Signed-off-by: Maheshwar Ajja <quic_majja@quicinc.com>
- Add assert and deassert reset control functions to
update power off sequence in pineapple chipset
- Rename clock names to match with clock macros
Change-Id: Ic6dc0daac8110597bfcb02cceba94d2b97548723
Signed-off-by: Maheshwar Ajja <quic_majja@quicinc.com>
1. Allow turbo for HEVC 10bit all intra decoding;
2. Add 25 percent extra to VSP cycle for HEVC
10bit all intra decoding;
Change-Id: I794b2a896f7e9444c8979abdb15b8e673a5270ee
Signed-off-by: Zhongbo Shi <quic_zhongbos@quicinc.com>
Signed-off-by: Ankush Mitra <quic_ankumitr@quicinc.com>
if PC fails for 10 times then video driver is treating that situation
as fatal and doing force core_deinit(), in this case firmware will not
follow vcodec power_collapse sequence and if there any pending
transaction from any session it will cause smmu_fault during next
firmware_boot sequence. Added change to perform vcodec power_collapse
from power_off_iris3_hardware() incase of core_deinit due to PC failure.
Change-Id: I45e32985d87b5cc882c4f96f77d1cabc796e6ba0
Signed-off-by: Govindaraj Rajagopal <quic_grajagop@quicinc.com>
Signed-off-by: Ankush Mitra <quic_ankumitr@quicinc.com>
Added call_res_op() macro and used at all possible
places to avoid invalid pointer dereference issue.
Also added changes to cleanup unused functions.
Change-Id: Id77711ad9eaf7b407208567b0fde1f2693588641
Signed-off-by: Govindaraj Rajagopal <quic_grajagop@quicinc.com>
1. Update core power down sequence.
2. Update hw power up sequence.
Change-Id: I428869ac92154b23cdbe3f51c7b299fe8a6cc71b
Signed-off-by: Chinmay Sawarkar <quic_chinmays@quicinc.com>
