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1726 次代码提交

作者 SHA1 备注 提交日期
Veera Sundaram Sankaran
09b2c937c2 disp: msm: sde: cache cwb enc mask to use during seamless transitions
The cwb_enc_mask is set by the wb phys encoder during the validate
phase and this is in-turn used during the commit phase. During
seamless transition cases like poms with cwb, the encoders are
disabled and then enabled back after the validate phase. The cwb
flags are reset during this time leading to issues. Cache the flag
and reapply it during the modeset to avoid this case.

Change-Id: I5df1be18a5e30bb1107dc0f2e87d771a735f1ab6
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
2022-10-14 02:57:55 -07:00
qctecmdr
e567bba0d5 Merge "disp: msm: sde: detach dsc/vdc encoder blocks properly during modeswitch" 2022-10-04 14:30:33 -07:00
Gopikrishnaiah Anandan
5edd5553a9 drm: msm: disable LTM hardware during encoder disable
LTM block should be disabled when encoder is being disabled to avoid
display hang when all driver clients have been closed.
Change disables LTM hardware block when encoder is disabled.

Change-Id: I279296b566ab93c302e6166b6fa4b7197c2cc0ab
Signed-off-by: Gopikrishnaiah Anandan <quic_agopik@quicinc.com>
2022-10-04 01:49:57 -07:00
Yashwanth
a14aea9aac disp: msm: sde: detach dsc/vdc encoder blocks properly during modeswitch
In the current code if there is a switch from DSC to non-DSC
mode, all the DSC blocks attached to the sde_encoder are not
cleaned up properly. Due to this, during virt disable these
DSC blocks are disabled and flushed resulting in underruns
on other ctl paths which might be using them. This change
properly cleans up all the dsc/vdc attached to the sde
encoder to avoid such issues.

Change-Id: Ie644701cbda6b4d056bc7ef30300be96096c5214
Signed-off-by: Yashwanth <quic_yvulapu@quicinc.com>
Signed-off-by: Narendra Muppalla <quic_nmuppall@quicinc.com>
2022-09-30 01:39:15 -07:00
Linux Build Service Account
9fbbeb65ba Merge "disp: msm: sde: move some frame_events from crtc commit to event thread" into display-kernel.lnx.1.0 2022-09-23 12:20:26 -07:00
Veera Sundaram Sankaran
58bff0115e disp: msm: sde: move some frame_events from crtc commit to event thread
Move frame data stats collection/notification during frame-done and
retire fence sysfs notification to event thread. This will free up
some interrupt time.

Change-Id: I2648ac4287ce8712e9a059edd408a59753aa6d32
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
2022-09-23 11:48:34 -07:00
Veera Sundaram Sankaran
2139b617bf disp: msm: sde: fix crtc count based on layer mixer
Fix the max crtc count based on the number of real layer mixers
available. Usermode can use the crtc count to derive the number
of layer mixers. This will be used in usermode to check if a new
DP/IWE/WB session can be supported by the HW, based on the existing
displays at that point. This will avoid atomic_check validation
failures in driver.

Change-Id: I63b033604ac549fc01bccef2a9320e0befab5926
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
2022-09-23 11:48:21 -07:00
Linux Build Service Account
5d2c1a0801 Merge "disp: msm: sde: expose cdm block count through connector" into display-kernel.lnx.1.0 2022-09-23 11:36:44 -07:00
Linux Build Service Account
c5ffc48adf Merge "disp: msm: sde: avoid connector remove in dual display recovery" into display-kernel.lnx.1.0 2022-09-23 11:36:42 -07:00
Linux Build Service Account
25d6c5aab9 Merge "drm/msm/dpu: merge dpu_hw_intr_get_interrupt_statuses into dpu_hw_intr_dispatch_irqs" into display-kernel.lnx.1.0 2022-09-23 11:35:41 -07:00
Raviteja Tamatam
45a1db8361 disp: msm: sde: avoid connector remove in dual display recovery
Add changes to get drm object reference for connector and
remove out fb in dual display recovery case.

Change-Id: I1fd0c4818575b3f532d51ad41285031e8320c5fe
Signed-off-by: Raviteja Tamatam <quic_travitej@quicinc.com>
2022-09-21 11:17:52 -07:00
Gopikrishnaiah Anandan
4ee3a1a5e2 drm: msm: re-enable driver disabled color features
When encoder is disabled, demura is disabled since pipes
are disabled internally.
Change marks the features which were active and disabled
by driver as dirty so that it can be applied in the next commit.

Change-Id: I805d17d673a8ff41f9bdb18ba7f2fd185b5ccb5a
Signed-off-by: Gopikrishnaiah Anandan <quic_agopik@quicinc.com>
2022-09-21 11:02:43 -07:00
Veera Sundaram Sankaran
8602fee9f8 disp: msm: sde: expose cdm block count through connector
Expose the number of cdm blocks available through the connector
capabilities. Add CDM to the topology_control table, so usermode
can use the property to reserve the CDM block during modeset.
Additionally, fix a error code return during CDM block reservation
failure in sde resource manager.

Change-Id: Ib42ca4e8614076a8e5df77d8abc77a9e73674390
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
2022-09-21 11:01:17 -07:00
Dmitry Baryshkov
5ddbc95058 drm/msm/dpu: merge dpu_hw_intr_get_interrupt_statuses into dpu_hw_intr_dispatch_irqs
There is little sense in reading interrupt statuses and right after that
going after the array of statuses to dispatch them. Merge both loops
into single function doing read and dispatch.

Change-Id: I1259476549bcaf9f9f4e12591a7e182796e150dd
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Git-commit: 0abdba47dc1df708c365421d481734d3f7fecb01
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
2022-09-21 10:48:43 -07:00
Renchao Liu
3ccfb39483 disp: msm: sde: fix null pointer dereference issue
This changes fixes null pointer dereference issue.

Change-Id: I9a9628f1fb274aea86a15792ac85b8505f25d28f
Signed-off-by: Renchao Liu <quic_rencliu@quicinc.com>
2022-09-01 09:08:04 +08:00
Veera Sundaram Sankaran
d44f0ff715 disp: msm: sde: use new connector state for topology checks
Use with the new connector state during validation phase for
checking the 3d-merge topology, since this is the state that
needs to be validated.

Change-Id: Ie212f948affa4dc439ef508363bac6713e560006
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
2022-08-22 14:29:16 -07:00
Veera Sundaram Sankaran
51775dd093 disp: msm: uapi: increase SDE_FRAME_DATA_MAX_PLANES size
MDSS 9.0.0 supports 10 pipes, so modify the max_planes
accordingly. This is used for the frame_data transfer
between user/kernel and since its a new feature added
there is no backward compatibility that needs to be handled
for this uapi change. Add corresponding bound check during
the usage.

Change-Id: I0853fcc55395855d798f2c1b03cf9bf7b4bd3c96
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
2022-08-19 13:10:39 -07:00
qctecmdr
859b582d2f Merge "disp: msm: sde: skip msm_lastclose if display is stuck in splash" 2022-08-18 15:04:08 -07:00
qctecmdr
1c8167f09f Merge "disp: msm: sde: add crtc width restriction when 3d-merge is enabled" 2022-08-17 18:44:04 -07:00
Jayaprakash Madisetty
f9578b89c9 disp: msm: sde: skip msm_lastclose if display is stuck in splash
This change skips msm_lastclose, when splash enabled builtin-displays
equals number of actual displays and are stuck in continuous splash.
It fixes the issue seen with change commit 548b17185e95
("disp: msm: send power_on event in dual display composer kill scenario").

Change-Id: I1f5417d8945db621dc20ab0a9cc0146eabae5e22
Signed-off-by: Jayaprakash Madisetty <quic_jmadiset@quicinc.com>
2022-08-17 14:25:40 -07:00
Jayaprakash Madisetty
182aac6040 disp: msm: cancel all delayed_works before triggering msm_lastclose
This patch cancels all the delayed_off_works if scheduled and flushes
the display threads for completion during msm_lastclose. The commit
from msm_lastclose client modeset to disable any crtcs if enabled is
always scheduled on primary crtc_commit thread. In the current issue,
delayed_off_work is scheduled on secondary display crtc_commit thread
and primary crtc_commit thread is scheduled to turn off active crtcs
from msm_lastclose leading to null dereference access of sde_enc's
cur_master. This race is avoided by serializing the operations in
msm_lastclose.

Change-Id: I30cc95b925c8134f0064816ebe2cfdb86a49fb36
Signed-off-by: Jayaprakash Madisetty <quic_jmadiset@quicinc.com>
2022-08-17 14:06:45 -07:00
qctecmdr
d273ee1f5e Merge "disp: msm: sde: disable spr and demura for secondary panel in trusted vm" 2022-08-17 12:04:50 -07:00
Veera Sundaram Sankaran
3550ca8f9f disp: msm: sde: add crtc width restriction when 3d-merge is enabled
Add validation during crtc_atomic_check to have crtc width as
multiple of 4 when dualpipe 3d-mux is enabled and multiple of 8
when quadpipe 3d-mux is enabled. This ensures each layer mixer
is having an even width.

Change-Id: I5dc173c1b0349430a8e12a7b1c9440c7854e7ecd
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
2022-08-16 18:44:17 -07:00
qctecmdr
50420e8d17 Merge "disp: msm: sde: convert ubwc stats roi into blob property" 2022-08-14 00:30:30 -07:00
qctecmdr
df6829fdf3 Merge "disp: msm: sde: add check to avoid NULL WB output fb" 2022-08-12 16:02:34 -07:00
Nilaan Gunabalachandran
eab3fd66db disp: msm: sde: convert ubwc stats roi into blob property
This change converts the ubwc stats roi into a blob property. This
allows for the roi data structure to be passed into kernel.

Change-Id: I4b30dcc16bcbd152428861444ff321add860942f
Signed-off-by: Nilaan Gunabalachandran <quic_ngunabal@quicinc.com>
2022-08-11 11:45:14 -07:00
Veera Sundaram Sankaran
5196a85f67 disp: msm: sde: update hw configs on dnsc_blur disable
Currently, dnsc_blur hardware block is not updated when the connector
dnsc_blur property is set to NULL or when dnsc_blur_count is 0. Update
the dnsc_blur hw block configs to avoid stale configs affecting the
current frame.

Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
Change-Id: If64dc5548b03edba401fb7f40edf3419dbe57ca3
2022-08-10 12:30:45 -07:00
Veera Sundaram Sankaran
d65c12ca5a disp: msm: sde: add check to avoid NULL WB output fb
Change the debug message to error during the writeback
encoder validate for wb output buffer. The output buffer
can be NULL only during disable frame and all other frames
need to have a valid output buffer.

Change-Id: I4d6fecfeaf863e56fe25e17ab1200849003b3309
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
2022-08-10 11:38:31 -07:00
qctecmdr
5a5adbba9f Merge "disp: msm: dp: address race condition in LM allocation" 2022-08-09 20:49:21 -07:00
Alisha Thapaliya
046b2d1e35 disp: msm: sde: disable spr and demura for secondary panel in trusted vm
When spr and demura init config function pointers are not null,
then only enable those features. For secondary panel in dual display
for trusted ui, these features will be disabled.

Change-Id: Idcbc672d9da62664bdbaa9489dbfac9f6ab80ec1
Signed-off-by: Alisha Thapaliya <quic_athapali@quicinc.com>
2022-08-09 13:08:01 -07:00
qctecmdr
e540ee198b Merge "disp: msm: sde: enable encoder resources before phys enc disable" 2022-08-08 20:01:57 -07:00
qctecmdr
88df673d58 Merge "disp: msm: sde: reduce stack size in _sde_crtc_check_rois" 2022-08-08 20:01:57 -07:00
Amine Najahi
18d42a6eb3 disp: msm: sde: use mode from new state during CP check phase
Currently previous mode information is passed to CP check phase
instead of the new incoming mode, which cause RC to silently
pass the check phase when there is a resolution mismatch between
the RC mask and new mode.

This change also adds various event log to better track RC codeflow.

Change-Id: I8953fd76e2cb0eb12e2df23038a7866edd3dcb1e
Signed-off-by: Amine Najahi <quic_anajahi@quicinc.com>
2022-08-08 13:31:12 -04:00
Veera Sundaram Sankaran
965ac39c84 disp: msm: sde: enable encoder resources before phys enc disable
Enable the clks/irqs & update RSC state during encoder disable.
This ensures RSC is in correct state during the non-primary disable
commit as it might have entered idle power collapse before the
disable.

Change-Id: Idf82efb3a7bc895e1a97c6cdeeb62970184c8e5d
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
2022-08-08 10:15:11 -07:00
Renchao Liu
fcaf279afd disp: msm: sde: Add scaler offset for de lpf
Scaler offset is missed while writing de lpf register,
which may cause DE works mainly on the left part of panel.
this change adds the offset to fix this issue.

Change-Id: I7cdc3afd3523cb9e15a7ae79adae07e2b52b8c2e
Signed-off-by: Renchao Liu <quic_rencliu@quicinc.com>
2022-08-04 10:10:50 +08:00
Veera Sundaram Sankaran
ac427feb9e disp: msm: sde: reduce stack size in _sde_crtc_check_rois
Use pointer and allocate dynamic memory for msm_mode_info
in _sde_crtc_check_rois instead of object to reduce the
stack memory size.

Change-Id: Ida8fc7e2b94e19b3c791dcda55a465a4107ef976
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
Signed-off-by: Jeykumar Sankaran <quic_jeykumar@quicinc.com>
2022-08-03 14:27:06 -07:00
qctecmdr
0034e30af1 Merge "disp: msm: sde: reset wb output crop during cwb disable" 2022-08-02 15:53:49 -07:00
Veera Sundaram Sankaran
e972b51d5c disp: msm: sde: reset wb output crop during cwb disable
Reset the wb crop configs from hardware, while disabling
concurrent writeback. This avoids stale configs which
affects the subsequent writeback session.

Change-Id: I4927effd0650bcdca2852a5d72c3e5478683a90f
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
2022-08-01 15:17:05 -07:00
qctecmdr
fd732177c1 Merge "disp: msm: sde: disable hw-fencing for commit before vm transition" 2022-07-28 21:43:58 -07:00
Christina Oliveira
b4a071ae7f disp: msm: sde: disable hw-fencing for commit before vm transition
This change disables hw-fencing for the last commit before
vm transition. This avoids configuration issues if hw-fencing is
disabled in the incoming VM.

Change-Id: I573b7d1665f8cef442168bd0ab83a4b2b6cebbb6
Signed-off-by: Christina Oliveira <quic_coliveir@quicinc.com>
2022-07-28 13:18:23 -07:00
qctecmdr
b7c83aa3f8 Merge "disp: msm: sde: fix cwb output res with DS & demura tap point" 2022-07-26 16:45:31 -07:00
Veera Sundaram Sankaran
5df608899c disp: msm: sde: fix cwb output res with DS & demura tap point
Add the missing concurrent writeback output resolution setting,
when destination scaler is enabled with demura tap point.
Additionally, move the dnsc_blur enabled check to the top as
that takes precedence.

Change-Id: Id0e851703ce6e1d8b7caffcdda69d7757222fc59
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
2022-07-25 11:39:04 -07:00
Amine Najahi
dd6baeb265 disp: msm: sde: fix UBWC stat error log format
Fix UBWC stat error log format to match number of arguments.

Change-Id: I08f1b7a13e370dc7cf3a5a9fc11c089f69e742b5
Signed-off-by: Amine Najahi <quic_anajahi@quicinc.com>
2022-07-25 08:05:57 -07:00
qctecmdr
ceaaff1fbd Merge "disp: msm: sde: avoid PM suspend/resume if display has splash enabled" 2022-07-24 05:56:34 -07:00
qctecmdr
2366eef20d Merge "disp: msm: sde: correct the sde vm release sequence" 2022-07-24 01:04:34 -07:00
qctecmdr
57cd9e59bc Merge "disp: msm: sde: avoid null pointer dereference" 2022-07-23 20:11:28 -07:00
qctecmdr
4f29acc9bc Merge "disp: msm: sde: set connector lm_mask for dp display" 2022-07-23 11:09:57 -07:00
qctecmdr
4e94573c28 Merge "disp: msm: sde: fix cwb lm allocation failures in RM" 2022-07-23 06:39:23 -07:00
Jayaprakash Madisetty
60053c51bc disp: msm: sde: avoid PM suspend/resume if display has splash enabled
With speculative retire fence, the first commit from HAL depends
on crtc power_on event instead of retire fence signal to unblock
the wait completion. Hence avoid triggering PM suspend/resume if
any of the displays have continuous splash enabled. This will avoid
any state changes in drm_atomic_state and will be inline with
HAL expectation.

Change-Id: I97360e3815651eefdd7e2c1494fa6e882df883b5
Signed-off-by: Jayaprakash Madisetty <quic_jmadiset@quicinc.com>
2022-07-22 15:01:13 -07:00
Grace An
69c0f721c5 disp: msm: sde: add ctx_id to debug message in sde_fence_signal
Print the fence's ctx_id in debug message for timeline reset attempt.

Change-Id: I920105e8e6a088b82fcfeec1be6ba60bac24b02f
Signed-off-by: Grace An <quic_gracan@quicinc.com>
2022-07-22 07:15:45 -07:00