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作者 SHA1 備註 日期
Manikanta Pubbisetty
8d58a4e757 qcacmn: Add TX enqueue logic for WCN6450
Implement TX enqueue logic for WCN6450. There are no host facing
UMAC HW blocks in WCN6450. Driver enqueues all TX packets to
copy engine (CE) over the copy engine channel that is mapped to
HTT_DATA2_MSG_SVC service.

Changes are specific to WCN6450 and hence implement the logic
in the arch specific code.

Change-Id: Ia366a74b94a4e84c1d4c037c7a99093bb6739178
CRs-Fixed: 3381755
2023-03-16 11:19:41 -07:00
Manikanta Pubbisetty
cd50866740 qcacmn: Handle flow map/unmap HTT messages for WCN6450
In the case of WCN6450, sizes of the TX descriptor pools are not known
to the driver during load time. The sizes are shared by the firmware
post VDEV creation via HTT_T2H_MSG_TYPE_FLOW_POOL_MAP HTT message.
After the VDEV gets deleted in the firmware, a corresponding flow unmap
HTT message will be sent to the driver to clean up the TX descriptors
of a particular VDEV.

Add logic to handle the flow map/unmap HTT messages for WCN6450. These
messages are specific to WCN6450 and hence the logic is implemented in
arch specific HTT code.

Change-Id: I8edcabbec77abae2c238f487acb7a48b478fd149
CRs-Fixed: 3381751
2023-03-16 11:19:31 -07:00
Manikanta Pubbisetty
6758a546bc qcacmn: Add TX descriptor changes for WCN6450
WCN6450 is a chip based on Rhine architecture. Unlike LI/BE targets,
chipsets based on Rhine (RH) do not have host facing UMAC HW blocks.
Their corresponding SRNG interfaces are also removed. The functionality
of these UMAC HW blocks is replaced with a software implementation in
the firmware. Communication between the driver and firmware will happen
over copy engine (CE).

Although there are no host facing UMAC HW blocks, the CE hardware used
in WCN6450 expects the host driver to use the TX descriptor (HW) format
of LI targets during TX packet enqueue. Therefore it is required to
create a new pool of TX descriptors (HW) pool for WCN6450 that is used
during TX.

The logic to create/free/init/deinit these descriptors is specific
to WCN6450/Rhine, therefore it is implemented in architecture specific
Rhine code.

Introduce new APIs in struct dp_arch_ops {} to allocate and free
arch specific TX descriptors. These ops will be no-op for LI/BE
architectures.

Also for Rhine targets, allocate/free other TX descriptors like TX EXT &
TSO descriptors as part of the arch APIs.

Change-Id: I452ac69143395881ab8580355a0f75571dc3e929
CRs-Fixed: 3381711
2023-03-16 09:30:15 -07:00
Karthik Kantamneni
29eb537def qcacmn: DP changes to add new RHINE arch specific files
This change introduces new RHINE architecture specific DP files.
RHINE is new SOFTUMAC based architecture, unlike LI/BE targets
all the HW UMAC functionality will be replaced with software base
UMAC functionality. So current RHINE arch specific implementation
is aligned to softumac based implementation.

Change-Id: I70baf11130afc07c5c85437d2343d0976ce0ea0a
CRs-Fixed: 3382880
2023-03-07 07:51:34 -08:00