Because of changes to ref clock frequency, few of the pll
reg values are different for kalama compared to palima.
This change differentiates between these two 4nm versions,
based on pll revision and also introduces a pll reg table
to differentiate the values.
Change-Id: I016330ded10ab334012daa8cc288a8cd5c039f58
Signed-off-by: Sandeep Gangadharaiah <quic_sandgang@quicinc.com>
Changes include support for 4nm DP PHY and DP PLL.
Added dp_pll_4nm.c file with register programming
sequences for DP PHY and PLL.
Change-Id: I104cf69964904c9a47a17e75a84df011d7994c9f
Signed-off-by: Soutrik Mukhopadhyay <quic_mukhopad@quicinc.com>
With the change in the clock names for newer targets, this fix
updates the driver to support different clock names per target.
Change-Id: I58c35fce34356f8c79adb0ac8a907e2fb60813ae
Signed-off-by: Sudarsan Ramesh <sudarame@codeaurora.org>
Add support for PLL programming in the DisplayPort driver.
Change-Id: I4f08a621dcae5d1f54d67bb5c34409249012cc7b
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
