Commit Graph

1071 Commitit

Tekijä SHA1 Viesti Päivämäärä
Amine Najahi
c9eb6c1102 disp: msm: sde: fix mixer count calculation for 4LM topologies
Currently mixer calculation does not take the number of LMs into
consideration when it is greater than 2. This changes adjusts mixer
count for 4LM use cases based on maximum clock and pipe width.

Change-Id: I05631dee3beadaa0d50548282a539835bcb548c0
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2020-05-06 11:33:08 -04:00
Amine Najahi
8dd5deed11 drm: msm: sde: reserve LM in pairs for 4LM topologies
Reserve LM in the sequence of primary-peer and then
primary-peer again until all required LM are reserved.
Searching sequence will not change for single/dual LM
reservation. For single LM reservation it will return
right after the first primary LM is found. For dual LM
reservation it will return after the first primary-peer
pair is found.

The logic can also work for triple/quad or any number
of LM reservetion and make sure that all the reserved
LMs are in pairs except the last one if total LM number
is odd.

Change-Id: Ia28bb64fedeb43430039775051943d751259a3d2
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
Signed-off-by: satbir singh <satbsing@codeaurora.org>
Signed-off-by: Xiaowen Wu <wxiaowen@codeaurora.org>
2020-05-06 11:32:53 -04:00
qctecmdr
4d124f3e10 Merge "disp: msm: sde: add plane staging management for 4LM topologies" 2020-05-06 01:21:56 -07:00
qctecmdr
6ced01af10 Merge "disp: msm: sde: cancel delayed work when in auto-refresh" 2020-05-06 01:21:55 -07:00
qctecmdr
a9482dd3f1 Merge "disp: inc: uapi: fix UAPI headers to compile with UAPI_HEADER_TEST" 2020-05-05 20:30:53 -07:00
qctecmdr
e9b326e3f2 Merge "disp: msm: sde: move HW recovery outside ppdone wait" 2020-05-05 20:30:53 -07:00
qctecmdr
6ef30aa7c8 Merge "drm: msm: edid: update colorimetry values" 2020-05-05 20:30:53 -07:00
qctecmdr
411411725f Merge "drm/msm/sde: add sui blendstage support for lahaina" 2020-05-05 20:30:53 -07:00
qctecmdr
1526bf221a Merge "disp: msm: dsi: fix dsi pll debugfs errors" 2020-05-05 20:30:53 -07:00
Amine Najahi
89c7e1dadf disp: msm: sde: add plane staging management for 4LM topologies
When a 4LM topology is used each plane attached to a CRTC
is tagged with a L/R layout value and an offset value
depending on where destination X coordinate lands on the display.
The layout information is used to determine SSPP to LM
pair mapping and local coordinate space.

This change also handles source-split and Z-order
validation checks for planes staged on different mixer
pairs.

Change-Id: I1b20223388e65fc36a8b379ad9df23a277fcd1a5
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2020-05-05 23:06:39 -04:00
Amine Najahi
e7a890df11 disp: msm: sde: add 4LM topology variants in resource manager
Add 4LM topology variants in resource manager and in drm
connector topology name property.

Change-Id: I13e6eaafe60037b48d2c9d356f668b69720cbf48
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2020-05-05 23:04:15 -04:00
qctecmdr
c587442d57 Merge "disp: msm: sde: decouple FETCH_PIPE_ACTIVE logic from setup_blendstages" 2020-05-05 18:29:34 -07:00
qctecmdr
154ee80381 Merge "disp: msm: update rm topology mapping tables" 2020-05-05 18:29:34 -07:00
Steve Cohen
504b10377f disp: msm: sde: cancel delayed work when in auto-refresh
Display is entering into mode2 since no new frames are queued,
but auto-refresh requires HW to remain active. Make sure to
cancel the timer for entering idle power collapse whenever
there's a kickoff with auto-refresh feature enabled.

Change-Id: I0ac74e514c9893c31506edc3f2d7e069ab9a3ef8
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-05-05 15:02:03 -07:00
Narendra Muppalla
fffb767bc0 drm/msm/sde: add sui blendstage support for lahaina
This change adds secure-ui blendstage support for
lahaina target.

Change-Id: If6e0f9df469e39f53329b264416ef9214ec01be9
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2020-05-05 11:00:44 -07:00
qctecmdr
a2a04712a9 Merge "disp: msm: update VDC-m hardware version in display driver" 2020-05-04 23:32:46 -07:00
Narendra Muppalla
218244e58b disp: msm: update rm topology mapping tables
This change updates resource topology mapping tables and includes
logic to compare compression types for dsc vs vdc.

Change-Id: I1735edeb07aec8ed0065f84ac0824c58158412f3
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2020-05-04 22:47:11 -07:00
Steve Cohen
d26bf3c6fd disp: msm: sde: move HW recovery outside ppdone wait
With posted start enabled SW no longer waits for ppdone events
unless more than one frame is in queue. HW recovery logic relied
on these waits to know when we recover from a timeout. This
change moves the HW recovery SUCCESS event signalling outside of
the wait to ensure this event is sent to user-space regardless
of the status of posted start.

Change-Id: I8896e8126284b415513499723ccf0155ee8bc6a7
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-05-04 19:48:51 -07:00
Steve Cohen
ee91905928 disp: inc: uapi: fix UAPI headers to compile with UAPI_HEADER_TEST
Fix headers so that they compile with UAPI_HEADER_TEST.

Change-Id: I2585a18b02abcc3a52ec0079aa4cc1ce55ee1b56
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-05-04 19:48:37 -07:00
Steve Cohen
b9e3d4aebb disp: msm: sde: decouple FETCH_PIPE_ACTIVE logic from setup_blendstages
Setup blendstages is done per LM but FETCH_PIPE_ACTIVE is per CTL.
Overloading mixer blendstage setup with fetch pipe logic can lead
to HW programming errors. Refactor the logic for setting
FETCH_PIPE_ACTIVE by adding a new op that allows caller to provide
a bitmask of all pipes required to be active on this CTL. This new
logic includes support for:
 - 4LM use-cases, staging pipes for all LMs within a CRTC
 - Demura fetch-pipe without need for tracking via active_cfg (removed)

Also, lower the cyclomatic complexity in setup_blendstages by moving
the logic for obtaining the mixer config settings in to a helper
function.

Change-Id: I2907b359ffad5734be5b06f44919b5ddb1ef3f7c
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-05-04 19:47:00 -07:00
Prabhanjan Kandula
62cb53cc59 disp: msm: sde: fix compression info usage in resource alloc
Currently, compression info passed to resource manager is not
valid in atomic check phase. Also in current design allocation
of msm mode info object is from stack which is huge and causing
stack overflow in continuous splash use case. This change fixes
these issues by moving mode info object to heap allocation.

Change-Id: Ifaf39b3ae59c942da5c00b82c73cb97cdaf500d3
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
2020-05-04 19:42:04 -07:00
Tatenda Chipeperekwa
4c5883225e drm: msm: edid: update colorimetry values
Use the colorimetry values as defined sde_drm.h.

Change-Id: Id636a0ce14d44c98372526c43a484d29eec0b7d5
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
2020-05-04 18:28:51 -07:00
qctecmdr
20d23de207 Merge "disp: msm: sde: set predownscale x_0 if value not provided" 2020-05-04 18:12:45 -07:00
qctecmdr
947fa56080 Merge "disp: fix compilation issue with trusted VM config" 2020-05-04 15:49:27 -07:00
qctecmdr
62287d239e Merge "disp: msm: sde: reduce complexity in sde_encoder_virt_mode_set" 2020-05-04 08:32:51 -07:00
qctecmdr
3504cd43c2 Merge "disp: msm: sde: reduce complexity in sde_plane_sspp_atomic_check" 2020-05-04 08:32:51 -07:00
qctecmdr
34620799ae Merge "disp: msm: sde: reduce complexity in _sde_plane_install_properties" 2020-05-04 08:32:51 -07:00
qctecmdr
31a258431a Merge "disp: msm: sde: use sde_dt_props for parsing TOP properties" 2020-05-04 08:32:50 -07:00
Jeykumar Sankaran
e0b15f4dbc disp: fix compilation issue with trusted VM config
This is temporary change to avoid compilation issues on
genericarmv8 recipe. This will be reverted once the
display support is added for the recipe.

Change-Id: I805cf0b98ed77d9d4af72422a2a5b2533658ab73
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2020-05-03 21:56:20 -07:00
Jeykumar Sankaran
373224c48b disp: leave header path includes out of target check
Don't include header paths while adding config files
for specific targets.

Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Change-Id: Ibab9e46101b59298ff1e42e07ffa391e192a23c6
2020-05-03 21:56:01 -07:00
qctecmdr
34df751b29 Merge "disp: msm: fix probe deferral logic" 2020-05-01 17:58:08 -07:00
qctecmdr
dfc3e3ddc8 Merge "disp: msm: sde: add sys cache usage for static image" 2020-05-01 17:58:07 -07:00
qctecmdr
7928c8d0e1 Merge "disp: msm: fix kw issues in sde and dp driver" 2020-05-01 10:55:28 -07:00
Abhijit Kulkarni
802b5e31eb disp: msm: fix probe deferral logic
msm_drv should be probe deferred until rsc driver
probe is done. OF_POPULATED flag only checks if platform
driver is registered and hence additional condition to
check if driver is attached to this device, is needed.

Change-Id: I070965cc8d3ba3984032ad3704ec86066680eef0
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2020-05-01 09:57:07 -07:00
qctecmdr
4ec51d5fd2 Merge "disp: msm: sde: Add support for PCC position field" 2020-04-30 23:57:39 -07:00
qctecmdr
6a5956b36e Merge "disp: msm: make msm_drm as module for GKI" 2020-04-28 23:51:44 -07:00
Shashank Babu Chinta Venkata
6cda336fc9 disp: msm: make msm_drm as module for GKI
Make msm_drm as DLKM(Dynamically lodable kernel
module) for GKI config.

Change-Id: I1c11c2de9d24da7f26333f94a157c35581bc2459
Signed-off-by: Shashank Babu Chinta Venkata <sbchin@codeaurora.org>
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
2020-04-28 15:52:49 -07:00
Shashank Babu Chinta Venkata
8b8bfe0165 disp: msm: make msm_drm into single module
Make msm_drm into single module and all child driver
registers and unregisters are handled from parent's
register and unregister respectively.

Change-Id: I017513d1de3b6b25dd5543d7fa7741c0bac1740d
Signed-off-by: Shashank Babu Chinta Venkata <sbchin@codeaurora.org>
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
2020-04-28 15:52:39 -07:00
Chandan Uddaraju
eaa458b165 disp: msm: move MDSS resource voting to probe
sync_state driver disables any resources that
don't have any votes after driver probe is completed.
Move MDSS resource votes to probe so that any resources
that are needed for continuous splash are intact until
the bind of all the components is complete.

Change-Id: I0056bf1ec56bcd6a1b620a81143d4b49d7ea2921
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
2020-04-28 12:09:13 -07:00
Chandan Uddaraju
fa8f623802 disp: msm: dsi: move panel regulator votes from bind to probe
Add vote for panel regulators in dsi probe to make sure
panel regulators are ON until dsi bind is completed
for cont-splash enabled usecase. Remove this panel regulator
vote when dsi component bind is done.

Change-Id: I0b1d43fa1b16385712abc1d8aaa0e778f31ba634
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
2020-04-28 12:08:21 -07:00
qctecmdr
ef37df40dd Merge "disp: msm: sde: add rotation and scaling check for max linewidth" 2020-04-28 11:50:26 -07:00
Samantha Tran
303ac7b5c9 disp: msm: sde: set predownscale x_0 if value not provided
Currently, the value for predownscale_x_0 is being set based
on source height and destination height. This value should only
be set if userspace has not set a value for it already or if
default scale is enabled through debugfs.

Change-Id: Icf13ac33ae4a1a40bff90cd639428e9a11f96241
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2020-04-27 13:52:28 -07:00
Nilaan Gunabalachandran
83ee51cb5a disp: msm: sde: add sys cache usage for static image
Store full or partial static image in system cache (L3 cache)
for video mode primary display. Added additional commit to
crtc commit thread to transition to read cache state.
The change also updates llcc APIs to support generic functionality.

Change-Id: I6b2a45da946d7e0e0b326da9d214be3f01a9420e
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2020-04-27 15:12:17 -04:00
Christopher Braga
a6081a2894 disp: msm: sde: Add support for PCC position field
A new position control register field has been added to the
DSPP PCC on Lahaina. This field controls whether PCC is invoked
before or after GAMUT mapping.

Introduce new PCC control logic to set the PCC position based on
the new PCC_BEFORE flag. Older versions of the PCC control function
now clear all flags to ensure backwards compatibility.

Change-Id: I0a33604111b755e0a0ccf1864a57b17cc9071e3f
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
2020-04-27 10:58:28 -07:00
Christopher Braga
44b0851e91 msm: drm: uapi: Add PCC flag to specify PCC evaluation position
A new position control register has been added to the DSPP PCC
on Lahaina. This register controls whether PCC is invoked
before or after GAMUT mapping.

Introduce a PCC UAPI flag to indicate if PCC should be placed
before the GAMUT block. By default PCC will be placed after
GAMUT.

Change-Id: I0bcc35e0ce7f87c7fa29922a6a485abe479d893a
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
2020-04-27 10:58:06 -07:00
qctecmdr
a003348eed Merge "disp: msm: sde: avoid secure display to secure camera transition" 2020-04-26 14:14:12 -07:00
qctecmdr
b34a60391e Merge "disp: msm: sde: add xlogs for secure usecases" 2020-04-26 11:26:35 -07:00
qctecmdr
44c74ccf58 Merge "disp: msm: sde: avoid drm_crtc_vblank_on during seamless transition" 2020-04-25 17:01:47 -07:00
Narendra Muppalla
d07ef2efe0 disp: msm: fix kw issues in sde and dp driver
This change addresses out of range and null checks in
sde and dp driver.

Change-Id: I142196d7394f0bf0abab1bfa89abfd784a5521c8
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2020-04-24 16:01:02 -07:00
Steve Cohen
257ac9e1d2 disp: msm: sde: reduce complexity in sde_encoder_virt_mode_set
Lower the cyclomatic complexity for this function by splitting
the work into helpers.

Change-Id: I9e32d4ff13d31360a2baa77e013751ee8f0773fb
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-04-24 01:19:19 -04:00