커밋 그래프

18 커밋

작성자 SHA1 메시지 날짜
Sai Rupesh Chevuru
45be95484a qcacmn: Updating the bank config in RAW mode
In the case of RAW mode, VAP parameters encap type, dscp_to_tid map id
and cipher are not updating in bank register.
Added a API to update vdev param.

Change-Id: I702bee563e7451f403fa32292bf20680cd66e213
CRs-Fixed: 3078687
2021-11-29 16:41:02 -08:00
Chaithanya Garrepalli
c42af1f62f qcacmn: Rx path changes for multichip MLO
Rx patch changes for multichip MLO

1. Create ini for rx ring mask for each chip
2. Configure hash based routing for each chip based
   on lmac_peer_id_msb
3. Peer setup changes to configure lmac_peer_id_msb
   to enable hash based routing
4. Rx Replenish changes to provide buffers back to owner
   SOC of reo ring

Change-Id: Ibbe6e81f9e62d88d9bb289a082dd14b4362252c4
2021-11-23 19:28:20 -08:00
Chaithanya Garrepalli
bbe062b4b7 qcacmn: DP peer changes for multi-chip MLO
DP peer changes required for multi-chip MLO.
This change includes

1) Adding MLO peer to global peer hash at ML context
2) Add ML peer to all partner chips id to objtable

Change-Id: I230a6c1b14484c587b190a9a318fe9ffb1caea11
2021-11-23 19:28:15 -08:00
Chaithanya Garrepalli
31281aab2b qcacmn: Changes for MLO pdev attach
Changes for MLO pdev attach to get MLO_link_id
information.

Change-Id: Id9e6932138e314dfeb93417fce690329ec7d6ab8
2021-11-23 03:55:41 -08:00
Chaithanya Garrepalli
70398a0ccd qcacmn: Changes needed for MLO soc attach
Changes needed for MLO soc attach to pass chip_id,
dp_ml_context from upper layer.

This change also takes care of assigning appropriate
RBM id for IDLE link descriptors based on chip_id.

Change-Id: I8f5f08c524d91942e6e458f048700b7bdd900107
2021-11-23 03:55:36 -08:00
Chaithanya Garrepalli
1faab04393 qcacmn: Changes to create DP ML context
Changes to create DP ML context and associate
with CP MLO manager.

Change-Id: Ic254c883de7c6d6db0fe722a48f0faabbaad0247
2021-11-23 03:55:30 -08:00
Chaithanya Garrepalli
5be4508174 qcacmn: Changes in HW cookie conversion for MLO
Changes to have HW cookie conversion context per
desc pool.

This context will be used to program CMEM of the
other SOC in case multi-chip MLO.

Change-Id: I5ec68813e8fcb6d124698a52f5553acf9a7b1795
2021-11-23 03:55:24 -08:00
Chaithanya Garrepalli
3c3e5709ac qcacmn: Increse num TX rings for QCN9224
This change includes below
1) Changes needed to increase Tx rings to 4
2) Use WBM2SW4 ring for rx error in QCN9224
3) memset srng at alloc to avoid populating RBM_id
in per packet path and enable implicit RBM

Change-Id: Icbd5ac2378273b8f3c6adc41c611e29551fff22f
2021-10-13 13:12:19 -07:00
Naga
db1a6c8418 qcacmn: Add new data structures and ops for BE monitor
- New data structures are added for BE monitor support
  - dp_mon_soc_be  - to maintain soc level BE specific fields
  - dp_mon_pdev_be - to maintain pdev BE specific fields
  - dp_mon_desc_pool - to maintain descriptor pool
- Monitor ops are updated for 2.0 and corresponding dummy APIs
  are added.
- dp_mon_filter_srng_type is enhanced for TxMON

Change-Id: I12a2fbc53e4eecc7a191b7aa925431298d0a9f54
CRs-Fixed: 2991276
2021-10-12 02:28:30 -07:00
Chaithanya Garrepalli
0702aaf463 qcacmn: initialize PPE rings
Changes to initialize PPE rings based on ini
configuration

Change-Id: Id6a26b557c45fd78ae17675b0292424e979958ad
2021-08-13 12:04:22 -07:00
Jinwei Chen
7caa52178d qcacmn: skip HW cookie conversion initialization for FTM mode
skip HW cookie conversion initialization for FTM mode

Change-Id: I890dcf270bb42fff87b15c491d7485ef0c9660e9
CRs-Fixed: 2983003
2021-07-08 23:34:02 -07:00
Jinwei Chen
f6d5584698 qcacmn: Refine HW cookie conversion
(1)naming change in HW CC related function
(2)refinement for cookie ID generation regardless of
SPT page address 4k aligned or not
(3)move CMEM size check under cookie conversion macro

Change-Id: Ib32d802f5512e5facfa4130826406943fb3d27f1
CRs-Fixed: 2977304
2021-07-02 00:33:58 -07:00
Jinwei Chen
a566938d33 qcacmn: fix HW CC compilation issue on 32bits system
fix compilation issue on 32bits system for HW cookie conversion
change.

Change-Id: I24ef02f61d55fb0402a1312a76e39303ab761f41
CRs-Fixed: 2980021
2021-07-01 02:04:14 -07:00
Rakesh Pillai
813b3bb474 qcacmn: Add near-full irq handler for TX completion ring
Add the handler to process the near-full condition
on the tx completion ring.

Change-Id: I547cd27d2a8a347fca1cebc6b27072f2d1d8a99d
CRs-Fixed: 2965081
2021-06-30 13:48:13 -07:00
Rakesh Pillai
5605d45923 qcacmn: Add near-full irq processing handler for RX ring
Add the handler to process the near-full condition
on the rx ring.

Change-Id: I426480386c4716702f8410ed87c70160decaa03f
CRs-Fixed: 2965081
2021-06-30 13:48:07 -07:00
Mohit Khanna
4105f31776 qcacmn: Compilation error fix in HW CC code
Fix compilation error in hardware based cookie conversion.
CRs-Fixed: 2978344

Change-Id: I4487dcf116fb71b623ea4aa1f55144a07619dccc
2021-06-28 07:22:44 -07:00
Jinwei Chen
4083155141 qcacmn: Add support for HW cookie conversion
Support HW cookie conversion for BE platform.

Change-Id: I39058fbf256266557f5e734ba376db4db0731b24
CRs-Fixed: 2929533
2021-06-23 23:32:49 -07:00
Mohit Khanna
e135b3e106 qcacmn: DP changes to create li/be TX files
Move DP TX target specific functionality to dp/wifi3.0/be
and dp/wifi3.0/li folders. DP Functionality common to both lithium and
beryllium targets stays in dp/wifi3.0.

Change-Id: I3497284153e2ea30a9cb1faf05bd41422329b804
CRs-Fixed: 2891038
2021-06-07 01:51:15 -07:00