It is not applicable for all DFPS cases to update UIDLE state
according to current frame rate. If DFPS changes frame rate
through vertical front porch values, the SDE clocks and transfer
time will not get changed accordingly, and it always get fixed
at max frame rate configuration of DFPS.
Add this change to check max FPS of DFPS instead of current
frame rate for UIDLE update, if DFPS is enabled with VFP.
Change-Id: I7634bce6a9eb1af212ba19a267735be08b20ae1f
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
This change avoids msm property install and cache state
transitions if sys cache is not supported in the target.
Change-Id: I00b0a95772b1a3dab67c7e684529cda093d6dac6
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
This change disables sending idle notification if system
cache is already enabled. If system cache is enabled it
establishes that driver has already send prior
notification and no configuration change was requested.
Change-Id: I1aee002ab3c8c3d4193a8e7a4890d8e4f24da804
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
This change fixes the vblank wait after system cache read mode
update. Without this change the wait does not happen since there is
no pending kickoff. This change uses encoder api to flush the
configuration and explicitly waits for vblank.
Change-Id: I8942f9b638e784c8fd9b5df33a9ccc7087a5eaef
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
All sde crtc's are virtual when they are created. Resources for the crtc
is allocated when crtc is enabled. All crtc's will not have same
capabilities because some of the dspp blocks have additional hardware
blocks. Change exposes additional dspp capabilities dynamically when
crtc is allocated the dspp hardware block.
Change-Id: I93e76a1335574e4ca30d9419ef6cc6e8149e2c3c
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
This change updates misr checks so that misr can be
configured during secure display session. In the current
code, misr_reconfigure flag is set only when accessing
through debugfs node.
Change-Id: Ic3a8316a4881551da3f0f340f6ef5ae3fbe4913f
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
Fix the check for uneven split across LMs when destination
scaler is used and reject the use-case since this is not
supported by the driver. This can happen if an odd-value
for the horizontal width is being split across 2 mixers.
The existing check was broken since it uses pass-by-value
with a zero initialized value that callee tries to update
while iterating over the DS configurations. Use pass-by-
reference with the previous DS configuration, if available,
instead of just 0 values so the proper comparisons can take
place.
Change-Id: I529faf57e43fb471b28b4d222260ea4d37217d4d
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
In current driver, during system cache read mode update control flush
is invoked and there after commit thread is allowed to pick up next
commit. This can lead to improper frame flush and cause hangs or
underrun. This change add a wait till frame done after system cache
update to frame read mode.
Change-Id: Ic88e0bdbaaa1f45f825d40ecde4de9e8dea2efef
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
This change resets the mixer swapping flag in crtc on a
seamless mode switch. In case of switching from command
mode to video mode it is a seamless mode on crtc, but we
disable connector and encoder. Due to this crtc fails to
reset the mixer swap since it is tied to dsc merge topology
on master connector. In transient state master connector
is not set and is set only after enabling the new mode on
connector.
Change-Id: Idebdabd642625b894100f62aeb62f11a9c101b03
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
UIDLE and QoS LUT configurationis might be different between
different frame rates.
Add this change to update UIDLE and QoS LUT according to frame
rate when DRM mode is changed.
Change-Id: Ia16a963e185b911b7dd11e81a26cab732c2b185c
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
LM size does not need to be reprogrammed on every frame. Add
a check to only reprogram it when the size changes (or coming
out of power collapse). Some color processing features require
an update when this happens as well (i.e. resolution switch,
partial update, or dest scaler reconfigure). This patch allows
for notifying CP of the updated dimensions when a change occurs.
Change-Id: Ia7f794e53e1f03302c83e442e2a1288611c7c50b
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
This change disables the border color on the layer mixer,
based on the caller's request. This is required to totally
disconnect the layer mixer hardware when it is not
participating in blending the pixels. Having empty blendstage
but border color enabled, allows Layer mixer hw to produce
border pixels even when blend stage is empty.
Change-Id: I8e84aeedffbd42ad793a167a6cc5a3a653864c1a
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
Mark LTM as dirty when dest-scaler is updated so it matches with
the mixer configuration.
Change-Id: I5f2b166ec5eb0bafc4c75f8b3268c3e85c558191
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
As per current design misr enable sequence is happening at
atomic check level. At this state, misr configuration may reset
if clocks are enabled through atomic commit sequence. This change
moves misr enable/disable sequence from debugfs context to
encoder kickoff to avoid misr register reset with idle pc.
Change-Id: Ia4faa200f96b76ba8c7ef3f45a26108e34b5e687
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
This change add right only pu support by allowing the dsc to be
flushed when one of the dsc is getting disabled. Since the crtc
swaps the mixers in case of right only partial update, this change
fixes the active display mask passed to encoder so that always the
left only dsc gets programmed. This change also fixes layer mixer
configuration where only one layer mixer is driving the partial
update, the other mixer's configuration is disabled.
Change-Id: I2dd2e9a347797bfe07c90e0ca7f999d151fba933
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
Add handoff implementation for color processing features when switching
from primary VM to trusted VM.
Change-Id: I9c3a168f70f3981e912bf37533f212880ab30924
Signed-off-by: Ping Li <pingli@codeaurora.org>
Connector state in crtc_atomic_check is still the old state, use
connector_mask to update the actual connector in the list to fix
zero connector issue.
Change-Id: I91541063acbb19beced3004a030c7f27abf9ee50
Signed-off-by: Xiaowen Wu <wxiaowen@codeaurora.org>
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
In current SDE driver when misr is enabled, for each commit in
encoder kickoff stage misr is configured for both lm and interface
misr blks. This can clear misr data before client could collect misr.
This change avoids misr data clear and configures misr based on
user input.
Change-Id: I85fc19c78afc6d01346219250c82f2ada824eb0d
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
This change to address use after free and null checks in
sde driver.
Change-Id: Iade91596748b1b867ae959e61fca0f7072eda8f3
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
Refactor topology group check helpers into a single
function to remove duplicate code. This change also
uses atomic state to extract topology information
since those functions can be called during atomic
check phase.
Change-Id: Ia262009e0b8fe9fcdeff05e544d2e59be35c9c54
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
Currently during CRTC atomic check phase, driver is counting
the number of connectors attached to the CRTC by iterating over
all the connectors available and checking if they are attached
to the CRTC. The current implementation uses the old connector
state, which has an invalid state for the first commit. This
causes the number of attached connectors to always be 0 for the
first commit.
This change extracts the new connector state from the atomic state
and ensures the calculation is done before checking crtc features.
Change-Id: I58d641086f18e8624cbc2d432443323a6a44792e
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
Reset the power_event handle to NULL after unregistering
during crtc disable. This will avoid dangling pointer
being accessed later.
Change-Id: I73044835e8594b776eb593f2f0a4a1d2b5563531
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Existing idle notify schedule logic tries to schedule
this event before display power on. If display power on
takes more than 80ms, it triggers the idle notify before
processing first display power on frame. This patch
schedules the idle notify after frame trigger for
valid notification.
Change-Id: If94108e141b5c19d123033e9d37333e98fb987f7
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Add a CRTC property to request the VM to acquire/release
HW resources.
Display driver in trusted VM boots up without HW ownership. Set
the default value of the property as RELEASED to handle resource
assignments.
Change-Id: Iea651a2fea902d95d4b954052af4ef016af15a91
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Allow caller to specify the default value of the enum
property while installing with msm prop layer. It is
not always the case that the default value to be the
first entry.
Change-Id: Ie0bb1ad7479e3e07810b3d817fdf618b1935858c
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Rename the property to qseed_sw_lib_rev to indicate that it
represents the qseed sw library revision that is compatible with
the targets qseed hw version.
Change-Id: I5a588dc20cf4a4f76f5c71301538bfc630ea220d
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Enable dim layer event log to know the composition of all
blend stages in a commit from xlogs.
Change-Id: I387fd888f06f0c61d2042896459119d614b3f60b
Signed-off-by: Raviteja Tamatam <travitej@codeaurora.org>
In current driver if client did not reset system cache
crtc property, system cache write state is on forever and
breaks the system cache feature. This change restricts
entering into cache write state only if it's commit right
after idle notify. This change also adds event logs to
capture system cache feature state changes.
Change-Id: Ie46fc9113f752ed8989dab99301690a13003b00b
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
This change allows the configuration where virtual plane is
staged without staging the corresponding master plane. Hw allows
such configuration and additionally during shell stop cases,
framework removes each staged plane one by one which requires
this configuration to be supported.
Change-Id: I85ce571dbbc148c069c2cf35cba55ad740d52b5d
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
Add support for all 4LM topologies in new DCE encoder framework.
This change also aligns with the new way of checking topology
information.
Change-Id: I5358d60634070bdb26059056db884ad4161c073e
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
Add smmu cache hint at during the msm gem prime import
to ensure memory is cacheable. Ensure sys cache feature
is added to all sspp, not just vig.
Change-Id: Icc10468ad8d3e7c6aabd437776cde99eb627375a
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
This change resets the bandwidth vote after lastclose is called
and all the custom properties are reset. This is required so that
on next power commit when user space driver does not apply any
bandwidth vote, driver applies correct vote. Additionally this
change ensures that aggregate bandwidth vote never exceeds the
max threshold.
Change-Id: I95ca761b381709850b630ecd6647b45968a5041e
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
