In current implementation qsync min fps is single value.
It is same for all the list of supported dfps list.
Added support for new dt entry dsi-supported-qsync-min-fps-list
corresponding to the fps supported in the dfps list
dsi-supported-dfps-list.
Change-Id: Ifd5309c2f51865a3c0d9fadb65cbcd291b6ef42b
Signed-off-by: Raviteja Tamatam <travitej@codeaurora.org>
This change adds support to keep display reset pin high during
suspend state.
Change-Id: I8fab43d8f7b30fce72cc95277d016b72b914aa99
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
Add parsing code for getting the TLMM base address and size
of each GPIO pin register space along with the GPIO pins
used for the specific panel. This list is used to lend
these IO ranges to trusted vm during the trusted UI usecase.
Change-Id: I10429cfa14265d52e898815c6cf94be27daa5677
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
DCS brightness settng can only use HS mode. Add a new
DT property for LP mode choose for DCS brightness setting.
Change-Id: Ibe5867fe344776871eb3a410a8d79d347775f3d4
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
The change allows for configuring a command DMA window during which
the command is triggered. The DMA window must not intersect with the
MDP tear check window. Once the command transfer is successful, the
trigger control needs to reset to the default DMA trigger specified
by the panel.
Change-Id: I5485ca1f8e141ed92dc8c77c2daf579634271022
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
The default PWM gpio pin mode was not right for PWM backlight
control. If needs to use PWM backlight, must config the
gpio pinctrl.
Change-Id: I5fd6b947d379b53ef4c358be1b935a2ad4970f99
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
This change ensure that in cases panel transfer time is specified,
the final transfer time is calculated in accordance with the minimum
threshold time allowed.
Change-Id: I3442d4d3e8a27ec30d93725cb96b229bb94f2ce2
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Display in trusted VM works in a handover mode i.e, all
display components need to be initialized by the primary VM
before switching to trusted VM on the usecase boundary.
That makes it a hard requirement for the trusted VM not to
re-program any of the display configuration registers before
it could hand the HW back to the primary VM.
Also, most of the linux framework drivers including pintrl, clocks
are not enabled in the trusted VM.
In order to address the above two limitations and to control the
probe/commit sequences, this change adapts the same path as that
of continuous splash to bypass some of the critical functions
which are identified to be HW intrusive. Based on the DT property
read from SDE handle, dsi drivers will choose to bypass
enable/disable HW state updates when executing in the vm environment.
Change-Id: Ica71c924d189ab65fe3be5b0ac870633e3b749e1
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Primary and secondary dsi displays are built-in displays
and they are supported during all concurrency usecases
without resource allocation failure. DP mode filter
logic should provide supported mode information based
on free mdp resources after dsi resource assignment.
Change-Id: I3a9637a91ea1ffcc31997e25caff7f13605283ac
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Use lower frame threshold time for high refresh rates. For resfreh rates
greater than 120 FPS the threshold time is 500us.
Change-Id: Ie5a37c0eec6c2c2cbf90e039eb6b15bc7edd2492
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Since some property of panel dtsi were not a must.
Do not report errors for panel bindings that are
not mandatory.
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
Change-Id: Ie899081e2ca93740ceb854457b61e5fc5d2083fa
Add support to read cphy boolean flag from panel dtsi
and configure DSI PHY registers accordingly. Update the
bit/byte clock calculation according to cphy specifications.
Update clock parents so that the relevant divider blocks
are configured to support cphy.
Change-Id: Iaca61eec01a488657b086f59910c52f8c79e26a4
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
In order to make dsi panel and dsi2hdmi panel compatible,
delete "qcom,panel-force-clock-lane-hs" property in phy and
use display panel's force_clk_lane_hs property.
Change-Id: I490e08b2ee859797c2b3aeddf109a3a4286fb922
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
In general the brightness value, the first parameter is low byte and
the second is high byte, but some DDIC invert, so add inverted display
brightness value property.
Change-Id: I8bf5631bb66096bd28529c53643e358afffce18e
Signed-off-by: Wenjun Zhang <wjzhan@codeaurora.org>
Add vote for panel regulators in dsi probe to make sure
panel regulators are ON until dsi bind is completed
for cont-splash enabled usecase. Remove this panel regulator
vote when dsi component bind is done.
Change-Id: I0b1d43fa1b16385712abc1d8aaa0e778f31ba634
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
Update the VDC-m hardware version in the display driver as per
the latest programming guidelines.
Change-Id: I0073cb7b713599de43f2a675202390df3b4a1d58
Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
This change updates the parsing of timing nodes to check
the mode of operation as video or command. In command mode,
for each timing node, num of supported dfps rate is always
one. Accordingly, update the num_dfps_rate to 1 for
command mode.
Change-Id: I5098c7e0d4d2320609d6e10031eaef78c1d8b3c1
Signed-off-by: Lipsa Rout <lrout@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Optimize pre mode switch panel command by transferring async. This
removes the time waited until subsequent dma_done irq.
Change-Id: I2e2516fdd641e85d1f1b221a6ea7999c868edf00
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
From Lahaina onwards, for compressed DSI output, widebus should be enabled.
In widebus mode, 6 bytes of data are transmitted per pclk.
For uncompressed output, widebus must be disabled to transmit 3 bytes
of uncompressed data per pclk.
Change-Id: I7fc0bdb2e1678152d57b4cbb8295063a2ba8ae73
Signed-off-by: Rajkumar Subbiah <rsubbia@codeaurora.org>
It should not be an error that panel mode isn't specified
in timing node, so add this change to lower the log level
from error to info.
Change-Id: I49bd1fec1c09697d9829a8e0767dfa3cf2cff512
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
There is lag or lead in the FPS during dynamic clock change,
along with the increment or decrement in clock. So, HFP or
VFP are adjusted to ensure a constant FPS.
Change-Id: I87ba7a185104a0f5f1d13734a7e487e728d6b2c0
Signed-off-by: Lipsa Rout <lrout@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
This change parses SPR enable entry from panel device tree and
populates SPR specific information in panel data structure.
Valid entry of SPR pack type is treated as panel requirement
to enable SPR for specified pack type from source end. This change
also populate connector capabilities blob with SPR pack type.
Change-Id: I9d9ab8a990476fba281e12890bf3f7b17a174d79
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
DSI host vsync is expected to align with panel internal vsync
during transition from command mode to video mode operation.
In order to facilitate this, keep panel TE enabled in video mode
operation until it is aligned with vysnc.
Change-Id: I3fc59b01336b30cd436be332af6953c5a01be7fd
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
Add a generic API which calculates the horizontal timings based
on the compression type in case compression is enabled and even
for non-compression cases.
Replace the usage of the DSC macros with this generic API.
Change-Id: Ie9174c20adc51a0be7c9127529d41faa4b473b55
Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
Add the support to program DSI compression registers
for VDC-m. These are calculated based on the VDC parameters
and mode information.
Change-Id: I09b163a496842331d5f2a78371f380180b3a15b8
Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
Add support for PPS command for VDC-m. This shall be sent from the
encoder to the decoder such that both can produce the same model
state.
Change-Id: Iae48615eab7c91ef7ecc68b84334057de5090364
Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
Add support to calculate the parameters needed to configure
the VDC-m encoder. These are also needed to configure the PPS
command which shall be sent to the decoder.
Change-Id: I36db93f7555aee34b5b893e389a7eb88d0e05f68
Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
Add support for parsing VDC-m DTSI parameters and also
perform basic validation checks on those.
Change-Id: I4b13cf04b1500c3c801c227658cb787bdad6174f
Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
This change enforces dp, dsi and the sde drivers to use the
drm framework defined dsc_config data structure. As a part of this,
it introduces the sde_dsc_helper API to configure the dsc params
and creating a PPS command. Earlier each driver implemented it's
private versions leading to duplication of code. Additionaly the
helper api supports DSC spec 1.2 422 and 420 mode.
Change-Id: I25933fab08cdabbc6787079926885d1a78945e97
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
The pin was configured to input mode when panel on. But
if continuous splash was on, driver will not power on panel
when booting up, the first time panel off, this gpio was
the default mode or the UEFI config mode.
Change-Id: Ib352343848ab38cab828cc10388b366aeac8905d
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
1.Typecast to avoid distinct pointer type comparison
2.Keep DMA mask aligned with api definition.
3.Add Suffix for literals
4.Remove multfrac func to avoid uncompatible division.
5.64-bit division( operator "/") on 32-bit platforms is not supported.
Using platform independent API's here
Change-Id: I0e7305418e53876bd1adf00c1963f85cbdf980cc
Signed-off-by: Ravikanth Tuniki <rtunik@codeaurora.org>
Allow Qsync and VRR features to be supported independently
by display driver. Restrict the feature availability in
same composition cycle.
Change-Id: I696eb72a2b4f9451e142ffdc5acccc8987c36b6d
Signed-off-by: Kalyan Thota <kalyant@codeaurora.org>
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
With this change, mdp transfer time updated to userspace
will be the preferred dtsi entry, when both dsi clock
and mdp transfer time nodes are set.
Change-Id: I37cd55e3d6f3f0f78f4ca4bddf921f6cf743c1b9
Signed-off-by: Vara Reddy <varar@codeaurora.org>
