Commit Graph

6 Commits

Author SHA1 Message Date
Satya Rama Aditya Pinapala
edef6ae040 disp: msm: dsi: snapshot of dsi from 4.14 to 4.19
This change is a snapshot of dsi files taken of 4.14
as of commit 764f7c2 (Merge remote-tracking branch
'quic/dev/msm-4.14-display' into msm-4.14)

Change-Id: I8361a844c35a4450f7800964a8da2741676fd6c7
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2019-07-11 12:29:10 -07:00
qctecmdr
2df7ab2694 Merge "disp: msm: dsi: update DSI PHY sequence for Kona" 2019-06-29 19:44:03 -07:00
Satya Rama Aditya Pinapala
03295175d6 disp: msm: dsi: update DSI PHY sequence for Kona
This change updates the DSI PHY sequence for Kona target as
per latest HW team recommendation.

Change-Id: I110cc5044d2676ade58f947b3efca53d1d72753c
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2019-06-11 15:11:37 -07:00
Yujun Zhang
8cbd8321c1 disp: msm: dsi: DSI PHY V4 support of dynamic clock switch
This change adds support for dynamic switching of dsi clocks
to avoid RF interference issues. DSI PHY V4 support is added.

Change-Id: I5bdbd6d2916692087c0192d23c8e7598238f161f
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
Signed-off-by: Yujun Zhang <yujunzhang@codeaurora.org>
2019-06-05 16:07:03 +08:00
Ritesh Kumar
d9448326ce disp: msm: dsi: program DSI_PHY_CMN_CTRL_4 register
For some phy ver 4 chipsets, DSI_PHY_CMN_CTRL_4 needs to be programmed
in normal power up sequence. This change adds support to program the
same based on minor phy version.

Change-Id: I68bed48ca671f540efafd13f8d56c7e90de8b25c
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
2019-05-24 02:54:07 -07:00
Narendra Muppalla
3709853456 Display drivers kernel project initial snapshot
This change brings msm display driver including sde,
dp, dsi, rotator, dsi pll and dp pll from base 4.19 kernel
project. It is first source code snapshot from base kernel project.

Change-Id: Iec864c064ce5ea04e170f24414c728684002f284
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2019-04-14 22:20:59 -07:00