Commit graph

62 Commits

Autor SHA1 Nachricht Datum
Satya Rama Aditya Pinapala
57064ba1cc disp: msm: dsi: round up the byte clock to even number
Change rounds up the calculated byte clock rate to the nearest
even number.

Change-Id: Iea6d3121343f1b2cb6d0a06cd47a84b050d55ac1
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2021-02-23 14:38:18 -08:00
Satya Rama Aditya Pinapala
5c7dfa0712 disp: msm: dsi: ensure even rate for DSI byte clock in DPHY
For DPHY, DSI byte clock is used to derive the byte interface clock through
a DIV_2 divider. While setting the rate for byte interface clock, if the byte
clock rate is odd the recalculation of byte interface clock will fail. This
can further lead to recalculation of byte clock and result in unexpected
value for byte clock. The change ensures that for DPHY, the byte clock rate is
always even to avoid such issues.

Change-Id: I0a0371af75e5819ed1283b52b4681e70f55d66e0
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2021-02-23 11:39:47 -08:00
Satya Rama Aditya Pinapala
3ff78e8f7d disp: msm: dsi: set source to xo while turning off PLL
HW recommendation is to park the DSI byte clock and pixel clock at XO
before turning them off. The change parses XO from the DT and sets the
clock source as XO while turning off the PLL.

Change-Id: I788951d6341149300e80e8db4a5a3fd2c4eb3e03
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2021-02-01 16:03:20 -08:00
Satya Rama Aditya Pinapala
b78db36c48 disp: msm: dsi: add new compatible strings for DSI PHY and controller
Change adds the new compatible version strings for DSI PHY and DSI CTRL
for waipio.

Change-Id: I1073034e608cace9d41cc04a9854f15f56828dfe
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2021-01-19 16:12:56 -08:00
Satya Rama Aditya Pinapala
c3c683472d disp: msm: dsi: remove custom upstream MSM DSI flags
Change removes the use of custom MSM DSI flags that will not be
available as part of GKI.2.0

Change-Id: I2337a54b1d6346ebdc18e9e6c3c8e7a07f421bdd
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2021-01-15 17:55:19 -08:00
Rajeev Nandan
37b2f80ad4 disp: msm: dsi: enable DMA cmd scheduling for video mode panels
This change enables the DMA CMD scheduling as default for
video mode panels.

In video mode panel, if the DMA is triggered very close to
the beginning of the active window and the DMA transfer
happens in the last line of VBP, then the HW state will
stay in ‘wait’ and return to ‘idle’ in the first line of VFP.
But somewhere in the middle of the active window, if SW
disables DSI command mode engine while the HW is still
waiting and re-enable after timing engine is OFF. So the
HW never ‘sees’ another vblank line and hence it gets
stuck in the ‘wait’ state.
Scheduling the DMA cmd to the first line in VFP fixes
this issue.

Change-Id: If9e5bd1923c012f10dee50c791a2b2b001d97553
Signed-off-by: Rajeev Nandan <rajeevny@codeaurora.org>
2020-12-10 04:19:33 -08:00
Satya Rama Aditya Pinapala
ae5b602b4f disp: msm: dsi: trigger broadcast commands using DMA start window
As per the HW requirements it is highly recommended to use DMA start
window to trigger  broadcast commands. If not used then it can
result in a hardware hang with the DSI controllers going out
of sync. This behavior is even more prominent in cases of higher
refresh rates. As part of the change we change the default DMA
scheduling behavior to default to maximum possible DMA window
in case it is not specified in the panel device tree.

Change-Id: Ied4df9063664cedbc18ce009054d4e5ecae30ab2
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-12-04 20:01:55 -08:00
Harigovindan P
8dd3b42c57 disp: msm: read mdp intf line count and trigger dma accordingly
when a broadcast DSI command is scheduled, the command can get
triggered close to the schedule line. This might cause DMA
timeout. This change reads the video line count from
MDP_INTF_LINE_COUNT register and checks whether DMA trigger
happens close to the schedule line. If it is not close to the
schedule line, then DMA command transfer is triggered.

Change-Id: Ida92e63e46b4cc703d57ce24097834f810776aa8
Signed-off-by: Harigovindan P <harigovi@codeaurora.org>
2020-11-18 23:41:05 -08:00
qctecmdr
7e52459f8e Merge "disp: msm: dsi: Add support for parsing mdp_intf base address from dt" 2020-11-13 05:34:43 -08:00
Lipsa Rout
5407bf18f3 disp: msm: dsi: Add support for parsing mdp_intf base address from dt
Currently, mdp_intf_line_count and mdp_intf_tear_line_count register
addresses are defined in dsi_ctrl_hw for debug feature. But mdp_intf
base address is target specific and independent of dsi controller
version. This change adds support for parsing the mdp intf base
address from dt, thereby remapping using base + offset addressing.

Change-Id: Ibb72dfe84a786a5c8b95f6a400e8333f6b46814a
Signed-off-by: Lipsa Rout <lrout@codeaurora.org>
2020-11-12 09:48:52 +05:30
Narendra Muppalla
9b133dd201 disp: msm: dsi: add dsi ramdump support without DEBUG_FS
This change adds dsi display ramdump support when DEBUG_FS
is not enabled.

Change-Id: Ic6659a9380acd5eb55a3270d3e3b7016a9cd2bd7
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2020-10-28 13:07:28 -07:00
qctecmdr
a27dce97f8 Merge "disp: msm: dsi: invoke DSI soft reset when video engine is stuck" 2020-10-22 11:28:20 -07:00
Ritesh Kumar
97dcdc695a disp: msm: dsi: invoke DSI soft reset when video engine is stuck
During ESD check failure, DSI video engine can get stuck
sending data from display engine. In use cases where GDSC
toggle does not happen like DP MST connected or secure video
playback, display does not recover back after ESD failure.
This change adds support to perform soft reset when DSI
video engine gets stuck.

Change-Id: I9cb31e6c71c4da171f9fe22fc3bee9175711831d
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
2020-10-22 11:48:24 +05:30
Satya Rama Aditya Pinapala
bbe18a1689 disp: msm: dsi: batching multiple DSI commands using debugfs node
The change batches DSI commands sent using the debugfs node, in a
separate buffer from the TX command buffer to ensure that they are not
triggered before the last command bit is set. Once the last command
bit is set the buffer is then copied to the DSI TX buffer and triggered.

Change-Id: I9ba624e4e19341696a974994817603315c6c8a45
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-10-21 15:25:48 -07:00
Rajeev Nandan
19a54c5650 disp: msm: dsi: enable xlog in critical paths
Enable xlog in critical paths to increase debug coverage.

Change-Id: I177acd3f2c2ab349f533bb9fbd8a8122539d524b
Signed-off-by: Rajeev Nandan <rajeevny@codeaurora.org>
2020-09-16 13:00:11 +05:30
Lipsa Rout
96e7af3205 disp: msm: dsi: Handle pm_runtime_put_sync return value properly
Currently,power resource disable fails when pm_runtime_put_sync
returns negative values. Due to this, clock state update is
failing. pm_runtime_put_sync can return negative values in
scenarios where  pending resume requests take precedence over
suspends. This change allows pm_runtime_put_sync to return
negative vales also.

Change-Id: I1a46ca574129ba953ddb6300f9b3ab24cdb3171e
Signed-off-by: Lipsa Rout <lrout@codeaurora.org>
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-09-10 11:35:56 -04:00
Ritesh Kumar
755686a110 disp: msm: dsi: Handle GDSC PM in pre/post clk on/off
Currently, power_state variable does not reflect the GDSC
status. Due to this, there are scenarios where ctrl_power_on
is not happening leading to clock failures. This change
updates power_state based on current status of all the
regulators. GDSC enable is moved to pre_clkon and GDSC
disable is moved to post_clkoff.

Change-Id: I6d9508d5dffda0c94bd3b3bd9b5feb4724dc9dc7
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
[cohens@codeaurora.org: fixed static analysis error]
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-09-10 11:34:28 -04:00
qctecmdr
3ee7b6f685 Merge "disp: msm: dsi: Skip soft reset during display disable" 2020-09-09 02:29:19 -07:00
Harigovindan P
25b6a3e7d1 disp: msm: dsi: Mask overflow error for Broadcast command
Currently, for Dual DSI Broadcast command, Overflow error
is masked only for master controller. This changes add
support to mask overflow error for slave controller as well.

Change-Id: Ida73c4166e996fcf2c8c936d0c76d0a89a220d89
Signed-off-by: Harigovindan P <harigovi@codeaurora.org>
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-08-25 19:14:29 -04:00
Ritesh Kumar
998dec67d8 disp: msm: dsi: Skip soft reset during display disable
As per DSI HPG, Soft reset is not required to disable
video mode operation for version 1.3.0 and later. So,
add check to skip it during display disable.

Change-Id: If6d263bdf22f8a6fbef76d78d04bb9d11be05945
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-08-25 19:12:33 -04:00
Satya Rama Aditya Pinapala
3deb5c353e disp: msm: dsi: add debug ability to read TE read pointer line count
The change adds register mapping of MDP_INTF_[1/2]_TEAR_INT_COUNT_VAL
register to DSI controller. This allows for the controller to read the
line count and frame count of the read pointer during trigger and
successful transfer of DMA command.

To enable the debug feature:
echo 1 > /d/<panel_name>/dsi-ctrl-0/enable_cmd_dma_stats.

To disable the debug feature
echo 0 > /d/<panel_name>/dsi-ctrl-0/enable_cmd_dma_stats.

To read line count value:
cat /d/<panel_name>/dsi-ctrl-0/cmd_dma_stats.

Change-Id: I5cdeb54ca941af05b226a9d7ab332b899ecc5797
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-08-06 13:54:52 -07:00
Satya Rama Aditya Pinapala
50af1eb43b disp: msm: dsi: add support for DMA CMD scheduling for CMD mode panels
The change allows for configuring a command DMA window during which
the command is triggered. The DMA window must not intersect with the
MDP tear check window. Once the command transfer is successful, the
trigger control needs to reset to the default DMA trigger specified
by the panel.

Change-Id: I5485ca1f8e141ed92dc8c77c2daf579634271022
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-08-05 20:31:24 -07:00
Orion Brody
ee9c09b8b3 disp: msm: dsi: fixes in GKI cleanup path
Creates a deep copy of a struct which previously was shallow.
Also adds null checks which prevent segmentation faults.

Change-Id: I9155f632736fdb30e31f28f55ebe92954956a82d
Signed-off-by: Orion Brody <obrody@codeaurora.org>
2020-07-15 17:32:17 -07:00
Jeykumar Sankaran
962fd4faca disp: msm: dsi: register io resource collection VM event hook
Add support to read register ranges and IRQ lines that needs
isolation during VM switch in dsi ctrl and dsi phy.
Register for VM resource collection event providing the
callback function.

Change-Id: I5eae4699b0a97ffed438627ccea855c401b3fbeb
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2020-07-12 15:16:32 -07:00
Jeykumar Sankaran
4b27380f07 disp: msm: dsi: reuse continuous splash path for trusted vm
Display in trusted VM works in a handover mode i.e, all
display components need to be initialized by the primary VM
before switching to trusted VM on the usecase boundary.
That makes it a hard requirement for the trusted VM not to
re-program any of the display configuration registers before
it could hand the HW back to the primary VM.

Also, most of the linux framework drivers including pintrl, clocks
are not enabled in the trusted VM.

In order to address the above two limitations and to control the
probe/commit sequences, this change adapts the same path as that
of continuous splash to bypass some of the critical functions
which are identified to be HW intrusive. Based on the DT property
read from SDE handle, dsi drivers will choose to bypass
enable/disable HW state updates when executing in the vm environment.

Change-Id: Ica71c924d189ab65fe3be5b0ac870633e3b749e1
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2020-07-12 15:00:09 -07:00
Yuan Zhao
922e8addd8 disp: msm: dsi: remove dsi FIFO error logs from dsi ISR
Lots of dsi FIFO error logs were printed into serial in
dsi ISR. It will make device stuck or deadlock. Remove
these logs from dsi ISR, and enable the log in FIFO error
workqueue handler.

Change-Id: I0e9b2312cb76d345ec5a9b9628c52b47d5163fde
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
2020-05-29 19:06:31 -07:00
Yuan Zhao
5139cad2d4 disp: msm: dsi: update PHY configuration to support cphy
Add support to read cphy boolean flag from panel dtsi
and configure DSI PHY registers accordingly. Update the
bit/byte clock calculation according to cphy specifications.
Update clock parents so that the relevant divider blocks
are configured to support cphy.

Change-Id: Iaca61eec01a488657b086f59910c52f8c79e26a4
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
2020-05-14 21:00:07 -07:00
qctecmdr
9794834cc5 Merge "disp: msm: dsi: avoid seamless request for cwb transitions" 2020-04-23 09:09:01 -07:00
Harigovindan P
1b9802c099 disp: msm: dsi: modify handling of debugfs initialization
Add support to allow creation of debugfs node only if
CONFIG_DEBUG_FS is enabled.

Change-Id: I1ae2c4188a99e3ed88f59fc021efc01407bf942d
Signed-off-by: Harigovindan P <harigovi@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-04-19 14:20:12 -07:00
Lei Chen
92ecce2873 disp: msm: Subtract DSI interrupt count after interrupt was destroyed
DSI interrupt may be destroyed before it is disabled, it will cause to
the interrupt count can't be cleared, so subtrace DSI interrupt count
in disable function even it was destroyed.

Change-Id: I430b0281957db588c7405d5775d0c10f2f498b36
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-04-19 14:13:20 -07:00
Nilaan Gunabalachandran
41f52e3987 disp: msm: dsi: maintain validated dsi msg flags
This change fixes the usecase where dsi msg flags validated only
during command transfer. This fix maintains the flags between
transfer and trigger calls. It also adds a new async override
flag to be used to bypass validate function.

Change-Id: Ie12acd3d7b01099bba65ca37cec61091408b81c5
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-04-19 14:12:58 -07:00
qctecmdr
25062d1965 Merge "disp: msm: dsi: add return code to probe deferral error logs" 2020-04-10 09:39:57 -07:00
Rajkumar Subbiah
56e041919c disp: msm: dsi: add widebus support for DSI
From Lahaina onwards, for compressed DSI output, widebus should be enabled.
In widebus mode, 6 bytes of data are transmitted per pclk.
For uncompressed output, widebus must be disabled to transmit 3 bytes
of uncompressed data per pclk.

Change-Id: I7fc0bdb2e1678152d57b4cbb8295063a2ba8ae73
Signed-off-by: Rajkumar Subbiah <rsubbia@codeaurora.org>
2020-04-09 14:15:13 -04:00
Satya Rama Aditya Pinapala
f93224bc4b disp: msm: dsi: add return code to probe deferral error logs
This change adds return code -EPROBE_DEFER to DSI error logs during
a probe deferral.

Change-Id: I59971ebc319e90d65f64e73149e34ba691441741
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-04-09 10:39:20 -07:00
Steve Cohen
b5acfe1e42 disp: msm: refactor DSI debugbus dumping
Move DSI debugbus dumping logic from DSI driver to sde_dbg
in order to utilize the framework in place for debugbuses.

This allows for more control over the dumping logic, such
as where the dump data is stored(memory/console), via nodes
populated in debugfs.

Change-Id: Iff507fdaa02d26af26743e81f6048aec57c09a76
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-03-30 23:35:42 -04:00
Vara Reddy
df28b30edf drm/msm/dsi: update recommended non-embedded mode sequence
Removing dsi soft reset logic while arbitrating transferring
embedded mode and non-embedded dsi commands. This change
follows the recommended sequence for kona.

Change-Id: I05eef0c6cfd671f48fbfdf7cb2cab788e42bb1e5
Signed-off-by: Vara Reddy <varar@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-03-17 19:34:51 -07:00
Vara Reddy
294db87b1f drm/msm/dsi: set cmd dma done mask before triggering cmds
Make sure that cmd dma done mask is set before sending
dma commands. This will make sure that we don't timeout
if the refcnt's are not properly handled. Many oem's
have their own customizations around this which maynot
handle the refcnt's correctly.

Change-Id: If7f5ed1fae20b57f6e9147cae2caa3c5097466c9
Signed-off-by: Vara Reddy <varar@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-03-17 19:34:51 -07:00
Aravind Venkateswaran
e84524efd2 disp: msm: dsi: disable DSI cmd tx async wait for video mode
For video mode panels, async wait feature for DCS command
transmission may not always be reliable as additional programming
would be needed to ensure that the DCS commands are correctly scheduled.
Until this feature is properly implemented and validated, disable this
for video mode panels to avoid potential DSI command transfer
failures.

Change-Id: I18c853bc5607cc1cc523b36f6f346b213911c1a9
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-03-17 19:30:53 -07:00
Aravind Venkateswaran
bce44eed47 disp: msm: dsi: add additional validation checks for async cmd wait
Disable DSI command transfer async wait feature for DSI read commands
and the commands sent in non-embedded mode.

CRs-Fixed: 2579259
Change-Id: Ib3b08fbb091711aa4be87400b79d01f0dcc05e71
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-03-17 19:30:46 -07:00
Vara Reddy
81ad4ef407 drm/msm/dsi: fix dsi command dma async race condition
Change will be removing checking and clearing dsi cmd done
interrupt in commit thread and in workqueue context, which
can race with dsi isr, when it tries to clear the interrupt.

Change-Id: I96e7f8dffed1af3cec0c7668ab1729337d4b260e
Signed-off-by: Vara Reddy <varar@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-03-17 19:30:32 -07:00
Lipsa Rout
5644d01f7a disp: msm: dsi: Update dsi byte interface clock calculation
Update dsi byte interface clock as per hardware recommendation.
For Phy ver 2.0 and below: byte intf clk equals to byte clk.
For Phy ver 3.0 and above: byte intf clk equals to byte clk / 2.

Change-Id: Ic3af2e4348403aeacb2e1c73c4dc133db63a51a4
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Signed-off-by: Lipsa Rout <lrout@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-03-17 19:30:09 -07:00
Abhinav Kumar
64ee2c4d72 disp: msm: dsi: add generic API for calculating horizontal timings
Add a generic API which calculates the horizontal timings based
on the compression type in case compression is enabled and even
for non-compression cases.

Replace the usage of the DSC macros with this generic API.

Change-Id: Ie9174c20adc51a0be7c9127529d41faa4b473b55
Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
2020-01-29 13:46:33 -08:00
Satya Rama Aditya Pinapala
649c6b973d disp: msm: dsi: update DSI command buffer for MSM
This change takes care of swapping the byte order in
the packet header to work with MSM hardware.

Change-Id: I38b92a277aa4677d53e263ce343721b8f2b48497
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-01-20 17:47:04 -08:00
Satya Rama Aditya Pinapala
5694bc2eee disp: msm: dsi: move dsi pll as subnode to dsi PHY
DSI PLL is tightly coupled with DSI PHY. This change removes
separate DSI pll driver and makes DSI pll as a subnode to DSI
PHY which is an accurate way of representation. In addition, this
change adds support for 5nm DSI ctrl and PHY revisions and adds
DSI pll support for 5nm. Remove support for older DSI pll revisions
such as 7nm, 10nm, 14nm, 20nm, 28nm.

Change-Id: Ic8b886a9fe24b906e4ec5130720600efa1e59b68
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-01-10 17:06:58 -08:00
Yuan Zhao
cc564849ae disp: msm: dsi: remove dsi bus scaling setting
DSI driver did not use msm bus scaling setting,
remove the code.

Change-Id: I71675c8f4e3e97f1ded72ecac3fa87bdc7fb3774
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
2019-12-03 18:46:45 -08:00
qctecmdr
d34c5f2215 Merge "disp: msm: add check for buffer length before copy" 2019-11-01 12:09:12 -07:00
Satya Rama Aditya Pinapala
8bc240b71d disp: msm: dsi: handle wait for dma cmd completion
The current solution triggers the DMA command and waits till
the command dma done and ISR signals completion. This change
introduces asynchronous wait after a DCS command has been
triggered. Enable this mode only during pre kickoff, so as to not
block commit thread.

Change-Id: Iead7b6328883e844147d47ff68dc878943879553
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2019-10-29 18:40:25 -07:00
Ravikanth Tuniki
1e60728ab8 disp: msm: sde: Fix 32-bit compilation issues
1.Typecast to avoid distinct pointer type comparison
2.Keep DMA mask aligned with api definition.
3.Add Suffix for literals
4.Remove multfrac func to avoid uncompatible division.
5.64-bit division( operator "/") on 32-bit platforms is not supported.
  Using platform independent API's here

Change-Id: I0e7305418e53876bd1adf00c1963f85cbdf980cc
Signed-off-by: Ravikanth Tuniki <rtunik@codeaurora.org>
2019-10-24 14:48:40 +05:30
Satya Rama Aditya Pinapala
be08b4e451 disp: msm: add check for buffer length before copy
Length of the buffer to be copied is checked
against both source and destination buffer lengths
before copying. This ensures that there is  no
buffer overflow while reading as well as writing.

Change-Id: I4bd1a5892b47771aef4c23a4d1594fc1c8361577
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2019-10-21 17:06:59 -07:00
Satya Rama Aditya Pinapala
c32df7879d disp: msm: dsi: add check to avoid null pointer access
Add a check for valid pointer in the DSI CTRL logging macros
to fix null pointer access issues.

Change-Id: I92576e1db6c2d8b52c2adddd8c964bc2455536e4
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2019-08-05 10:22:46 -07:00