Add TPG mux select logic in CPAS. To select form which TPG CSID should
get the data, TPG_MUX_SEL register has to be programmed. This change
adds the logic to write this register on CPAS driver.
CRs-Fixed: 3081144
Change-Id: I86560f802a04e88ceca4efa276e853029d8417d3
Signed-off-by: Ayush Kumar <quic_ayushkr@quicinc.com>
(cherry picked from commit 323f7225a0e814b2be33cd89109ae6b3ac8c3490)
Even if smart Qos is enabled disabled smart_qos_info is accessed which
causes the kernel panic. This change add few check before accessing the
smart_qos_info.
CRs-Fixed: 3650729
Change-Id: Idb8cd892f47aec60290ab3d6c7853a60558840a0
Signed-off-by: Dharmender Sharma <quic_dharshar@quicinc.com>
This change add missing calls to put cpu buf in few scenarios.
CRs-Fixed: 3578162
Change-Id: Iab6aa0324b5072390b38df296c7acee00f5102a1
Signed-off-by: Vikram Sharma <quic_vikramsa@quicinc.com>
Configure IFE FD OUT port to secure or non-secure
based on whether the user space wants to use
hardware FD or software FD for secure camera
use cases.
CRs-Fixed: 3572316
Change-Id: I8f5f1506a01ba2aaf9c533edbdc64c5c6250cb2f
Signed-off-by: Vijay Kumar Tumati <quic_vtumati@quicinc.com>
(cherry picked from commit db520c5c3fb5e585eceb1d4bc4d58a0b799b2c08)
This change removes some dead code and fixes memory leak
issues and mismatched labels.
CRs-Fixed: 3394193
Change-Id: Ieb6f0d56cddc58be4caea6f0aece63a793a08c07
Signed-off-by: Atiya Kailany <quic_akailany@quicinc.com>
Currently, lowest clk voting level supported is LowSVS, this
change will add support to a lower voting level, LowSVS_D1.
CRs-Fixed: 3480799
Change-Id: Ibdfe9d1d05aa45439a537cebe828cceea83f39d4
Signed-off-by: Atiya Kailany <quic_akailany@quicinc.com>
This change to add the camera internal LLCC staling mode enum,
rather than using direct kernel LLCC enum.
CRs-Fixed: 3523216
Change-Id: I81b5f0b84a2dd429061cc45bcaea198d909b2364
Signed-off-by: Soumen Ghosh <quic_soumeng@quicinc.com>
This change creates a sysfs entry(subparts_info) which
has info about number of IFEs, IFE-LITEs, SFEs & CUSTOM,
whose values are populated in their respective drivers.
Also, validates whether a particular IFE, SFE and CUSTOM
is supported or not. Based on this, probe of IFE, SFE and
CUSTOM drivers will happen accordingly.
CRs-Fixed: 3482745
Change-Id: Iff6e79a7793b14b1f368f215020617f10dbd4bb5
Signed-off-by: Karthik Dillibabu <quic_kard@quicinc.com>
RC value is getting modified during CPAS start in error
scenario. Handle return value which helps to retain
the original rc value.
CRs-Fixed: 3477436
Change-Id: I7006c60c1c5903c85f18f6eb385859b43b0cedc9
Signed-off-by: Chandan Kumar Jha <quic_cjha@quicinc.com>
Dump cpas vote info when CRM dump request, just like
cam_req_mgr_dump_state_monitor_info.
CRs-Fixed: 3441303
Change-Id: Ic5c2e671a27593ef1c25fa650c2148dd88c9968f
Signed-off-by: mingpan <quic_mingpan@quicinc.com>
In CPAS v980, CAMNOC is split into RT and NRT. Camnoc RT and NRT each
has separate register base. Camnoc RT is used by TFE, IFE lite, RT CDM.
Camnoc NRT is used by OFE, IPE, ICP, JPEG, NRT CDM. There are also two
IRQ lines for CPAS: RT and NRT IRQs.
Add CPASTOP SBM IRQ for RT/NRT, static QOS NOC settings for RT/NRT,
Cesta, and others in the header file for v980. CPAS registers two IRQ
lines and handles the incoming (RT/NRT) IRQs based on the IRQ data for
each IRQ. CPAS SOC looks for IRQ identifier property in CPAS node DT
to classify the IRQ type.
Global Camnoc info variable and qchannel variable now contain separate
info for RT/NRT or combined info.
Add NRT reg base for camnoc NRT base. Add TFE UBWC Encode error.
CRs-Fixed: 3403163
Change-Id: I3044c6314fa65c4e486bfa1bff2e828ac5e285cd
Signed-off-by: Sokchetra Eung <quic_eung@quicinc.com>
Removed dead code and variables in camera driver and
handled return value appropriately.
CRs-Fixed: 3394193
Change-Id: I42fda0ad538a23cc8967f9cbce936d22c31e72fb
Signed-off-by: Atiya Kailany <quic_akailany@quicinc.com>
Adding support for LLCC sys cache notify stalling feature.
To influence the cache replacement policy in real time in order to,
improve cache performance and reduce DDR bandwidth.
CRs-Fixed: 3376264
Change-Id: Id82f60fb856b3548bad77670c7c45c81ea1e904f
Signed-off-by: Soumen Ghosh <quic_soumeng@quicinc.com>
This change will help to give information on camera cesta current clk
operating level.
CRs-Fixed: 3327242
Change-Id: I0422d557985b1044fcd9bab2ce201b8c21e4e295
Signed-off-by: Soumen Ghosh <quic_soumeng@quicinc.com>
On chipsets having cesta hw block support, for cesta supported clks
clk frequency can be changed during veritcal blanking based on
CSID DRV events. For this to happen, camera clients need to setup
high and low clock votes through hw clients. Use corresponding clk,
crm APIs to setup high, low clk frquencies and do channel switch
to apply newly set rates. Clients can also set clk frequency through
sw client which will set the floor. This feature helps in saving
power for usecases where vertical blanking is high such as
Fast Shutter usecase.
CRs-Fixed: 3294948
Change-Id: I1bcf650b439991a23b2a0f0f9a5162bdcd60dc64
Signed-off-by: Mukund Madhusudan Atre <quic_matre@quicinc.com>
Signed-off-by: Pavan Kumar Chilamkurthi <quic_pchilamk@quicinc.com>
Currently, we vote the drv bw before enabling clocks, which results
in channel switch based issues when ife is the first stream on client.
Also, the same needs to be taken care during stream off. In addition
to that, the stop bw vote for drv scenario is not propagated through
the camnoc tree correctly, causing non-zero bw to be voted during
stream off. Fix bw apply order and make sure drv bw is propagated
correctly during stop. Also, add a check to ensure all mnoc bws are
zero when the final cpas client issues stop. Enahnce cpas dump to
include debugging inside the camnoc tree.
CRs-Fixed: 3065551
Change-Id: I411870140036bfb33bb4555259f173d5f0c639d8
Signed-off-by: Mukund Madhusudan Atre <quic_matre@quicinc.com>
Add support to override ddr drv high and low bw values that
are voted to interconnect.
CRs-Fixed: 3065551
Change-Id: I3f0585f1dd0fd61fcf136487596727d890eecb65
Signed-off-by: Mukund Madhusudan Atre <quic_matre@quicinc.com>
This change is needed for domain id feature support.
When a PHY and its lanes for a particular CSID are
protected in a secure session, the same for other
unused CSIDs are to be protected as well. This is
to prevent other CSIDs from tapping the data streaming
onto those lanes if they share the same PHY.
For this, the clocks for other CSIDs (eg CSID-Lite)
need to be turned on. Given that the existing driver
turns on the clocks for the CSID in use, and that
this clock information is embedded within the CSID
hw blocks, these clocks are now exposed as optional
clocks to CPAS to enable the PHY driver to turn them
on during streamon for secure session.
CRs-Fixed: 3304650
Change-Id: I1415e78467208b6b4a74223521d964a199288857
Signed-off-by: Li Sha Lim <quic_lishlim@quicinc.com>
Removes an assignment to the path_found variable that would
immediately be overwritten because of a continue.
CRs-Fixed: 3320785
Change-Id: I73cef3065a657e070d1173710f49cff8457066e2
Signed-off-by: Joshua Florez <quic_jflorez@quicinc.com>
Add debug drv flag to enable info logging for drv.
CRs-Fixed: 3065551
Change-Id: Ief9e2a84a379b9f0261567bcf13e2405f3c97d15
Signed-off-by: Mukund Madhusudan Atre <quic_matre@quicinc.com>
Remove unnecessary memsets of the structure variables
whose fields are assigned prior to their usage or they
are dynamically allocated with calls that set the memory
to 0. This memset usage optimization is to improve
performance.
CRs-Fixed: 3228092
Change-Id: Iec68c6d072863627959ce603cff28afd26a1c408
Signed-off-by: Sokchetra Eung <quic_eung@quicinc.com>
Add error handling and information logging for drv error and
info irqs for drv. Also, add debugfs for vote up and down irqs.
Add ddr and mnoc register value logging in vote up and down
irq bottom half.
CRs-Fixed: 3065551
Change-Id: I5332658924762a528625e628c3fa5d5dec07da62
Signed-off-by: Mukund Madhusudan Atre <quic_matre@quicinc.com>
Add support for bw update version 3. Add provision to
maintain cpas per path bw info internally in drivers.
CRs-Fixed: 3065551
Change-Id: I65e97c6e41f933818f1211bbc27651842e93c028
Signed-off-by: Mukund Madhusudan Atre <quic_matre@quicinc.com>
For Kalama, Low level cache controller can be used
for Long exposures as well. To support this, cache
can be shared among SFEs and a single SFE needs to
toggle between the cache IDs to keep the caches
clean.
This commit adds changes to support above requirements.
Change-Id: I9dadf4655db946254be62116b45e81abdb979b3f
CRs-Fixed: 3153295
Signed-off-by: Gaurav Jindal <quic_gjindal@quicinc.com>
For some chipsets, qchannel handshake needs icp clk to be
enabled. Add support to enable icp clk while qchannel
handshake by adding as optional clk in cpas node. Whether
to enable icp clk or not is controlled through workaround
list populated for each chipset.
Add mechanism to retry qchannel acceptance if the first
auto try has failed, by explicity writing 0x1 to qchannel
ctrl register. This will bring back qchannel to good state.
CRs-Fixed: 3131613
Change-Id: Ie39a9789b2eb1bf9c0f6adb26fe6d6e1823eff70
Signed-off-by: Pavan Kumar Chilamkurthi <quic_pchilamk@quicinc.com>
Create common root folder under debugfs root named camera at probe. Add
utility functions to create subdirectories under the common camera root.
CRs-Fixed: 3093049
Change-Id: Ia4cefb5d2263ecabf1b9d70deefa1ee624b04f07
Signed-off-by: Anand Ravi <quic_ananravi@quicinc.com>
Disable cpas writing to ICP QoS registers, since they are in
ICP clock domain, which has not been enabled by the time cpas
probes to configure the registers.
CRs-Fixed: 3048249
Change-Id: Iaada5194a06408ecee69cb724eb94c6ffb7bfb95
Signed-off-by: Karthik Jayakumar <kjayakum@codeaurora.org>
Remove return checks from debugfs_create_bool, as the API changed in
kernel 5.15+.
CRs-Fixed: 3048249
Change-Id: I2351776615a5fb17db1c54d285be2bf8e55443ab
Signed-off-by: Karthik Jayakumar <kjayakum@codeaurora.org>
Add blob info dump on finish clock/bw update error to provide
insight into what userspace has sent in packet. Also, print the
history of bw votes to check values coming from HW manager.
CRs-Fixed: 3039737
Change-Id: Ifc4df6bb7d4a3cf03715300e9edd1d3987df4a4c
Signed-off-by: Mukund Madhusudan Atre <matre@codeaurora.org>
Append workq name in workq delay detect API to identify
which workq is scheduled late. Create workq name macros for
cci and cpas to pass to workq delay detect API.
CRs-Fixed: 2994927
Change-Id: Iebc14520b918272e92b59c900de5fe17f38a2406
Signed-off-by: Sokchetra Eung <eung@codeaurora.org>
Use Kernel time to obtain the current time when IFE is acquired
/released and when sensor is streamed on/off. Convert the Ktime
to a timestamp format and log it in existing info prints. This
will help to co-relate timestamp between user-space and kernel
logs. The change also replaces the current usage of direct calls
to ktime_get_real_ts64 with macro across all drivers.
CRs-Fixed: 2987320
Change-Id: I87c4790164d222fc1ed6ff41ad00eeb1ed8c8867
Signed-off-by: Sokchetra Eung <eung@codeaurora.org>
This feature dynamically calculates priority lut low
values for real time write NIUs whenever there is a
change in real time bw vote on any of these NIUs and
write the registers.
CRs-Fixed: 2976535
Change-Id: I5a1433436da87915b20584d3002648699c985998
Signed-off-by: Pavan Kumar Chilamkurthi <pchilamk@codeaurora.org>
Currently, camnoc buffer fill level register offsets are part
of cpas monitoring. Register offsets keep changing between
targets which would bring more conditionals. Make cpas monitoring
generic by moving register offsets to header. Also, the reg values
will be read in a buffer, and it can be controlled what offset
needs to be read, by changing status in header to be enable/disable.
Also, move camnoc fill level printing to CPAS for when we need only
buffer fill info.
CRs-Fixed: 2841729
Change-Id: I05425b4466d33dbef80eb8a0a1b5e974a6965600
Signed-off-by: Mukund Madhusudan Atre <matre@codeaurora.org>
Add support for using system cache for SFE WMs and RMs
in case of sHDR use-cases for power saving. Also add
debugfs capability to control this feature.
CRs-Fixed: 2841729
Change-Id: Ic4dad50e8c396705b33bb0bc8330d25e51ca79a2
Signed-off-by: Karthik Anantha Ram <kartanan@codeaurora.org>
The camnoc max needed flag is stored for each tree node and
parsed once per level. Fix parsing of camnoc max needed flag.
Improve cpas logging. Part of this change fixes issue introduced
in: commit d099238a67 ("msm: camera: cpas: Update bus node
level parsing logic").
CRs-Fixed: 2841729
Change-Id: I55ff2265ee1491535f3e39e16920129e8dffc15a
Signed-off-by: Mukund Madhusudan Atre <matre@codeaurora.org>
Qchannel interface is used to ensure camnoc is idle. This needs
to be check before camera core power collapse and after camera core
power on sequence to make sure camera hw blocks are in proper state.
CRs-Fixed: 2847646
Change-Id: If9dbd980c2e8e983ac973f91e3d1ed132719c395
Signed-off-by: Alok Chauhan <alokc@codeaurora.org>
Kernel 5.10 and up have renamed kzfree to kfree_secure. As such,
we have added a cam_free_clear function to redirect all uses of kzfree
uses to the appropriate function depending on the kernel version the
driver is built against.
CRs-Fixed: 2835738
Change-Id: I72d191c9fb0454a4dbb1392894a909e81fe07caa
Signed-off-by: Karthik Jayakumar <kjayakum@codeaurora.org>
1. Add more triggers to save cpas state info. IFE EOF, ReqBufDone
2. Save camnoc fill levels in each cpas log state
3. Print camnoc QoS settings in cpas state dump for debug
purpose. Though these are static settings, printing will
help in making sure correct settings are applied.
CRs-Fixed: 2814346
Change-Id: Ic3018c5f7fdeaac3a123c6d046eb5e6a34a675e7
Signed-off-by: Pavan Kumar Chilamkurthi <pchilamk@codeaurora.org>
