Commit Graph

5 次程式碼提交

作者 SHA1 備註 提交日期
Prasad Kumpatla
23853e3c76 asoc: wsa884x: update INTR_CLEAR0/1 register to volatile
In PDR cases INTR_CLEAR registers values are not updating
properly while doing reg_cache in recover from PDR. So add
these registers as volatile to get the exact HW values.

When these registe values are properly updated the FSM_PA
status is reseting properly and working.

Change-Id: I8fa7b01b3256ec8f01edc3fe48a519accfff9638
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
2023-04-28 10:46:38 +05:30
Matthew Rice
f21b04af12 asoc: codecs: Fix WSA884X init and playback reg writes
Fix isense/vsense gain tables to correct values.
Mark ana_wo_ctl registers as volatile.
Move VBAT_THRM_FLT_CTL to init reg sequence.

Change-Id: Ie04f302719f08b35f1ef9807dff7993c31e3aa43
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2021-12-09 09:09:12 -08:00
Meng Wang
0bd4c39e4e asoc: codec: enable use_single_read for wsa and wcd regmap
When interrupts are triggered on the second or third interrupt
status register, current logic cannot clear that interrupt status
after handling it. Enable use_single_read for wsa and wcd regmap
to resolve the issue.

Change-Id: Ieac57e169505d4455dde1dcd0e80e222e3e8eb1e
Signed-off-by: Meng Wang <quic_mengw@quicinc.com>
2021-12-07 09:15:42 -08:00
Matthew Rice
cdcdcac0df asoc: codecs: Update register initialization sequence
Add latest register sequence.
Remove version 1_2.
Update header files with latest registers.

Change-Id: I92f56e5ec2be4e695d42cec8610b9b9300410b02
Signed-off-by: Matthew Rice <mrice@codeaurora.org>
2021-10-28 16:52:38 -07:00
Junkai Cai
179ce4f13f asoc: codecs: Implement codec driver for WSA884X
Driver implementation for WSA884X.
Use new script to generate register files.
Modify register naming convention.
Add wsa884x-reg-masks.h and wsa884x-reg-shifts.h
Reverting copyrights to 2019 for wsa884x.h file

Change-Id: Ic3652d6138a2f62ba59a36d4307c732ab6e8db89
Signed-off-by: Shazmaan Ali <shazmaan@codeaurora.org>
2021-10-28 16:52:18 -07:00