Reinitialize video_comp completion variable before using it again
to wait for interrupt.
Change-Id: Ifc105eaa758d85ef604a440b3be7adfdafe7fc0f
Signed-off-by: Rajat Gupta <rajatgu@codeaurora.org>
Skip link training when in simulation mode considering that we
are not yet implementing tests specific to link training. This
change will reduce the time it takes to power on the panel in
simulation mode, and also reduce the likelihood of failures
caused by unresponsive host machines.
Change-Id: Ie215cafd545bb25b4a033ceae1f275c690e7433d
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
This change adds more debug logs and event logs to MST callflows
to help with MST stability issues.
Change-Id: I9053eab5932487fccce522cc17ed2e9fb8d887ab
Signed-off-by: Rajkumar Subbiah <rsubbia@codeaurora.org>
While running DP simulation script for stability and the rare
occasions when link clock fails to enable, the ctrl power_on
flag is wrongly set indicating the link is powered on. This
flag is used in the ctrl sub-module to check that the link
clock is on before accessing the registers powered by the
link clock. When this flag is wrongly set, the link registers
are accessed while processing the cable disconnect to cause a
NOC error.
The change will ensure the power_on flag is set when the link
clock is on so that the access to registers in the link clock
domain can be correctly filtered by the power_on flag.
Change-Id: I40af054a5738172f5ea86079a9258518f8fdd44e
Signed-off-by: Sankeerth Billakanti <sbillaka@codeaurora.org>
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
Exit stream enable on cable disconnect considering that the
controller and display modules would have transitioned to aborted
state. It is possible that the disconnect might have prevented
the link clock from being enabled, so we have to skip any register
programming in the link clock domain. We remove the unprepare
call from the DRM wrapper error handling since that path can lead
to unclocked register access when the link clock is not enabled.
Change-Id: I92595c0824193df63c2746bc8cd644f59c33604a
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
During resume, DP uses AUX to perform various functionalities
like DPCD/EDID read or link training etc. This involves other
hardware modules as well like USB and Charger. In a situation
like continuous suspend/resume, while DP is processing resume,
suspend can trigger resulting in dependent hardware modules
to go to sleep. As AUX communication is hardware interrupt
based, this can result in unstable system.
Abort all functionalities before going to suspend to
avoid unnecessary AUX and other functionality failures.
Change-Id: Id52d408270232adf7258a7eb064ee969eba4be71
Signed-off-by: Sankeerth Billakanti <sbillaka@codeaurora.org>
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
As overall display driver is moving away from hard-coded compression
ratios, prepare the DP driver for the same by removing the usage of
the compression ratio enum.
Change-Id: I298db7d20baed8afec9f96dff8c7e950702bfec9
Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
This change enforces dp, dsi and the sde drivers to use the
drm framework defined dsc_config data structure. As a part of this,
it introduces the sde_dsc_helper API to configure the dsc params
and creating a PPS command. Earlier each driver implemented it's
private versions leading to duplication of code. Additionaly the
helper api supports DSC spec 1.2 422 and 420 mode.
Change-Id: I25933fab08cdabbc6787079926885d1a78945e97
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
When doing multiple immediate plug-unplug, the DP display
driver is waiting for a link training to exhaust the retry
count before processing the disconnect request while flushing
the connect_work. The driver should stop link training and
exit if the link is disconnected. This change will use the
ctrl_aborted flag to early return from link training and
perform the host init/deinit and host ready/unready in pairs
while handling connect/disconnect to reset the abort flags
for the next connect.
Change-Id: If321136ecf12ab2f67d13ef841f1590142aad406
Signed-off-by: Sankeerth Billakanti <sbillaka@codeaurora.org>
Ensure that the driver is handling DSC and FEC
enablement properly. FEC can now be independently
enabled without DSC. FEC configuration is also
now performed after link training in order to
avoid link training failures as per the DP spec.
Consequently, DSC can now be left on during
compliance testing. For DSC use-cases, ensure
that the minimum supported bpp is set to 24, as
required by the DSC spec.
CRs-Fixed: 2517994
Change-Id: I40339585da5b4e51251a3be7119b6959954954d7
Signed-off-by: Fuad Hossain <fhossain@codeaurora.org>
Use one level lower test pattern in case the current
test pattern fails to train link. This helps with few
monitors which sometimes fail with a selected test
pattern. Instead of failing the link, try with a lower
test pattern.
CRs-Fixed: 2507729
Change-Id: I394253398f49b03084dc547dacaededa49a9c527
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
DP specification mandate test pattern #4 for CTS 1.4a. Add
support for the same in link training #2 as per specification.
CRs-Fixed: 2490128
Change-Id: I2f72fec340b56270e7fd1c2940adafe1068bab43
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Adding prefixes for error, debug and info
messages in dp files. To enable debug logs
run "echo 0x100 > /sys/module/drm/parameters/debug"
CRs-Fixed: 2493739
Change-Id: Ibf509e837f527be6bff6b7a1c34b0cde2921b388
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Break the host initialization and de-initialization to
create late initialization and early de-initialization.
Call host init/deinit on physical connect/disconnect only
As attention messages from sink doesn't change the physical
cable configurations, call only late init/early deinit in
this case to avoid unnecessary hardware resources
re-initialization.
CRs-Fixed: 2490128
Change-Id: Ib930d250724ab3ea811a7388c7ad0aeae1164e21
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Update the PLL and PHY power on and clock set sequence as per
the hardware recommendations. Move the post link clock phy enable
part to the catalog so that it can be programmed after enabling
link clock.
Change-Id: I9b3b49e5a9ac93bebcb1cb7da63b715a8d5ed85c
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Add support for new requirements in 1.4a CTS which need
to try link training 1 on different lane counts and link
rates.
CRs-Fixed: 2458753
Change-Id: I2039822f420a73232df7293afcddd7bee263c7b4
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Update the link training process along with the AUX
communications during link training as per hardware
recommendations.
Update the pre-emphasis and swing values for active
lanes only instead of all lanes.
During link training, update pre-emphasis and swing
values in hardware first and then update sink.
CRs-Fixed: 2458753
Change-Id: Ie05c9d6508b0c564b194032ae4ebb1bc5550e7b8
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Add support for lane count reduction as per the new requirements
for DP 1.4a during link training 2.
CRs-Fixed: 2458753
Change-Id: I58c9b6101338e8a1d1b4e3dec80f8fdf2a25ae5b
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Update the DP controller and PHY programming according to
the new hardware recommendations.
CRs-Fixed: 2458753
Change-Id: I1bce5915ba6ebbb250cc5c4aac907b0b287eece7
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
This change brings msm display driver including sde,
dp, dsi, rotator, dsi pll and dp pll from base 4.19 kernel
project. It is first source code snapshot from base kernel project.
Change-Id: Iec864c064ce5ea04e170f24414c728684002f284
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
