Historia zmian

Autor SHA1 Wiadomość Data
  qctecmdr acf755573d Merge "disp: msm: dsi: DSI PHY V4 support of dynamic clock switch" 6 lat temu
  Sankeerth Billakanti 31d659e7e7 disp: pll: changes to support lito dp clks 6 lat temu
  Yujun Zhang 01c0dad6ee disp: pll: add support for 10nm DSI PLL shadow clock 6 lat temu
  Narendra Muppalla 3709853456 Display drivers kernel project initial snapshot 6 lat temu