Commit Graph

167 Commits

Author SHA1 Message Date
Ananya Gupta
61b836202a qcacmn: Record data if pci write during suspended state
When FW was enabling WOW, a ring HP update interrupt is seen
which led to fw crash.
This change records any PCI writes that went through during
runtime suspend from host.

Change-Id: I3c44760ebaf49a131b483813522fe3e451957215
CRs-Fixed: 3280166
2022-09-12 10:15:32 -07:00
Shiva Krishna Pittala
527b0343a3 qcacmn: Fix hal_get_srng_ring_id() for Beryllium LMAC rings
For Beryllium LMAC rings, hal_get_srng_ring_id() provides the ring IDs
separately per each LMAC only if that LMAC ring is a destination ring
(This is done to use a common source ring for the DMAC rings).
But the ring IDs for LMAC source rings like DIR_BUF_RX_SRC_DMA_RING are not
being provided separately per LMAC. As a result, these ring IDs in
split-PHY mode are colliding for the 2 LMACs.
Fix this by doing the following.
 - Mark the DMAC common rings within the LMAC rings.
 - Provide ring ID separately per each LMAC if the ring is an LMAC ring
   but not a DMAC common ring.

Change-Id: Ifdae085b5784a03763abfc4edb42d94593e3ea21
CRs-Fixed: 3282702
2022-09-12 05:02:13 -07:00
Ruben Columbus
ced4c17614 qcacmn: add reo bit to enable reo qref in fw
set register WCSS_UMAC_REO_R0_MISC_CTL 6th bit to 1
to enable reo wref from fw side.

Change-Id: Ib8d4a2f6e7f598d45ba2b2c628ed6f3929fc3337
CRs-Fixed: 3273558
2022-09-03 04:44:51 -07:00
Pavankumar Nandeshwar
2f3e28c33c qcacmn: Configure registers for reo2ppe
Configure REO destination remap register and REO DST_INFO
register fot REO2PPE ring

Change-Id: I81cce807cde3babcfb265675ec758d33fc10214f
CRs-Fixed: 3274303
2022-08-26 07:31:54 -07:00
Pavankumar Nandeshwar
a615488cf4 qcacmn: Hal changes for Umac post reset at host
Hal layer changes to handle Umac post reset
and post reset complete events from firmware.

Change-Id: Ib25427930aab25650731c87b38e2ef7e47ae98d9
CRs-Fixed: 3267222
2022-08-21 00:37:53 -07:00
Pavankumar Nandeshwar
a839cac207 qcacmn: Datapath changes for umac prereset handling
Handle Umac prereset event from firmware.

Change-Id: I1d3d295468e97ebce5e7310055abc508e16e99b0
CRs-Fixed: 3174560
2022-08-11 15:23:13 -07:00
Sai Rupesh Chevuru
ceccc982e3 qcacmn: Get the peer meta data from msdu end tlv
In QCN9224 fetch the peer meta data from the msdu end tlv
instead of MPDU start

Change-Id: Icd9420cd83e06abe5e54e9e05cc8cbf8d8312ae1
CRs-Fixed: 3245626
2022-08-10 01:18:45 -07:00
Ruben Columbus
7a962c59e6 qcacmn: add new files for HAL v2
add hal v2 new files

Change-Id: I7728be33db7d28e44d04f19c99e8b9f47145f2e3
CRs-Fixed: 3249002
2022-08-01 19:41:18 -07:00
nobelj
09bc440ca9 qcacmn: Add support for tx monitor full buffer and minor fix
Add support and handle tx monitor full buffer payload and
other minior fix include change of name for uniformity.

Change-Id: If401ecd5e1c6263584fa7013df672459c883ca8b
CRs-Fixed: 3215244
2022-07-26 18:03:44 -07:00
Himanshu Batra
a2f709fa4f qcacmn: Change macro IPA_WDI3_RX_TWO_PIPES to IPA_WDI3_VLAN_SUPPORT
Change macro IPA_WDI3_RX_TWO_PIPES to IPA_WDI3_VLAN_SUPPORT to represent
the feature supported under this macro

Change-Id: Ie1e387d641052cd5690c63f0c1216f4852544605
CRs-Fixed: 3250264
2022-07-25 05:13:47 -07:00
Hariharan Ramanathan
16630d2422 qcacmn: Hal related changes for QCA5332
1. Changes to move hal_tx_config_rbm_mapping_be function from common to
device specific as it has ppe related snippets.
2. Changes to remove all PPE related codes in QCA5332 hal code.
3. Changes to correct macros according to fw_hrs.
4. Changes to move functions with device specific Macros to header files
so that it gets compiled with respective device's FW headers and gets
correct Macros

Change-Id: I479b406f318aa42d2b1032349aaf42d95b8c18e5
CRs-Fixed: 3235966
2022-07-25 02:03:09 -07:00
Himanshu Batra
7be2cf3775 qcacmn: Add support for vlan tagged traffic in IPA offload
In IPA offload, both tagged and untagged traffic cannot be handled with
a single rx pipe. Hence, add support for 2nd RX pipe for tagged and
untagged traffic respectively.

Change-Id: I77ff633327696f66df42fb592492321c1591646b
CRs-Fixed: 3226021
2022-07-21 11:02:34 -07:00
Rakesh Pillai
9ba8236444 qcacmn: Add support to track high watermark for SRNGs
Add support to track the high watermark for the number
of entries which are used at any given instant. This helps
in identifying if the ring size is sufficient or is being
full for certain use-cases.

Change-Id: Id3ffa52c653696699fbcfbb556a815d5f7908863
CRs-Fixed: 3235115
2022-07-11 03:59:38 -07:00
jinbliu
bb29a06aad qcacmn: Add hal API to get L3 type field
In some cases we need to classify frames accordinging
to l3 type. This change mainly focus on this issue.

Change-Id: I4bc49a808a02b4bc8c65f920690922045d65e739
CRs-Fixed: 3198481
2022-07-11 02:10:05 -07:00
Jinwei Chen
9d2b26795a qcacmn: add 11be TX/RX rate statistic support
Currently 11be msdu rate statistic is not supported yet.
Another issue is: HW reported pkt type value 6, while host
SW defined 11be type DOT11_BE (value 5), they are not matching.
DOT11_BE value 5 is referred in monitor mode and otherwhere,
so do map and conversion in host sw side.

Change-Id: Ic5c2dd2a35cbe0ecd6430f007b6e7e02ece40998
CRs-Fixed: 3230900
2022-07-05 03:19:03 -07:00
Shwetha G K
308079ab5e qcacmn: Fix invalid ring id issue when CFR is enabled
Direct DMA source ring type has two rings where ring0 is
used for Spectral and ring1 is used for CFR. The current
hal_srng_ring_id do not have the ring_id defined for CFR,
which leads to wrong ring_id populated for TX MON feature,
which collides with CFR ring.

Fix the same by defining ring_id for CFR.

CRs-Fixed: 3220401
Change-Id: I778cea533a1907ae6cd94f63734ca6c967891b9d
2022-06-16 11:52:50 -07:00
Shiva Sankar Gajula
5b5d4cb57a qcacmn: Handling MIC failures for QCN9224 target
For QCN9224 target, All the MIC failures are reported
as decrypt error from FW.

So, added changes to handle MIC failures for QCN9224
target .

Change-Id: I32e616e01e3cd6e76ef105d73fd8a87ce2c81cb9
CRs-Fixed: 3192749
2022-06-07 10:54:02 -07:00
Jinwei Chen
a3585f6fe8 qcacmn: Add sanity check for BA window size in DP
The original BA window size given from CP might > max DP supported,
add sanity check based on HAL target allowed.

Change-Id: Ibadaddeffe65165a89d580d8a5cbf5f7c724c809
CRs-Fixed: 3193852
2022-05-26 01:32:39 -07:00
Rakesh Pillai
68f96a8c79 qcacmn: Add support to send Shadow config v3
Shadow config v2 can support max of 36 shadow
registers only. For KIWI target, there are 40
shadow registers supported.

Hence add support to send shadow config v3
for KIWI.

Change-Id: If57e6597397da3e239f25a6c0cc24f8fd37dcdf1
CRs-Fixed: 3167758
2022-05-19 01:57:23 -07:00
sumedh baikady
52181cceb1 qcacmn: Fix Reo qref issues
1. Since peer id is reused for reconnection in MLO case,
old entries for queue desc addr is cleared. Clear the reo
internal storage and reset it back on client connection.

2. Send Qref feature WMI cmd to FW to enable the feature.

Change-Id: I6705ce121c8c25d9a2ace039dab21312fa5ea4b1
CRs-Fixed: 3156642
2022-04-12 06:31:36 -07:00
nobelj
9e0ab8e096 qcacmn: Add tx monitor flush/drop/truncated handling
Add support for tx monitor flush/drop/truncated handling
and few minor fixes from txmon

CRs-Fixed: 3158502
Change-Id: Ic13476984cd591a381941cfa1501307e9cca2b5a
2022-03-29 14:11:56 -07:00
Amit Mehta
d2199b7a99 qcacmn: Set default value for REO dest ctrl register
Currently in some case we are receiving non error packets on REO2TCL
ring, which is causing issue.

Fix is to set DEST_RING_MAPPING_0 to SW1 for REO dest ctrl
register, So that non error packets with reo_destination_indication
with 0x0 in the reo entrance ring will be routed to SW1 ring.

Change-Id: I67f78f35e7dba899943307902d99d0325a60498f
CRs-Fixed: 3150186
2022-03-17 07:25:12 -07:00
Neelansh Mittal
ea3efe6a60 qcacmn: Call HTT RxDMA and RxOLE PPE cfg API
Add a separate APIs to configure RxDMA and RXOLE
configuration to enable the PPE based routing.

Change-Id: I95b8fbb361402bc04fc1f38aa8b0dbc6f99f4f06
CRs-Fixed: 3147720
2022-03-15 00:11:19 -07:00
Jia Ding
d40b388d2f qcacmn: Mark first packet after wow wakeup
Add feature support to tag first packet that wakes up HOST from WoW.

rx_pkt_tlv.rx_msdu_end.reserved_1a field is used by TARGET to meet
such request.

Change-Id: I3d37e13e8cff49bc4f622d3070a19e4c4be56417
CRs-Fixed: 3137621
2022-03-03 07:22:05 -08:00
Neelansh Mittal
2c06a656a5 qcacmn: Add support for PPE
Add the PPE related DP APIs

Change-Id: I25aeff73fef21a7a8ad0f0e6e8aa6c537a233029
CRs-Fixed: 3045340
2022-02-28 11:33:37 -08:00
Pavankumar Nandeshwar
70bd47772e qcacmn: Sanity check for phy addr in cb against ring_desc
Check phy addr in cb against ring_desc for sanity
in wbm rx path

Change-Id: I40dd2949993129d1da548da45160f9eace094bff
2022-02-18 15:32:02 -08:00
nobelj
eb6d660139 qcacmn: Add HAL specific api to support tx monitor
Added HAL specific api to support tx monitor,
	1. to get buffer address
	2. get number of users
	3. get corresponding structure to handle tx monitor and
	4. parse limited TLV tag.

Change-Id: Ic354c76b3bcf5fa454db973c2aa4ee5f9c1b4208
2022-02-18 01:27:37 -08:00
Sumedh Baikady
e4d9b0c2d7 qcacmn: REO queue ref enhancement for Waikiki
In WIN BE chipsets, replace the REO tid
queue programming in FW via WMI with writing to a
Host managed table shared by HW and SW. REO HW will
pick the tid queue address from the table indexed by
peer id and tid number.

Change-Id: I8107ca5116425538329b11ae3519f02b32573bac
2022-02-02 12:06:29 -08:00
nobelj
357bfbe52d qcacmn: Add support to Legacy tx monitor and Waikiki
Add function pointers to free buffer address stored in status buffer
and support tx monitor in legacy and Waikiki flow.

Change-Id: I28612d388009292ff751fe514183fb801909f485
2022-01-28 04:05:13 -08:00
Naga
902e67deb9 qcacmn: Fixes for wkk monitor bringup
Fixes for initial wkk monitor bringup in emulation.

Change-Id: Ic7b05b8822ef68daee7dd614fcac7a7de7b9b3fa
CRs-Fixed: 3087563
2022-01-10 22:14:01 -08:00
Naga
7798784bc5 qcacmn: Fixes for compilation issues
- Fixes for compilation issues after enabling
  monitor 2.0 support.
- change copyright year for all files in the chain.

Change-Id: I885e257bd8ca83850656d8a1f408c1bc34920d7a
CRs-Fixed: 3086483
2022-01-10 06:24:34 -08:00
sandhu
ad2829718c qcacmn: Remove IP from files
remove IP from code

Change-Id: If119a4af213b10aadb9f1344e50b0342e72405c2
CRs-Fixed: 3073864
2021-12-29 04:28:58 -08:00
Kai Chen
d93357ef5d qcacmn: Move CCE and flow hal implementation to per chip
Move CCE and flow hal implementation to per chip hal layer.

Change-Id: I95a37d8bab00cdecfd6e8ae9a724b8c5541b336e
2021-12-21 11:41:42 -08:00
Ananya Gupta
e5a33cd5b6 qcacmn: Fix reo reinjection path
Add 2 hal soc ops, hal_msdu_desc_info_set and
hal_mpdu_desc_info_se for berilliyum datapath.
Attach hal_rx_msdu_ext_desc_info_get_ptr_be to its function
pointer.
Get reo queue descriptor address as a 5 byte value as in
beryllium datapath it is being obtained from rx packet tlv.

Change-Id: Ia58597384e1a3d5eec493b865a88bab4f209502d
CRs-Fixed: 3084532
2021-12-14 21:22:54 -08:00
Harsh Kumar Bijlani
6c7fcf1d61 qcacmn: Add logic for allocation and reset of vdev_stats_id
In BE architecture, HW provides basic vdev stats support for upto
48 vdevs. For each vdev, there is vdev_stats_id which represents the
id of this vdev on HW. This vdev_stats_id is assigned by host and
is conveyed to HW at the time of REO TID Queue setup for the peer.

Add logic for allocation and deallocation of vdev_stats_id and
convey this id to HW.

Change-Id: If5611bf54d057ccf71c6444b5c79a26eb28df87e
CRs-Fixed: 3067843
2021-11-30 00:57:49 -08:00
Chaithanya Garrepalli
c42af1f62f qcacmn: Rx path changes for multichip MLO
Rx patch changes for multichip MLO

1. Create ini for rx ring mask for each chip
2. Configure hash based routing for each chip based
   on lmac_peer_id_msb
3. Peer setup changes to configure lmac_peer_id_msb
   to enable hash based routing
4. Rx Replenish changes to provide buffers back to owner
   SOC of reo ring

Change-Id: Ibbe6e81f9e62d88d9bb289a082dd14b4362252c4
2021-11-23 19:28:20 -08:00
Chaithanya Garrepalli
70398a0ccd qcacmn: Changes needed for MLO soc attach
Changes needed for MLO soc attach to pass chip_id,
dp_ml_context from upper layer.

This change also takes care of assigning appropriate
RBM id for IDLE link descriptors based on chip_id.

Change-Id: I8f5f08c524d91942e6e458f048700b7bdd900107
2021-11-23 03:55:36 -08:00
Tallapragada Kalyan
e3c327a0ba qcacmn: do a batch invalidation of REO descriptors
Added an API to do a batch invalidation of REO descs
saw an improvement of 40 to 45 Mbps.
Note: this change is applicable only for cached
descriptors

PINE with Default driver: 3189 @ 100% core-3
PINE with skb prefetch: 3469 @ 100% core-3
PINE with skb pre + batch inv: 3506 @ 100% core-3
Change-Id: Ic2cf294972acfe5765448a18bed7e903562836c3
2021-11-22 13:36:28 -08:00
Chaithanya Garrepalli
41fda10bc5 qcacmn: In WBM err process read peer_id from peer_meta_data
In WBM error processing read peer_id from peer_meta_data
instead of sw_peer_id.

This changes is needed because we need to process Rx packet
on ML peer. But in MLO case sw_peer_id field contains
link_peer_id where as peer_meta_data has ml_peer_id.

Change-Id: I3f469adfdf7efa88cb081e94fa9fe0c54c1fb078
2021-11-12 04:46:16 -08:00
Ananya Gupta
122bc19864 qcacmn: Fix REO reinjection path in hamilton DP
Add HAL APIs to fix REO reinjection path in hamilton DP

Change-Id: I73c6ec0aeb2f6d4bc72b366e22e9bc826f852426
CRs-Fixed: 3058549
2021-10-27 07:05:06 -07:00
Vevek Venkatesan
7a2c2fd90f qcacmn: cleanup FEATURE_HAL_DELAYED_REG_WRITE_V2 support
This FEATURE_HAL_DELAYED_REG_WRITE_V2 was added to fix the
Audio jank issue, but it could not resolve it completely,
so that was later fixed by existing delayed reg write
support with the help of SMP2P messages to communicate
with FW regarding PCIe link status. This code is not being
used, so removing it and cleaning up the redundant code.

Change-Id: Iada088e72a76b4c071c8a80ee945f36ac959670e
CRs-Fixed: 3056475
2021-10-18 06:13:49 -07:00
Jingxiang Ge
37bf2d6b08 qcacmn: record cpu_id for hal_reg_write_work
Record cpu_id in hal_reg_write_work for easily debugging
work latency issue.

Change-Id: I819b9fe0977e9e982240c090f76a69532f149e86
CRs-Fixed: 3055639
2021-10-18 06:13:20 -07:00
Pavankumar Nandeshwar
2228afc5b4 qcacmn: Enable HW cookie conversion feature
Enable Hardware cookie conversion feature

Change-Id: I75299384ad7b795160b9cf04768326c74401b1ba
2021-08-16 23:14:14 -07:00
Chaithanya Garrepalli
0702aaf463 qcacmn: initialize PPE rings
Changes to initialize PPE rings based on ini
configuration

Change-Id: Id6a26b557c45fd78ae17675b0292424e979958ad
2021-08-13 12:04:22 -07:00
Chaithanya Garrepalli
7ccb73b31f qcacmn: Add support for beryllium on WIN
Add support for split between lithium and beryllium
HAL files.
Add Wkk TLV support.

Change-Id: I7135e4061a4c3605d76c70c33320cbd533ea0c62
2021-08-13 12:04:12 -07:00
Vevek Venkatesan
f49df07dae qcacmn: add support to clear the consumed HW descriptors
Add support to clear/reset the consumed HW descriptors
to zero.

Change-Id: Idccb120afa448c4f958a3177f27cab9b1197ac3e
CRs-Fixed: 2978850
2021-07-02 07:24:54 -07:00
Rakesh Pillai
5d44eac10a qcacmn: Enable PN check for 2K-jump and OOR frames
Currently the EAPOL/ARP/DHCP frames arriving as 2K-jump
or out-of-order frmaes are being delivered to the network
stack, without checking for the packet-number sequence.

WCN7850 has hardware support to provide the packet number
of the previous successful re-ordered packet from hardware.
Use this feature to check if the packet-number are in proper
sequence for these EAPOL/ARP/DHCP packets arriving as 2k-jump
or out-of-order packets before submitting it to the network
stack.

Change-Id: I1078452afce4bc00b2509436295e5bd80000feb4
CRs-Fixed: 2965086
2021-06-30 13:48:31 -07:00
Rakesh Pillai
47af4d320f qcacmn: Move to index based assignment for srng register offset
Currently the hardware srng register offset is statically
assigned to the handle. This can lead to incorrect index access
when targets (eg: wcn7850) is added which require additional
register offsets to be stored in the hw srng register offset table.

Move to the index based assignment of the srng register offset.

Change-Id: I8e38bdd0c28068029a0267fce706edf4378b9df8
CRs-Fixed: 2965081
2021-06-30 13:47:57 -07:00
Rakesh Pillai
37e2c6d9ed qcacmn: Register IRQ for near full irq
WCN7850 has support for near full indication for
the consumer srngs. This interrupt is used to take
preventive actions to avoid ring full watchdog irq
trigger.

Register for the near full irq and add the necessary
ext groups for these near-full irqs.

Change-Id: Ic16381fceabc54e6c52b34dd13abea74cad4d38c
CRs-Fixed: 2965081
2021-06-30 13:47:51 -07:00
Rakesh Pillai
1104d6d5a7 qcacmn: Delay 50us when update same shadow reg
Add 50us delay if srng's shadow reg write again within 5us.

Change-Id: I8d48496814e063ebd441db3520e3a5406c5db13e
CRs-Fixed: 2965371
2021-06-24 22:25:21 -07:00