This reverts commit 65f3cc37a4.
This change breaks TUI use-cases by allowing CMD engine to be
disabled on trusted VM without primary VM having knowledge of
this HW update.
Change-Id: Ieb67dc841299a149e9f1028fd8f98bd857f1f711
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
For batched commands, prepare resources at the start of the command packet and not for the
command with LAST_COMMAND flag set.
Change-Id: Ibbb0d1d1acd4ddeebd07bf9dd6ea1a949edd8d02
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
In cases of continuous splash, when command engine is
enabled/disabled as part of commands that are sent before
continuous splash config is called the HW op will disable the
command engine by the end of the command transfer. As part of
continuous splash handoff, the command engine enable call skips
the hardware operation to actually set the CMD_ENGINE_EN bit
as it is guarded by the skip op flag.
With the current change, we allow the HW op to take place, despite
continuous splash being enabled. This way, the HW will always maintain
the correct state pre and post continuous splash handoff.
Change-Id: Id32ebf6f0d7eac46c118b701c138fcf6b9b10318
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Clock lane can enter ino ULPS mode only in DPHY mode. For
CPHY, did not need to check the clock lane status for ULPS.
Change-Id: Iceddd8064ec75ce26613469cfb1bde36e883f865
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
Removes files and version checks for unsupported DSI Controller
HW versions.
Change-Id: Ic0acd34959ddfcf2db79102857e15f4e06da1d3a
Signed-off-by: Michael Ru <mru@codeaurora.org>
Fix out of bounds access that occurs when reading dsi
commands with custom non 4 bytes aligned payload.
When misaligned, the code is overfetching data due
to 32 bits reading constraint. This creates an offset
in receiving buffer. Using a local copy buffer large
enough to hold the extra bytes fixes the issue.
Change-Id: Ia0ee791d2e87639edd58191cfd5cb6f8f825f8c8
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
When Broadcast is enabled, DMA_DONE bit gets set for slave
controller on command transfer completion but it is not
getting cleared. Due to this, DMA transfer failures on slave
controller are not getting caught. This patch add supports for
clearing DMA_DONE for slave controller on every successful
transfer. This also prints error if transfer fails on slave
controller.
Change-Id: I61ce7b2d8be323adc70d888b5a2416afd9ae9fac
Signed-off-by: Harigovindan P <harigovi@codeaurora.org>
To transfer a command on the DSI lanes, the following programming needs
to happen prior and post a command transfer:
- Vote/Unvote for clocks
- Enable/Disable command engine
- Mask/Unmask overflow and underflow errors.
These operations are done from the display context currently. This can
lead to issues during an ASYNC command wait, where in we queue the
dma_wait_for_done rather than wait in the same display thread.
The following change adds new DSI controller API that does the above
programming from the controller context. This way, post command transfer
operations can only happen once command is successfully transferred and
dma_wait_for_done completes.
Change-Id: I61db0d8a2656dc6e0e56864dbef01283b813d7c6
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Update the dump_mem pointer offset while storing the debugbus
data for the second DSI to avoid overwriting to same memory.
As part of the change, register the DSI ctrl with sde_dbg from
ctrl_init directly, instead of debugfs_init to avoid code replication.
Change-Id: I4089f3038ffa89136eaea956d27270f638a99043
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
In dumping display registers, physical address will be appended after
each block name. This is to support register compare between kernel
and UEFI.
Change-Id: Ic20d3e2bd4c95aa7c71c4b646a149f7e83ad731a
Signed-off-by: Yu Wu <zwy@codeaurora.org>
The change adds a check for DSI controller and PHY resources during the
DSI display probe. The validation now only checks for the availabilty
of the resources without increasing the refcount of the controller or
PHY till an exact match is found after the device tree is parsed.
Change-Id: I96a5022a8ab5f55271e0df36675037b597e1ec85
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Change adds support for transferring commands to each sublink.
Change-Id: Iefc0dca7343325cdfe0cf48d41d50e6e2a13bc05
Signed-off-by: Vara Reddy <varar@codeaurora.org>
Change adds support for enabling splitlink sublinks video data swap.
Change-Id: I731b85a5e8fe8638005433819957dd0658f72963
Signed-off-by: Vara Reddy <varar@codeaurora.org>
Currently, SDE_DBG_DUMP takes any number of hw block names along with
few defined strings as arguments. This set of arguments is used to
determine which HW block registers needs to be dumped. Move to a
blk bitmask to avoid passing a large set of arguments. The bitmask is
split based on the clks required to access the HW block for ease of use.
The lower 0-23 bits are used for HW blocks which can be accessed by just
enabling the MDP clks. DP is kept separate as it needs DP specific
clks to be enabled. Add a debugfs node through which the mask can be
modified, which can be useful while using the debugfs dump option to
force a panic.
As part of the change, remove in-log/in-mem enable mask debugfs node
for every debugbus and use a single node to control the logging
mechanism for all the HW blocks debugbus.
Change-Id: Ibb6354b3e3265c9911104bb0f964616eb8a898c9
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Change rounds up the calculated byte clock rate to the nearest
even number.
Change-Id: Iea6d3121343f1b2cb6d0a06cd47a84b050d55ac1
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
For DPHY, DSI byte clock is used to derive the byte interface clock through
a DIV_2 divider. While setting the rate for byte interface clock, if the byte
clock rate is odd the recalculation of byte interface clock will fail. This
can further lead to recalculation of byte clock and result in unexpected
value for byte clock. The change ensures that for DPHY, the byte clock rate is
always even to avoid such issues.
Change-Id: I0a0371af75e5819ed1283b52b4681e70f55d66e0
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
HW recommendation is to park the DSI byte clock and pixel clock at XO
before turning them off. The change parses XO from the DT and sets the
clock source as XO while turning off the PLL.
Change-Id: I788951d6341149300e80e8db4a5a3fd2c4eb3e03
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Change adds the new compatible version strings for DSI PHY and DSI CTRL
for waipio.
Change-Id: I1073034e608cace9d41cc04a9854f15f56828dfe
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Change removes the use of custom MSM DSI flags that will not be
available as part of GKI.2.0
Change-Id: I2337a54b1d6346ebdc18e9e6c3c8e7a07f421bdd
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
This change enables the DMA CMD scheduling as default for
video mode panels.
In video mode panel, if the DMA is triggered very close to
the beginning of the active window and the DMA transfer
happens in the last line of VBP, then the HW state will
stay in ‘wait’ and return to ‘idle’ in the first line of VFP.
But somewhere in the middle of the active window, if SW
disables DSI command mode engine while the HW is still
waiting and re-enable after timing engine is OFF. So the
HW never ‘sees’ another vblank line and hence it gets
stuck in the ‘wait’ state.
Scheduling the DMA cmd to the first line in VFP fixes
this issue.
Change-Id: If9e5bd1923c012f10dee50c791a2b2b001d97553
Signed-off-by: Rajeev Nandan <rajeevny@codeaurora.org>
As per the HW requirements it is highly recommended to use DMA start
window to trigger broadcast commands. If not used then it can
result in a hardware hang with the DSI controllers going out
of sync. This behavior is even more prominent in cases of higher
refresh rates. As part of the change we change the default DMA
scheduling behavior to default to maximum possible DMA window
in case it is not specified in the panel device tree.
Change-Id: Ied4df9063664cedbc18ce009054d4e5ecae30ab2
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
when a broadcast DSI command is scheduled, the command can get
triggered close to the schedule line. This might cause DMA
timeout. This change reads the video line count from
MDP_INTF_LINE_COUNT register and checks whether DMA trigger
happens close to the schedule line. If it is not close to the
schedule line, then DMA command transfer is triggered.
Change-Id: Ida92e63e46b4cc703d57ce24097834f810776aa8
Signed-off-by: Harigovindan P <harigovi@codeaurora.org>
Currently, mdp_intf_line_count and mdp_intf_tear_line_count register
addresses are defined in dsi_ctrl_hw for debug feature. But mdp_intf
base address is target specific and independent of dsi controller
version. This change adds support for parsing the mdp intf base
address from dt, thereby remapping using base + offset addressing.
Change-Id: Ibb72dfe84a786a5c8b95f6a400e8333f6b46814a
Signed-off-by: Lipsa Rout <lrout@codeaurora.org>
This change adds dsi display ramdump support when DEBUG_FS
is not enabled.
Change-Id: Ic6659a9380acd5eb55a3270d3e3b7016a9cd2bd7
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
During ESD check failure, DSI video engine can get stuck
sending data from display engine. In use cases where GDSC
toggle does not happen like DP MST connected or secure video
playback, display does not recover back after ESD failure.
This change adds support to perform soft reset when DSI
video engine gets stuck.
Change-Id: I9cb31e6c71c4da171f9fe22fc3bee9175711831d
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
The change batches DSI commands sent using the debugfs node, in a
separate buffer from the TX command buffer to ensure that they are not
triggered before the last command bit is set. Once the last command
bit is set the buffer is then copied to the DSI TX buffer and triggered.
Change-Id: I9ba624e4e19341696a974994817603315c6c8a45
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Currently,power resource disable fails when pm_runtime_put_sync
returns negative values. Due to this, clock state update is
failing. pm_runtime_put_sync can return negative values in
scenarios where pending resume requests take precedence over
suspends. This change allows pm_runtime_put_sync to return
negative vales also.
Change-Id: I1a46ca574129ba953ddb6300f9b3ab24cdb3171e
Signed-off-by: Lipsa Rout <lrout@codeaurora.org>
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
Currently, power_state variable does not reflect the GDSC
status. Due to this, there are scenarios where ctrl_power_on
is not happening leading to clock failures. This change
updates power_state based on current status of all the
regulators. GDSC enable is moved to pre_clkon and GDSC
disable is moved to post_clkoff.
Change-Id: I6d9508d5dffda0c94bd3b3bd9b5feb4724dc9dc7
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
[cohens@codeaurora.org: fixed static analysis error]
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
Currently, for Dual DSI Broadcast command, Overflow error
is masked only for master controller. This changes add
support to mask overflow error for slave controller as well.
Change-Id: Ida73c4166e996fcf2c8c936d0c76d0a89a220d89
Signed-off-by: Harigovindan P <harigovi@codeaurora.org>
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
As per DSI HPG, Soft reset is not required to disable
video mode operation for version 1.3.0 and later. So,
add check to skip it during display disable.
Change-Id: If6d263bdf22f8a6fbef76d78d04bb9d11be05945
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
The change adds register mapping of MDP_INTF_[1/2]_TEAR_INT_COUNT_VAL
register to DSI controller. This allows for the controller to read the
line count and frame count of the read pointer during trigger and
successful transfer of DMA command.
To enable the debug feature:
echo 1 > /d/<panel_name>/dsi-ctrl-0/enable_cmd_dma_stats.
To disable the debug feature
echo 0 > /d/<panel_name>/dsi-ctrl-0/enable_cmd_dma_stats.
To read line count value:
cat /d/<panel_name>/dsi-ctrl-0/cmd_dma_stats.
Change-Id: I5cdeb54ca941af05b226a9d7ab332b899ecc5797
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
The change allows for configuring a command DMA window during which
the command is triggered. The DMA window must not intersect with the
MDP tear check window. Once the command transfer is successful, the
trigger control needs to reset to the default DMA trigger specified
by the panel.
Change-Id: I5485ca1f8e141ed92dc8c77c2daf579634271022
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Creates a deep copy of a struct which previously was shallow.
Also adds null checks which prevent segmentation faults.
Change-Id: I9155f632736fdb30e31f28f55ebe92954956a82d
Signed-off-by: Orion Brody <obrody@codeaurora.org>
Add support to read register ranges and IRQ lines that needs
isolation during VM switch in dsi ctrl and dsi phy.
Register for VM resource collection event providing the
callback function.
Change-Id: I5eae4699b0a97ffed438627ccea855c401b3fbeb
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Display in trusted VM works in a handover mode i.e, all
display components need to be initialized by the primary VM
before switching to trusted VM on the usecase boundary.
That makes it a hard requirement for the trusted VM not to
re-program any of the display configuration registers before
it could hand the HW back to the primary VM.
Also, most of the linux framework drivers including pintrl, clocks
are not enabled in the trusted VM.
In order to address the above two limitations and to control the
probe/commit sequences, this change adapts the same path as that
of continuous splash to bypass some of the critical functions
which are identified to be HW intrusive. Based on the DT property
read from SDE handle, dsi drivers will choose to bypass
enable/disable HW state updates when executing in the vm environment.
Change-Id: Ica71c924d189ab65fe3be5b0ac870633e3b749e1
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Lots of dsi FIFO error logs were printed into serial in
dsi ISR. It will make device stuck or deadlock. Remove
these logs from dsi ISR, and enable the log in FIFO error
workqueue handler.
Change-Id: I0e9b2312cb76d345ec5a9b9628c52b47d5163fde
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
Add support to read cphy boolean flag from panel dtsi
and configure DSI PHY registers accordingly. Update the
bit/byte clock calculation according to cphy specifications.
Update clock parents so that the relevant divider blocks
are configured to support cphy.
Change-Id: Iaca61eec01a488657b086f59910c52f8c79e26a4
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
Add support to allow creation of debugfs node only if
CONFIG_DEBUG_FS is enabled.
Change-Id: I1ae2c4188a99e3ed88f59fc021efc01407bf942d
Signed-off-by: Harigovindan P <harigovi@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
DSI interrupt may be destroyed before it is disabled, it will cause to
the interrupt count can't be cleared, so subtrace DSI interrupt count
in disable function even it was destroyed.
Change-Id: I430b0281957db588c7405d5775d0c10f2f498b36
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
This change fixes the usecase where dsi msg flags validated only
during command transfer. This fix maintains the flags between
transfer and trigger calls. It also adds a new async override
flag to be used to bypass validate function.
Change-Id: Ie12acd3d7b01099bba65ca37cec61091408b81c5
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
