Enable the 4th Tx. completion ring to save CPU load
Initialization and interrupt handling for 4th completion ring
is done here.
Change-Id: I2db27218a3c3e14d719d012f03454a6a7aa647fe
User can specify a limit and frames are dropped when the memory
used by packets in the queues goes beyond the limit. This is a
SoC level param.
Change-Id: Id2bd9caaa11d9ea9f9e04c635ff629190bb62916
Add the PPE Tx HAL data structures. Also add
dummy functions for reo2ppe and ppe2tcl rings
intializations.
Change-Id: I31fa61a728535c32ea3678407da8ae39f0d9f48d
For WCN7850, the first mac (i.e.. MAC0) is capable of
2G/5G and 6G data transfer. Hence initialize and use
only on RXDMA monitor status ring.
Change-Id: Idb6e23a887a9ed32a52dd54765e5ed3c6a12df06
CRs-Fixed: 3094138
WCN7850 has only one RXDMA DST ring, as opposed to other
lithium family chipsets, which had 2 RXDMA DST ring.
Refactor the code to pick the number of rxdma destination
rings from CFG context.
Change-Id: I20d475c02690043e969bc7a78605809b8c6814ae
CRs-Fixed: 3084440
Use chip ID and destination peer to determine the target soc
and partner vdev for Intra-BSS in MLO case.
Change-Id: I709c52e74426c5e81b50c8063cad7669c0e7002d
Offsets used by host for HTT stats are not aligned as per the
structure declaration given in file htt.h .
Make change to use the correct offsets to get the correct stats.
Also make change for byte count computation.
Also make cleanup changes for FR65817.
Change-Id: I8bc6164cc4994c49536d7277779f25b258be1592
CRs-Fixed: 3082742
Add configuration at SOC level for hw vdev stats in BE architecture.
Following config parameters are added:
vdev_stats_hw_offload: option to enable/disable hw vdev stats
hw_vdev_stats_timer: timer duration for hw vdev stats
Change-Id: I8cbd2b6a7378d8a9e7de920a3a6fdff0cf7785fe
CRs-Fixed: 3067843
In case of WIN hal_soc will be freed in wifi down
path, this pointer is not valid at pdev_detach or
soc_detach.
Change to populate dmac source ring flag to dp_soc
as access is needed at pdev_detach or soc_detach
Change-Id: I628746bdd05ba3791d3d0e6b6dfdf160ed368e9a
Rx patch changes for multichip MLO
1. Create ini for rx ring mask for each chip
2. Configure hash based routing for each chip based
on lmac_peer_id_msb
3. Peer setup changes to configure lmac_peer_id_msb
to enable hash based routing
4. Rx Replenish changes to provide buffers back to owner
SOC of reo ring
Change-Id: Ibbe6e81f9e62d88d9bb289a082dd14b4362252c4
This force use BA64 ini config is no longer needed, because another
gRxAggregationSize can do the same settings and more flexible.
Change is used to remove this config.
Change-Id: Ie780489849f8b701481a628a9bca2b4112460bd8
CRs-Fixed: 3076982
Dynamic GRO feature is enabled by default and aimed for specific
customers. Add an ini control to allow other customers to config
this feature enable/disable.
Change-Id: I7f505599327ac131b3cdac9b4d9e038861b1aeb6
CRs-Fixed: 3074689
This change includes below
1) Changes needed to increase Tx rings to 4
2) Use WBM2SW4 ring for rx error in QCN9224
3) memset srng at alloc to avoid populating RBM_id
in per packet path and enable implicit RBM
Change-Id: Icbd5ac2378273b8f3c6adc41c611e29551fff22f
Currently the IRQ mask for tx completion near full
interrupt is not in sync with the tx completion rings
which are enabled for WCN7850.
Fix the mask for tx completion near full interrupt.
Change-Id: I1432191b260094060873406d48e04fde5b7bc35e
CRs-Fixed: 3052650
Currently, rx packet capture events processing happens even
when feature is disabled by ini. This incurs per packet overhead
in rx path.
The fix is to move all the processing from rx path to packet capture mode
component. Send only wdi event from rx path, when feature is enabled by
ini.
Change-Id: I647256b85117cd3373950c78a5a0ae7d6710e4e2
CRs-Fixed: 2969123
Add support configure ipa tx ring and tx completion ring for
2.4G and/or 5G separately.
Change-Id: Iafb8fa589ff0cce15609a3dfa2209364291d7cef
CRs-Fixed: 2996604
The following configurations are changed
- Change numer of WBM2SWRELEASE rings from 7 to 8
- Use configurable RBM value when enqueuing packets for TX. This is needed
since WBM release ring numbers do not have an easy mapping to RBM values
for HMT1.0.
Change-Id: Idcf9e48e00b7039331fc1837bb1e900b12f19eb3
CRs-Fixed: 2984362
WCN7850 has support for near full indication for
the consumer srngs. This interrupt is used to take
preventive actions to avoid ring full watchdog irq
trigger.
Register for the near full irq and add the necessary
ext groups for these near-full irqs.
Change-Id: Ic16381fceabc54e6c52b34dd13abea74cad4d38c
CRs-Fixed: 2965081
Currently IPA tx buffers are fixed at 1007 buffers.
Adding INI support to change number of TX buffers at load time.
Change-Id: Ide0357554f34759198276b9699e0e6f4a3e20051
CRs-Fixed: 2957916
Provide multiple combinations to configure the msi interrupts
of DP and CE based on the number of MSIs available in the platform.
Number of MSIs used for CE and DP can be changed by modifying the
MSI assignment table in platform driver. Best possible mask for that
MSI is automatically chosen based on predetermined settings.
Change-Id: I02b44fb033631d69d97f2d8d2d3f698541d37aad
In existing implementation, for monitor mode below allocation
are done at pdev attach and init time.
a. 64 monitor buffer allocation for RxDMA monitor buffer ring
b. Link descriptor memory allocation for monitor link descriptor ring
This memory is waste of memory for customers not using monitor mode and
low memory profile.
To optimize this memory, allocate all buffers and link descriptor memory
at monitor vdev creation time.
Change-Id: I873c76d2f625a782532a101037915b0353928a5b
CRs-Fixed: 2829402
Some AP disables AMSDU in BA256 mode, this has draw back
with KPI in HE mode, so leave a config field to use 64 BA
forcibly to make high KPI with these types of AP
Change-Id: Ia69ffe118fd5bbda78cfb98126a483fcf305294e
CRs-Fixed: 2828304
This reverts commit Change-Id: I98f8f751dc75a3d6f2296f0844529e9c72c4090b.
This INI is moved to HDD_DP.
Change-Id: I451fa50621fdc8b6cbe027bdf1495788914481c9
CRs-Fixed: 2824623
Number of DP rings used in HOST mode and NSS offload mode differ
and in current scenario the rings are allocated unconditionally.
Allocate only required number of rings based on the HOST mode and
NSS Wi-Fi offload mode and based on the number of radios supported
per SOC.
CRs-Fixed: 2790504
Change-Id: I20ce1908da47c197ea3b406f8704b964f3d8f7d1
As monitor mode is not supported on LM256 profile,
disable rxdma1 functionality on same
Change-Id: I64e5de02d56801bfd46e32a6c64a1286e4d7ecb0
CRs-Fixed: 2819904
Add INI support to enable the feature of sending
ICMP packets to FW at regular intervals.
Change-Id: I888bb2f65e8a497c3e6541f213def905d6dd0727
CRs-Fixed: 2813169
Add a ini control field to control rx frame pending check
logic in WoW case. In some cases, power consumption is more
important than rx frame ping loss, so add a control flag
Change-Id: I8c4d3725edddb82a0f06dc70c22a8dd5243209f2
CRs-Fixed: 2806786
In addition to firmware capability, add INI param to decide FST
placement in CMEM.
Change-Id: Icc5fdfa49e35665b59efce3fc1f1855d84c16140
CRs-Fixed: 2778898
Enable data path polling mode based on INI
dp_poll_mode_enable. Configure all data path
interfacing rings (UMAC/LMAC) and Monitor rings
in polling mode when NSS offload is disabled.
By default, poll mode is disabled.
Change-Id: I0e51207042811f517a423eb7276e3f33c5313450
Add INI to modify the HW checksum capability advertisement.
Add hook to update enable/disable of HW checksum for vdev.
Change-Id: Idd0bad1d39c8411c7b4ef19483aa2c75a756791b
CRs-Fixed: 2732099
On some cases, dp_rx_thread can not handle nbufs in time,
then a large number of packets are pending in
rx_thread->nbuf_queue, which run out of system memory at
last and failed to malloc new buffers for refill buffer
ring, fw crash is encountered. To avoid this, drop RX
packets when the pending number becomes large.
Change-Id: I370ad983b185b6ecb28fa7c0b4820b8edc00c710
CRs-Fixed: 2737191
