提交線圖

16 次程式碼提交

作者 SHA1 備註 日期
Pavan Kumar Chilamkurthi
fa9be8c725 msm: camera: icp: Add fw uncached region support in icp smmu
Use fw_uncached region instead of secondary heap region. Pass
this region information to FW through CSR registers.
Allocate Qtlb, cmd_q, msg_q, dbg_q from fw_uncached region
instead of shared mem region. Allocate Sec heap also from
fw uncached region instead of its own dedicated region.

CRs-Fixed: 2722486
Change-Id: Ib88b2202ca1b610946c712fcca936b72d4eecd15
Signed-off-by: Pavan Kumar Chilamkurthi <pchilamk@codeaurora.org>
Signed-off-by: Karthik Anantha Ram <kartanan@codeaurora.org>
2021-01-20 17:13:30 -08:00
Camera Software Integration
131c340861 Merge "msm: camera: icp: Fix FW load sequence issues" into camera-kernel.lnx.5.0 2021-01-20 16:24:36 -08:00
Karthik Anantha Ram
923b5ea86c msm: camera: icp: Fix FW load sequence issues
Address and enhance ICP FW load sequence using
secure PIL.

CRs-Fixed: 2722486
Change-Id: I812915c001819d477fd315c46c46b7aaffdda5f2
Signed-off-by: Karthik Anantha Ram <kartanan@codeaurora.org>
2021-01-19 10:18:21 -08:00
Karthik Jayakumar
2c67e897da msm: camera: common: Add cam_free_clear to cam_compat
Kernel 5.10 and up have renamed kzfree to kfree_secure. As such,
we have added a cam_free_clear function to redirect all uses of kzfree
uses to the appropriate function depending on the kernel version the
driver is built against.

CRs-Fixed: 2835738
Change-Id: I72d191c9fb0454a4dbb1392894a909e81fe07caa
Signed-off-by: Karthik Jayakumar <kjayakum@codeaurora.org>
2021-01-15 08:55:04 -08:00
Fernando Pacheco
593ababe3a msm: camera: icp: Tidy up hfi queue dump
Two changes packed as one: refactor queue dump code and reformat
dump output. The first should be self-explanatory.

For the second, displaying one double word per line places an
unnecessary burden on the reader. We can balance the vertical
and horizontal space utilized for the dump by printing
four double words at a time.

Example:
word[0000]: 0x00000008 0x00010001 0x00000008 0x00010002
word[0004]: 0x00000014 0x00010003 0x00000001 0x00000008
word[0008]: 0x00000001 0x00000020 0x00010003 0x00000001
word[0012]: 0x00000009 0x00007083 0x0001620f 0x00007083
word[0016]: 0x0001620f 0x00000018 0x00010003 0x00000001
word[0020]: 0x00000005 0x00000001 0x00010000 0x00000010
word[0024]: 0x00010005 0x84f07c60 0xffffffd8 0x0000001c
word[0028]: 0x01010008 0x00000002 0x84f07c60 0xffffffd8
...

CRs-Fixed: 2805272
Change-Id: Ibc0ef955b5120ca2265cd1262fd91c124843dac0
Signed-off-by: Fernando Pacheco <fpacheco@codeaurora.org>
2020-10-26 11:33:19 -07:00
Fernando Pacheco
033864b04f msm: camera: icp: Fix potential deadlock scenario in cam_hfi_init
Make sure we perform the necessary unlock operations before we return
on an invalid HFI state.

CRs-Fixed: 2783934
Change-Id: I7c611fb98d245952f2f4e9a57dc5fcb249572a40
Signed-off-by: Fernando Pacheco <fpacheco@codeaurora.org>
2020-09-23 14:10:33 -07:00
Fernando Pacheco
f1d47bfd71 msm: camera: icp: Rename debugfs entries to be proc hw agnostic
Drop references to A5 within the debugfs entries so that they
may be reused with other processors.

CRs-Fixed: 2722486
Change-Id: I2680a98dd3d38906e616712da3d6e2835ebb9a85
Signed-off-by: Fernando Pacheco <fpacheco@codeaurora.org>
2020-09-15 16:36:30 -07:00
Fernando Pacheco
528d44a312 msm: camera: icp: Support processor-specific HFI register offsets
The HFI interface registers will have a different base address
on the LX7 processor. We can utilize the newly added HFI ops to
abstract the calculation of the address by kicking that info out
to the device interface. The HFI register definitions have been
tweaked to support offsets based on the calculated addresses.

CRs-Fixed: 2722486
Change-Id: I93b9b2827ec0820eaac6ee2e6a611363b96a3223
Signed-off-by: Fernando Pacheco <fpacheco@codeaurora.org>
2020-09-15 15:44:19 -07:00
Fernando Pacheco
f42f7b1e9a msm: camera: icp: Adapt HFI to processor specific irq management
The steps to enable and send interrupts will differ between processors.
Pull this logic out of the HFI and out to the devices, so that we can
adapt to the specific irq management of any processor.

CRs-Fixed: 2722486
Change-Id: I2a889b91ec13295aa14bb2b16252332482a1225a
Signed-off-by: Fernando Pacheco <fpacheco@codeaurora.org>
2020-09-03 15:44:15 -07:00
Fernando Pacheco
ecd191e638 msm: camera: icp: Teach A5 to power resume/collapse via its hw_ops
The LX7 processor will require a new mechanism to resume/collapse.
Make the current mechanism transparent to the ICP HW manager in
preparation for the new proc. By going through the hw_ops we let
the device interface decide which mechanism to use.

CRs-Fixed: 2722486
Change-Id: I719314b3f505270a33892cb247082e43dad2e92d
Signed-off-by: Fernando Pacheco <fpacheco@codeaurora.org>
2020-08-26 16:50:43 -07:00
Fernando Pacheco
dcb4ee83be msm: camera: icp: Poll HFI init response using readl variant
The extra read seems to have been added due to an incorrect use
of readw_poll_timeout. The readw_poll_timeout was effectively acting
as a long delay before attempting the second read. Replacing the readw
with a readl results in correctly polling the register. We can safely
remove the extra read and simplify the polling logic.

CRs-Fixed: 2722486
Change-Id: I07269d601e64059ce7654563c379b5dc956895b3
Signed-off-by: Fernando Pacheco <fpacheco@codeaurora.org>
2020-07-10 14:35:53 -07:00
Trishansh Bhardwaj
172d34b6f7 msm: camera: common: Merge camera-kernel.3.1 changes in camera-kernel.4.0
msm: camera: tfe: Fix variable initialization issues
msm: camera: isp: Dual tfe event check with proper hw idx
msm: camera: smmu: Add support for non-contiguous mermory region
msm: camera: smmu: Use iommu best match algo for camera
msm: camera: ope: Optimize allocation of IO configuration
msm: camera: ope: Fix for KW Issues
msm: camera: ope: Add support for stripe level height configuration
msm: camera: tfe: Enable the delay line clc
msm: camera: ope: Fix false alarm for OPE HW timeout
msm: camera: tfe: Support register dump per request
msm: camera: ope: Increase max number of stripes
msm: camera: ope: Change packer and unpacker format in case NV12
msm: camera: tfe: Add packet code get command for tfe
msm: camera: ope: Trigger recovery in case of violation on write bus
msm: camera: ope: Protect ope hw reset with mutex
msm: camera: ope: Add a check for valid request in cdm callback
msm: camera: ope: Remove the BW & clock vote in release context
msm: camera: ope: Reduce OPE BUS memory
msm: camera: ope: Fix return value for ope acquire
msm: camera: ope: Fix false alarm for OPE request timeout
msm: camera: ope: Avoid deadlock during recovery after HW hang
msm: camera: tfe: tfe debug enhancement
msm: camera: cdm: Fix irq_data value in case of inline irq
msm: camera: flash: Switch off flash on provider crash
msm: camera: ope: Initialize ope hw mutex structure
msm: camera: cdm: Flush all available FIFOs during reset
msm: camera: cpas: Add mandatory bw option for axi ports clocks
msm: camera: ope: Use vzalloc to allocate the write bus ctx structure
msm: camera: ope: Fix handling of init hw failure
msm: camera: tfe: Enable per frame register dump for rdi only context
msm: camera: cdm: Protect cdm core status bits with mutex
msm: camera: cdm: correct the error check in cmd submit irq
msm: camera: ope: Fix unclock access during HW reset
msm: camera: ope: Program frame level settings after idle event
msm: camera: ope: Delay releasing of resources for last context
msm: camera: isp: Increase default SOF freeze timeout
msm: camera: smmu: Add map and unmap monitor
msm: camera: isp: Add trace events across ISP
msm: camera: smmu: Profile time taken for map, unmap
msm: camera: ope: Start context timer on receiving new request
msm: camera: tfe: Reduce stack size during set axi bw
msm: camera: cdm: Check for HW state before dumping registers
msm: camera: ope: Reduce stack footprint during acquire
msm: camera: tfe: Disable clock if tfe2 is not supported
msm: camera: cdm: Avoid cdm pause incase of BL submit
msm: camera: tfe: Optimize CSID IRQ logging
msm: camera: ope: Move request id validity check outside of lock
msm: camera: tfe: Correct the tfe hw manager dump logic
msm: camera: ope: Synchronize flush and submit BLs
msm: camera: cdm: Protect cdm reset status
msm: camera: cdm: Handle cdm deinit sequence properly
msm: camera: tfe: Reduce reset timeout to 100ms
msm: camera: ope: Fix hang detection
msm: camera: ope: Make non-fatal logs as debug and info logs
msm: camera: tfe: set overflow pending bit to zero after HW reset
msm: camera: ope: Do not disable CDM during error handling
msm: camera: ope: Add support for OPE Replay
msm: camera: ope: Stop OPE in case of init failure
msm: camera: ope: Synchronize process cmd and flush request
msm: camera: cdm: Fix CDM IRQ handling
msm: camera: tfe: LDAR dump for TFE
msm: camera: ope: Fix the length check for debug buffer
msm: camera: cdm: Fix CDM reset logic
msm: camera: ope: Dump debug registers in case of HW hang
msm: camera: tfe: Support the RDI bus port for line based mode
msm: camera: cdm: Handle out of order reset done events
msm: camera: ope: Consider other contexts during timeout
msm: camera: ope: Put GenIRQ in last stripe BL
msm: camera: tfe: Process the rdi interrupts for rdi only resource
msm: camera: jpeg: Check the HW state before accessing register
msm: camera: csiphy: Update csiphy power-up sequence for lito v2
msm: camera: cdm: Secure freeing of request lists using locks
msm: camera: cpas: Add support for Scuba camnoc
msm: camera: csiphy: Clear secure phy flags on release
msm: camera: tfe: validate the tfe bw num paths
msm: camera: ope: Reorder the reset order in ope acquire
msm: camera: ope: Dump debug registers in case of reset failure
msm: camera: ope: Add logic to detect hang in CDM
msm: camera: isp: Increase max count of cfg to support more init packets
msm: camera: core: Fix cpas axi clk rate overflow.

CRs-Fixed: 2668666
Change-Id: I882ca4bd117bebc7d1c62bc82299d69d7b5c9388
Signed-off-by: Trishansh Bhardwaj <tbhardwa@codeaurora.org>
2020-06-03 11:48:47 +05:30
Pavan Kumar Chilamkurthi
efc0528e8a msm: camera: smmu: Add support for non-contiguous mermory region
Add support to discard a memory region inside the full dma map
virtual address space region.

CRs-Fixed: 2580128
Change-Id: I76cc778f2437a01a4efabec836ce92c47d983d61
Signed-off-by: Pavan Kumar Chilamkurthi <pchilamk@codeaurora.org>
2020-04-27 14:00:17 -07:00
Karthik Jayakumar
632c43cf64 msm: camera: icp: Remove qcom soc dependency
Remove soc_info from icp driver as it was unused.

CRs-Fixed: 2557184
Change-Id: I7b85768502f825753ea4b9650b5c3f9df67643fb
Signed-off-by: Karthik Jayakumar <kjayakum@codeaurora.org>
2019-10-31 14:53:45 -07:00
Jigarkumar Zala
5b016ad220 Camera: Correct makefiles for correct header inclusion
Correct some Makefiles and drivers header inclusion.

Change-Id: Iec3e6e0333ae55e8f1cff9780723e0dad954ff83
Signed-off-by: Jigarkumar Zala <jzala@codeaurora.org>
2019-08-09 16:27:18 -07:00
Jigarkumar Zala
05349feaa2 Camera: Bring over camera driver changes
Bring over camera driver changes as of msm-4.19
commit  5a5551a7 (Merge "msm: camera: reqmgr: Fix CRM
shift one req issue").

Change-Id: Ic0c2b2d74d1b3470c1c51d98228e312fb13c501a
Signed-off-by: Jigarkumar Zala <jzala@codeaurora.org>
2019-07-08 10:24:55 -07:00