This change adds support for delaying kickoff in case of ESD error.
This delay is required to handle a race condition between esd
workqueue and display thread.
When ESD workqueue detects the esd and while handling the failure
notification if the new updates arrive on display thread, there
is a possibility that ESD workqueue will keep on waiting on pp_done.
This could happen if display thread keeps on incrementing the kickoff_cnt
before workqueue can check the condition. With this change the kickoff is
delayed, allowing the workqueue to get scheduled and avoiding the race
condition.
Change-Id: I8e6fff5ea5494ae801d1e60ae85b7ad19cc12961
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
Commit Ifa100424733 ("disp: msm: sde: delay
encoder disable for clone mode") delays the CWB
encoder disable but it is also skipping the CWB
disable flush. That can cause the underrun on dp
display if it uses the same 3d_merge HW block. This
change reverts the portion of original code and
only delays the last cwb frame done wait. It still
keep the last CWB frame done wait as it is if crtc
is also moving to inactive state.
Change-Id: I3461188a35197f2925899ceea7ef705adf00a398
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
It is not applicable for all DFPS cases to update UIDLE state
according to current frame rate. If DFPS changes frame rate
through vertical front porch values, the SDE clocks and transfer
time will not get changed accordingly, and it always get fixed
at max frame rate configuration of DFPS.
Add this change to check max FPS of DFPS instead of current
frame rate for UIDLE update, if DFPS is enabled with VFP.
Change-Id: I7634bce6a9eb1af212ba19a267735be08b20ae1f
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
This change fixes the vblank wait after system cache read mode
update. Without this change the wait does not happen since there is
no pending kickoff. This change uses encoder api to flush the
configuration and explicitly waits for vblank.
Change-Id: I8942f9b638e784c8fd9b5df33a9ccc7087a5eaef
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
Display input touch event is replaced with IOCTL in performance HAL
to early wake up DSI clock.
Add a property to enable/disable display input touch event for backward
compatibility.
Change-Id: Ib6b9123d726e79a2927b05d1ef77c343f01d0c5e
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
In current SDE driver when misr is enabled, for each commit in
encoder kickoff stage misr is configured for both lm and interface
misr blks. This can clear misr data before client could collect misr.
This change avoids misr data clear and configures misr based on
user input.
Change-Id: I85fc19c78afc6d01346219250c82f2ada824eb0d
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
Display clocks and IRQs are disabled during idle state
on command mode for power saving, and will be enabled
when a new frame commits to display driver. But enable
display clocks and IRQs will cause some latency.
So add a new SDE custom IOCTL for user-space to early wake
up display before first frame commits to kernel.
Change-Id: I6ca0188d321c4964f29c46e588b64d06b9634c59
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
Expose an API in encoder to control display irq's
when the VM enters and exits TUI use case.
Change-Id: Ic2386dcebfd8a9dd2ce06f068c6daf066a3e885f
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Add support for all 4LM topologies in new DCE encoder framework.
This change also aligns with the new way of checking topology
information.
Change-Id: I5358d60634070bdb26059056db884ad4161c073e
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
Vsync event timer wakeup was designed to reduced the
interrupt latency and trigger retire fence without delay.
This is fixed by avoiding CPU power collapse where MDSS
interrupt is scheduled. This change avoids extra CPU
wakeup.
Change-Id: Iadaf0e2b84fb079bbc64d9201230df54f8dbe8c1
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Add support for all 4LM topologies in new DCE encoder framework.
This change also aligns with the new way of checking topology
information.
Change-Id: I20785c96569fd07cbd8016d244a7e4c929bfa071
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
From Lahaina onwards, widebus is enabled for compressed DSI stream.
This change adjusts interface timing parameters to account for widebus.
Change-Id: Ie6b739ed2cdb515064e3a94404b3e0fe07755d7e
Signed-off-by: Rajkumar Subbiah <rsubbia@codeaurora.org>
This change adds helper to retrieve the kms from
the drm_enc structure and provides additional error
checking which can be avoided in the callers.
Change-Id: Id8ba07a2d48a605dd4ce846e5d61f302e5861b4d
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
Submit a cwb frame event signal to notify the crtc that cwb
is completed. Currently cwb also uses the same frame done
event as primary. When a single cwb commit is completed, because
cwb is on a slower path there is a race condition in which the
subsequent frame done event for primary clears the refcount.
This fix isolates the events and removes this situation.
Change-Id: Ic3e18302eb8a497cbd7a00f271de2ab320576c83
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
Reset MDP ctl path and DSI ctl on autorefresh
disable failure. This will enable the hardware
to recover from the hang.
Change-Id: Ia9acc8573c22e0713179ef4f6ef604caacabfadb
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Add support to configure the DPU pipeline to support VDC-m
topologies.
Change-Id: Ib8ce9a0eaeaa838759fb09cb2ee164d4765e4989
Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
Certain DSC hw blocks only support 444 mode, while others
support both 444 and 422 modes. This change adds support in
resource manager to check the hw resource requirement with
the capability of the block and then reserve the correct
hw resource.
Change-Id: If85beb2f2f25e9eb7f8a8321c94b57878d048369
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
This change moves the DSC implementation into a separate file.
This is required to add support for new compression algorithms.
This cleanup change also, moves struct sde_encoder_virt
declaration to the encoder header file.
Change-Id: Idc3b96e65fcce2a7ee6e17af604cec0cb574f6f7
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
In dual display cases when secondary display is resumed first,
primary CTL and LM is selected for secondary path which leads to
invalid configuration. Changes are made to correct the reservation
to select primary CTL and LM for primary connector and secondary
LM to secondary connector.
Change-Id: I6b2a8bedaf46f18bdb28b45ac765f32b26207304
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
During SUI validations and transitions, the encoders
are iterated to find the panel-mode. If concurrent
writeback is enabled, it is assumed as video mode.
Add check to consider only the built-in display
panel mode during sui to avoid wrong interpretation.
Change-Id: I2901eb29a0799571a95f6ab6f9f3f2c6154424c5
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Primary and secondary displays should have first priority
when reserving lms. Static reservation can potentially block
higher resolutions for the required displays. This patch gets
the layer mixer requirement for primary or secondary display
if available. It reserves those layer mixers dynamically
for the respective display when connector is registered.
Change-Id: Id69dac4c72d6b20008049f4aeb71c0f97d0a426b
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
SDE driver triggers the frame and waits for the
ctl_start interrupt for command mode display. This interrupt
provides confirmation that hardware has picked up the
frame. Retire fence signaling is associated with
this interrupt and it is sent at the rd_ptr interrupt
after ctl_start. Due to lut dma delay, ctl_start interrupt
may be trigger before rd_ptr or after rd_ptr. SW manages
this complexity and handle retire fence for different cases
with 500us threshold logic.
This change replaces the ctl_start interrupt with wr_ptr
interrupt by programming it to trigger at 1st write line
count. This is guaranteed to come every time and it is close
to rd_ptr interrupt. That allows retire fence trigger at
wr_ptr interrupt and simplifies the SW logic. CRTC commit
thread would be held slightly longer with this change
as the wr_ptr is always close to rd_ptr and after
ctl_start.
Change-Id: Ic47a8f82c854b4aded0d70c95af853b28a68ffd6
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
This snapshot ports changes from 4.14 to 4.19 into
the msm and sde layer. Snapshot was taken as of
commit 0f8fb25421ff ("cnss2: Add device version to
SOC info structure").
Change-Id: I59b799a78319c2db6930a2a10bc38976f8c09898
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
Each mode_set call makes sure that previous frame is triggered
and triggers the esd check if there is pp_timeout. This may
lead to deadlock between crtc commit and event threads. Crtc
commit thread acquires the rc_lock and triggers the flush_thread
API on event_thread. Event thread again tries to acquire the
rc_lock to wait for frame. This can be prevented by avoiding the
pre_kickoff call from esd_failure notification if it is generated
through pp_timeout.
Change-Id: I561fef0345976ab0cae61aab6718214c47fa1393
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Log ping-pong current line count during ctl-start
and rd-ptr interrupt. This will help in debugging
ping-pong timeout issues.
Change-Id: I58185330fe9e8a64f48d6da60c974b23a9e68b44
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
DSI display may support video mode and command mode both and it may
support transition between these two modes.
This change adds seamless transition between these two modes for DSI
display by avoiding crtc enable/disable and panel power on/off
during modeset.
Change-Id: Id7ddaef7d1f0f7cc7d52283755bad53a246adec6
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
This change brings msm display driver including sde,
dp, dsi, rotator, dsi pll and dp pll from base 4.19 kernel
project. It is first source code snapshot from base kernel project.
Change-Id: Iec864c064ce5ea04e170f24414c728684002f284
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
