msm: camera: isp: Correct the IRQ masks and log buff index

Correct the irq masks in csid  and correct the index to print the log
buf in rx error top half.

Change-Id: I214c3ade65c707fdff87bef3ea6efcd6016f2785
CRs-Fixed: 2830502
Signed-off-by: Gaurav Jindal <gjindal@codeaurora.org>
This commit is contained in:
Gaurav Jindal
2021-02-06 19:27:58 +05:30
förälder 623fd1e471
incheckning fff8178e8f
3 ändrade filer med 11 tillägg och 11 borttagningar

Visa fil

@@ -482,7 +482,7 @@ static struct cam_ife_csid_ver2_rdi_reg_info
.stripe_loc_shift_val = 20,
.ccif_violation_en = 1,
.fatal_err_mask = 0x4,
.non_fatal_err_mask = 10080000,
.non_fatal_err_mask = 0x10080000,
.camif_irq_mask = 0x800000,
.rup_aup_mask = 0x200020,
};
@@ -575,7 +575,7 @@ static struct cam_ife_csid_ver2_rdi_reg_info
.stripe_loc_shift_val = 20,
.ccif_violation_en = 1,
.fatal_err_mask = 0x4,
.non_fatal_err_mask = 10080000,
.non_fatal_err_mask = 0x10080000,
.camif_irq_mask = 0x800000,
.rup_aup_mask = 0x400040,
};
@@ -668,7 +668,7 @@ static struct cam_ife_csid_ver2_rdi_reg_info
.stripe_loc_shift_val = 20,
.ccif_violation_en = 1,
.fatal_err_mask = 0x4,
.non_fatal_err_mask = 10080000,
.non_fatal_err_mask = 0x10080000,
.camif_irq_mask = 0x800000,
.rup_aup_mask = 0x800080,
};
@@ -761,7 +761,7 @@ static struct cam_ife_csid_ver2_rdi_reg_info
.stripe_loc_shift_val = 20,
.ccif_violation_en = 1,
.fatal_err_mask = 0x4,
.non_fatal_err_mask = 10080000,
.non_fatal_err_mask = 0x10080000,
.camif_irq_mask = 0x800000,
.rup_aup_mask = 0x1000100,
};

Visa fil

@@ -717,7 +717,7 @@ static int cam_ife_csid_ver2_rx_err_bottom_half(
if (irq_status) {
len += scnprintf(log_buf, CAM_IFE_CSID_LOG_BUF_LEN - len,
len += scnprintf(log_buf + len, CAM_IFE_CSID_LOG_BUF_LEN - len,
"Part-fatal-errors:\n");
if (irq_status & IFE_CSID_VER2_RX_CPHY_EOT_RECEPTION)
@@ -745,7 +745,7 @@ static int cam_ife_csid_ver2_rx_err_bottom_half(
csi2_reg->non_fatal_err_mask;
if (irq_status) {
len += scnprintf(log_buf, CAM_IFE_CSID_LOG_BUF_LEN - len,
len += scnprintf(log_buf + len, CAM_IFE_CSID_LOG_BUF_LEN - len,
"Non-fatal-errors:\n");
if (irq_status & IFE_CSID_VER2_RX_MMAPPED_VC_DT)

Visa fil

@@ -302,7 +302,7 @@ static struct cam_ife_csid_ver2_pxl_reg_info
.min_hbi_shift_val = 4,
.start_master_sel_shift_val = 4,
.fatal_err_mask = 0x4,
.non_fatal_err_mask = 0x28000,
.non_fatal_err_mask = 0x10080000,
.camif_irq_mask = 0x800000,
.rup_aup_mask = 0x10001,
};
@@ -389,7 +389,7 @@ static struct cam_ife_csid_ver2_rdi_reg_info
.debug_byte_cntr_rst_shift_val = 2,
.ccif_violation_en = 1,
.fatal_err_mask = 0x4,
.non_fatal_err_mask = 0x28000,
.non_fatal_err_mask = 0x10080000,
.camif_irq_mask = 0x800000,
.rup_aup_mask = 0x100010,
};
@@ -475,7 +475,7 @@ static struct cam_ife_csid_ver2_rdi_reg_info
.debug_byte_cntr_rst_shift_val = 2,
.ccif_violation_en = 1,
.fatal_err_mask = 0x4,
.non_fatal_err_mask = 0x28000,
.non_fatal_err_mask = 0x10080000,
.camif_irq_mask = 0x800000,
.rup_aup_mask = 0x200020,
};
@@ -561,7 +561,7 @@ static struct cam_ife_csid_ver2_rdi_reg_info
.debug_byte_cntr_rst_shift_val = 2,
.ccif_violation_en = 1,
.fatal_err_mask = 0x4,
.non_fatal_err_mask = 0x28000,
.non_fatal_err_mask = 0x10080000,
.camif_irq_mask = 0x800000,
.rup_aup_mask = 0x400040,
};
@@ -647,7 +647,7 @@ static struct cam_ife_csid_ver2_rdi_reg_info
.debug_byte_cntr_rst_shift_val = 2,
.ccif_violation_en = 1,
.fatal_err_mask = 0x4,
.non_fatal_err_mask = 0x28000,
.non_fatal_err_mask = 0x10080000,
.camif_irq_mask = 0x800000,
.rup_aup_mask = 0x800080,
};