disp: msm: dsi: only check clock lane ulps status for DPHY

Clock lane can enter ino ULPS mode only in DPHY mode. For
CPHY, did not need to check the clock lane status for ULPS.

Change-Id: Iceddd8064ec75ce26613469cfb1bde36e883f865
Signed-off-by: Yuan Zhao <[email protected]>

msm/dsi/dsi_ctrl.c

@@ -1859,7 +1859,8 @@ static int dsi_enable_ulps(struct dsi_ctrl *dsi_ctrl)
 		return 0;
 	}
 
-	lanes |= DSI_CLOCK_LANE;
+	if (!dsi_is_type_cphy(&dsi_ctrl->host_config.common_config))
+		lanes |= DSI_CLOCK_LANE;
 	dsi_ctrl->hw.ops.ulps_ops.ulps_request(&dsi_ctrl->hw, lanes);
 
 	ulps_lanes = dsi_ctrl->hw.ops.ulps_ops.get_lanes_in_ulps(&dsi_ctrl->hw);
@@ -1887,7 +1888,8 @@ static int dsi_disable_ulps(struct dsi_ctrl *dsi_ctrl)
 	}
 
 	lanes = dsi_ctrl->host_config.common_config.data_lanes;
-	lanes |= DSI_CLOCK_LANE;
+	if (!dsi_is_type_cphy(&dsi_ctrl->host_config.common_config))
+		lanes |= DSI_CLOCK_LANE;
 
 	ulps_lanes = dsi_ctrl->hw.ops.ulps_ops.get_lanes_in_ulps(&dsi_ctrl->hw);
 

msm/dsi/dsi_defs.h

@@ -812,6 +812,16 @@ static inline u64 dsi_h_total_dce(struct dsi_mode_info *mode)
 	return h_total;
 }
 
+/*
+ * dsi_is_type_cphy - check if panel type is cphy
+ * @cfg: Pointer to dsi host common cfg
+ * Returns: True if panel type is cphy
+ */
+static inline bool dsi_is_type_cphy(struct dsi_host_common_cfg *cfg)
+{
+	return (cfg->phy_type == DSI_PHY_TYPE_CPHY) ? true : false;
+}
+
 /**
  * dsi_host_transfer_sub() - transfers DSI commands from host to panel
  * @host:    pointer to the DSI mipi host device

msm/dsi/dsi_display.c

@@ -2814,7 +2814,7 @@ static void dsi_display_toggle_resync_fifo(struct dsi_display *display)
 	 * bit on each phy. Avoid this for Cphy.
 	 */
 
-	if (display->panel->host_config.phy_type == DSI_PHY_TYPE_CPHY)
+	if (dsi_is_type_cphy(&display->panel->host_config))
 		return;
 
 	display_for_each_ctrl(i, display) {
@@ -4498,17 +4498,6 @@ static void _dsi_display_calc_pipe_delay(struct dsi_display *display,
 	delay->pll_delay = ((delay->pll_delay * esc_clk_rate_hz) / 1000000);
 }
 
-/*
- * dsi_display_is_type_cphy - check if panel type is cphy
- * @display: Pointer to private display structure
- * Returns: True if panel type is cphy
- */
-static inline bool dsi_display_is_type_cphy(struct dsi_display *display)
-{
-	return (display->panel->host_config.phy_type ==
-		DSI_PHY_TYPE_CPHY) ? true : false;
-}
-
 static int _dsi_display_dyn_update_clks(struct dsi_display *display,
 					struct link_clk_freq *bkp_freq)
 {
@@ -6681,7 +6670,7 @@ void dsi_display_adjust_mode_timing(struct dsi_display *display,
 		do_div(old_htotal, display->ctrl_count);
 		new_htotal = dsi_mode->timing.clk_rate_hz * lanes;
 		div = bpp * vtotal * dsi_mode->timing.refresh_rate;
-		if (dsi_display_is_type_cphy(display)) {
+		if (dsi_is_type_cphy(&display->panel->host_config)) {
 			new_htotal = new_htotal * bits_per_symbol;
 			div = div * num_of_symbols;
 		}
@@ -6699,7 +6688,7 @@ void dsi_display_adjust_mode_timing(struct dsi_display *display,
 		do_div(htotal, display->ctrl_count);
 		new_vtotal = dsi_mode->timing.clk_rate_hz * lanes;
 		div = bpp * htotal * dsi_mode->timing.refresh_rate;
-		if (dsi_display_is_type_cphy(display)) {
+		if (dsi_is_type_cphy(&display->panel->host_config)) {
 			new_vtotal = new_vtotal * bits_per_symbol;
 			div = div * num_of_symbols;
 		}

msm/dsi/dsi_phy.c

@@ -811,7 +811,8 @@ static int dsi_phy_enable_ulps(struct msm_dsi_phy *phy,
 	u32 ulps_lanes;
 
 	lanes = config->common_config.data_lanes;
-	lanes |= DSI_CLOCK_LANE;
+	if (!dsi_is_type_cphy(&config->common_config))
+		lanes |= DSI_CLOCK_LANE;
 
 	/*
 	 * If DSI clamps are enabled, it means that the DSI lanes are
@@ -846,7 +847,8 @@ static int dsi_phy_disable_ulps(struct msm_dsi_phy *phy,
 	u32 ulps_lanes, lanes = 0;
 
 	lanes = config->common_config.data_lanes;
-	lanes |= DSI_CLOCK_LANE;
+	if (!dsi_is_type_cphy(&config->common_config))
+		lanes |= DSI_CLOCK_LANE;
 
 	ulps_lanes = phy->hw.ops.ulps_ops.get_lanes_in_ulps(&phy->hw);