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@@ -6457,13 +6457,10 @@ void __sde_crtc_static_cache_read_work(struct kthread_work *work)
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{
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struct sde_crtc *sde_crtc = container_of(work, struct sde_crtc,
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static_cache_read_work.work);
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- struct drm_crtc *crtc;
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+ struct drm_crtc *crtc = &sde_crtc->base;
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+ struct sde_hw_ctl *ctl = sde_crtc->mixers[0].hw_ctl;
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struct drm_encoder *enc, *drm_enc = NULL;
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-
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- if (!sde_crtc)
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- return;
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-
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- crtc = &sde_crtc->base;
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+ struct drm_plane *plane;
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if (sde_crtc->cache_state != CACHE_STATE_FRAME_WRITE)
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return;
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@@ -6474,8 +6471,9 @@ void __sde_crtc_static_cache_read_work(struct kthread_work *work)
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return;
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}
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- if (!drm_enc) {
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- SDE_ERROR("invalid encoder\n");
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+ if (!drm_enc || !ctl || !sde_crtc->num_mixers) {
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+ SDE_ERROR("invalid object, drm_enc:%d, ctl:%d\n", !drm_enc,
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+ !ctl);
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return;
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}
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@@ -6483,7 +6481,14 @@ void __sde_crtc_static_cache_read_work(struct kthread_work *work)
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sde_crtc_static_img_control(crtc, CACHE_STATE_FRAME_READ, false);
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- /* kickoff encoder with previous configuration and wait for VBLANK */
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+ /* flush only the sys-cache enabled SSPPs */
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+ if (ctl->ops.clear_pending_flush)
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+ ctl->ops.clear_pending_flush(ctl);
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+
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+ drm_atomic_crtc_for_each_plane(plane, crtc)
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+ sde_plane_ctl_flush(plane, ctl, true);
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+
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+ /* kickoff encoder and wait for VBLANK */
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sde_encoder_kickoff(drm_enc, false, false);
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sde_encoder_wait_for_event(drm_enc, MSM_ENC_VBLANK);
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