fw-api: Add 6490 R50 HW header file changes

Add 6490 R50 HW header file changes

Change-Id: I762ceccca7e5a6689555ee2cc3956344584d7e2f
CRs-Fixed: 2513249

hw/qca6490/v1/phyrx_he_sig_a_mu_dl.h

@@ -43,12 +43,365 @@ struct he_sig_a_mu_dl_info phyrx_he_sig_a_mu_dl_info_details
 			See detailed description of the STRUCT
 */
 
-#define PHYRX_HE_SIG_A_MU_DL_0_HE_SIG_A_MU_DL_INFO_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_OFFSET 0x00000000
-#define PHYRX_HE_SIG_A_MU_DL_0_HE_SIG_A_MU_DL_INFO_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_LSB 0
-#define PHYRX_HE_SIG_A_MU_DL_0_HE_SIG_A_MU_DL_INFO_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_MASK 0xffffffff
-#define PHYRX_HE_SIG_A_MU_DL_1_HE_SIG_A_MU_DL_INFO_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_OFFSET 0x00000004
-#define PHYRX_HE_SIG_A_MU_DL_1_HE_SIG_A_MU_DL_INFO_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_LSB 0
-#define PHYRX_HE_SIG_A_MU_DL_1_HE_SIG_A_MU_DL_INFO_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_MASK 0xffffffff
+
+ /* EXTERNAL REFERENCE : struct he_sig_a_mu_dl_info phyrx_he_sig_a_mu_dl_info_details */
+
+
+/* Description		PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_DL_UL_FLAG
+
+			Differentiates between DL and UL transmission
+
+
+
+			<enum 0 DL_UL_FLAG_IS_DL_OR_TDLS>
+
+			<enum 1 DL_UL_FLAG_IS_UL>
+
+			NOTE: This is unsupported for HE MU format (including
+			MU_SU) Tx in Napier and Hastings80.
+
+			<legal all>
+*/
+#define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_DL_UL_FLAG_OFFSET 0x00000000
+#define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_DL_UL_FLAG_LSB 0
+#define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_DL_UL_FLAG_MASK 0x00000001
+
+/* Description		PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_MCS_OF_SIG_B
+
+			Indicates the MCS of HE-SIG-B
+
+			<legal 0-5>
+*/
+#define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_MCS_OF_SIG_B_OFFSET 0x00000000
+#define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_MCS_OF_SIG_B_LSB 1
+#define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_MCS_OF_SIG_B_MASK 0x0000000e
+
+/* Description		PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_DCM_OF_SIG_B
+
+			Indicates whether dual sub-carrier modulation is applied
+			to HE-SIG-B
+
+
+
+			0: No DCM for HE_SIG_B
+
+			1: DCM for HE_SIG_B
+
+			<legal all>
+*/
+#define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_DCM_OF_SIG_B_OFFSET 0x00000000
+#define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_DCM_OF_SIG_B_LSB 4
+#define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_DCM_OF_SIG_B_MASK 0x00000010
+
+/* Description		PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_BSS_COLOR_ID
+
+			BSS color ID
+
+
+
+			Field Used by MAC HW
+
+			<legal all>
+*/
+#define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_BSS_COLOR_ID_OFFSET 0x00000000
+#define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_BSS_COLOR_ID_LSB 5
+#define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_BSS_COLOR_ID_MASK 0x000007e0
+
+/* Description		PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_SPATIAL_REUSE
+
+			Spatial reuse
+
+
+
+			For 20MHz one SR field corresponding to entire 20MHz
+			(other 3 fields indicate identical values)
+
+			For 40MHz two SR fields for each 20MHz (other 2 fields
+			indicate identical values)
+
+			For 80MHz four SR fields for each 20MHz
+
+			For 160MHz four SR fields for each 40MHz
+
+			<legal all>
+*/
+#define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_SPATIAL_REUSE_OFFSET 0x00000000
+#define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_SPATIAL_REUSE_LSB 11
+#define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_SPATIAL_REUSE_MASK 0x00007800
+
+/* Description		PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_TRANSMIT_BW
+
+			Bandwidth of the PPDU.
+
+
+
+			<enum 0 HE_SIG_A_MU_DL_BW20> 20 Mhz
+
+			<enum 1 HE_SIG_A_MU_DL_BW40> 40 Mhz
+
+			<enum 2 HE_SIG_A_MU_DL_BW80> 80 MHz non-preamble
+			puncturing mode
+
+			<enum 3 HE_SIG_A_MU_DL_BW160> 160 MHz and 80+80 MHz
+			non-preamble puncturing mode
+
+			<enum 4 HE_SIG_A_MU_DL_BW80_SEC_20_PUNC> for preamble
+			puncturing in 80 MHz, where in the preamble only the
+			secondary 20 MHz is punctured
+
+			<enum 5 HE_SIG_A_MU_DL_BW80_20_PUNC_IN_SEC_40> for
+			preamble puncturing in 80 MHz, where in the preamble only
+			one of the two 20 MHz sub-channels in secondary 40 MHz is
+			punctured.
+
+			<enum 6 HE_SIG_A_MU_DL_BW160_SEC_20_PUNC> for preamble
+			puncturing in 160 MHz or 80+80 MHz, where in the primary 80
+			MHz of the preamble only the secondary 20 MHz is punctured.
+
+			<enum 7 HE_SIG_A_MU_DL_BW160_SEC_40_80_PUNC> for
+			preamble puncturing in 160 MHz or 80+80 MHz, where in the
+			primary 80 MHz of the preamble the primary 40 MHz is
+			present.
+
+
+
+			On RX side, Field Used by MAC HW
+
+			<legal 0-7>
+*/
+#define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_TRANSMIT_BW_OFFSET 0x00000000
+#define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_TRANSMIT_BW_LSB 15
+#define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_TRANSMIT_BW_MASK 0x00038000
+
+/* Description		PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_NUM_SIG_B_SYMBOLS
+
+			Number of symbols
+
+
+
+			For OFDMA, the actual number of symbols is 1 larger then
+			indicated in this field.
+
+
+
+			For MU-MIMO this is equal to the number of users - 1:
+			the following encoding is used:
+
+			1 => 2 users
+
+			2 => 3 users
+
+			Etc.
+
+
+
+			<legal all>
+*/
+#define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_NUM_SIG_B_SYMBOLS_OFFSET 0x00000000
+#define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_NUM_SIG_B_SYMBOLS_LSB 18
+#define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_NUM_SIG_B_SYMBOLS_MASK 0x003c0000
+
+/* Description		PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_COMP_MODE_SIG_B
+
+			Indicates the compression mode of HE-SIG-B
+
+
+
+			0: Regular [uncomp mode]
+
+			1: compressed mode (full-BW MU-MIMO only)
+
+			<legal all>
+*/
+#define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_COMP_MODE_SIG_B_OFFSET 0x00000000
+#define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_COMP_MODE_SIG_B_LSB 22
+#define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_COMP_MODE_SIG_B_MASK 0x00400000
+
+/* Description		PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_CP_LTF_SIZE
+
+			Indicates the CP and HE-LTF type
+
+
+
+			<enum 0 MU_FourX_LTF_0_8CP> 4xLTF + 0.8 us CP
+
+			<enum 1 MU_TwoX_LTF_0_8CP> 2x LTF + 0.8 µs CP
+
+			<enum 2 MU_TwoX_LTF_1_6CP> 2x LTF + 1.6 µs CP
+
+			<enum 3 MU_FourX_LTF_3_2CP> 4x LTF + 3.2 µs CP
+
+
+
+			NOTE: for MU no proprietary modes (for now)
+
+
+
+			<legal all>
+*/
+#define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_CP_LTF_SIZE_OFFSET 0x00000000
+#define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_CP_LTF_SIZE_LSB 23
+#define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_CP_LTF_SIZE_MASK 0x01800000
+
+/* Description		PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_DOPPLER_INDICATION
+
+			0: No Doppler support
+
+			1: Doppler support
+
+			<legal all>
+*/
+#define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_DOPPLER_INDICATION_OFFSET 0x00000000
+#define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_DOPPLER_INDICATION_LSB 25
+#define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_DOPPLER_INDICATION_MASK 0x02000000
+
+/* Description		PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RESERVED_0A
+
+			<legal 0>
+*/
+#define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RESERVED_0A_OFFSET 0x00000000
+#define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RESERVED_0A_LSB 26
+#define PHYRX_HE_SIG_A_MU_DL_0_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RESERVED_0A_MASK 0xfc000000
+
+/* Description		PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_TXOP_DURATION
+
+			Indicates the remaining time in the current TXOP
+
+
+
+			Field Used by MAC HW
+
+			 <legal all>
+*/
+#define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_TXOP_DURATION_OFFSET 0x00000004
+#define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_TXOP_DURATION_LSB 0
+#define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_TXOP_DURATION_MASK 0x0000007f
+
+/* Description		PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RESERVED_1A
+
+			Note: spec indicates this shall be set to 1
+
+			<legal 1>
+*/
+#define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RESERVED_1A_OFFSET 0x00000004
+#define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RESERVED_1A_LSB 7
+#define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RESERVED_1A_MASK 0x00000080
+
+/* Description		PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_NUM_LTF_SYMBOLS
+
+			Indicates the number of HE-LTF symbols
+
+
+
+			0: 1 LTF
+
+			1: 2 LTFs
+
+			2: 4 LTFs
+
+			3: 6 LTFs
+
+			4: 8 LTFs
+
+
+
+			<legal all>
+*/
+#define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_NUM_LTF_SYMBOLS_OFFSET 0x00000004
+#define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_NUM_LTF_SYMBOLS_LSB 8
+#define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_NUM_LTF_SYMBOLS_MASK 0x00000700
+
+/* Description		PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_LDPC_EXTRA_SYMBOL
+
+			If LDPC,
+
+			  0: LDPC extra symbol not present
+
+			  1: LDPC extra symbol present
+
+			Else
+
+			  Set to 1
+
+			<legal all>
+*/
+#define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_LDPC_EXTRA_SYMBOL_OFFSET 0x00000004
+#define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_LDPC_EXTRA_SYMBOL_LSB 11
+#define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_LDPC_EXTRA_SYMBOL_MASK 0x00000800
+
+/* Description		PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_STBC
+
+			Indicates whether STBC is applied
+
+			0: No STBC
+
+			1: STBC
+
+			<legal all>
+*/
+#define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_STBC_OFFSET 0x00000004
+#define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_STBC_LSB 12
+#define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_STBC_MASK 0x00001000
+
+/* Description		PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_PACKET_EXTENSION_A_FACTOR
+
+			the packet extension duration of the trigger-based PPDU
+			response with these two bits indicating the a-factor
+
+
+
+			<enum 0 a_factor_4>
+
+			<enum 1 a_factor_1>
+
+			<enum 2 a_factor_2>
+
+			<enum 3 a_factor_3>
+
+
+
+			<legal all>
+*/
+#define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_PACKET_EXTENSION_A_FACTOR_OFFSET 0x00000004
+#define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_PACKET_EXTENSION_A_FACTOR_LSB 13
+#define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_PACKET_EXTENSION_A_FACTOR_MASK 0x00006000
+
+/* Description		PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_PACKET_EXTENSION_PE_DISAMBIGUITY
+
+			the packet extension duration of the trigger-based PPDU
+			response with this bit indicating the PE-Disambiguity
+
+			<legal all>
+*/
+#define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_PACKET_EXTENSION_PE_DISAMBIGUITY_OFFSET 0x00000004
+#define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_PACKET_EXTENSION_PE_DISAMBIGUITY_LSB 15
+#define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_PACKET_EXTENSION_PE_DISAMBIGUITY_MASK 0x00008000
+
+/* Description		PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_CRC
+
+			CRC for HE-SIG-A contents.
+
+			<legal all>
+*/
+#define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_CRC_OFFSET 0x00000004
+#define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_CRC_LSB 16
+#define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_CRC_MASK 0x000f0000
+
+/* Description		PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_TAIL
+
+			<legal 0>
+*/
+#define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_TAIL_OFFSET 0x00000004
+#define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_TAIL_LSB 20
+#define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_TAIL_MASK 0x03f00000
+
+/* Description		PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RESERVED_1B
+
+			<legal 0>
+*/
+#define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RESERVED_1B_OFFSET 0x00000004
+#define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RESERVED_1B_LSB 26
+#define PHYRX_HE_SIG_A_MU_DL_1_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RESERVED_1B_MASK 0xfc000000
 
 
 #endif // _PHYRX_HE_SIG_A_MU_DL_H_

hw/qca6490/v1/phyrx_he_sig_a_su.h

@@ -43,12 +43,457 @@ struct he_sig_a_su_info phyrx_he_sig_a_su_info_details
 			See detailed description of the STRUCT
 */
 
-#define PHYRX_HE_SIG_A_SU_0_HE_SIG_A_SU_INFO_PHYRX_HE_SIG_A_SU_INFO_DETAILS_OFFSET 0x00000000
-#define PHYRX_HE_SIG_A_SU_0_HE_SIG_A_SU_INFO_PHYRX_HE_SIG_A_SU_INFO_DETAILS_LSB 0
-#define PHYRX_HE_SIG_A_SU_0_HE_SIG_A_SU_INFO_PHYRX_HE_SIG_A_SU_INFO_DETAILS_MASK 0xffffffff
-#define PHYRX_HE_SIG_A_SU_1_HE_SIG_A_SU_INFO_PHYRX_HE_SIG_A_SU_INFO_DETAILS_OFFSET 0x00000004
-#define PHYRX_HE_SIG_A_SU_1_HE_SIG_A_SU_INFO_PHYRX_HE_SIG_A_SU_INFO_DETAILS_LSB 0
-#define PHYRX_HE_SIG_A_SU_1_HE_SIG_A_SU_INFO_PHYRX_HE_SIG_A_SU_INFO_DETAILS_MASK 0xffffffff
+
+ /* EXTERNAL REFERENCE : struct he_sig_a_su_info phyrx_he_sig_a_su_info_details */
+
+
+/* Description		PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_FORMAT_INDICATION
+
+			<enum 0 HE_SIGA_FORMAT_HE_TRIG>
+
+			<enum 1 HE_SIGA_FORMAT_SU_OR_EXT_SU>
+
+			<legal all>
+*/
+#define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_FORMAT_INDICATION_OFFSET 0x00000000
+#define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_FORMAT_INDICATION_LSB 0
+#define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_FORMAT_INDICATION_MASK 0x00000001
+
+/* Description		PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_BEAM_CHANGE
+
+			Indicates whether spatial mapping is changed between
+			legacy and HE portion of preamble. If not, channel
+			estimation can include legacy preamble to improve accuracy
+
+			<legal all>
+*/
+#define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_BEAM_CHANGE_OFFSET 0x00000000
+#define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_BEAM_CHANGE_LSB 1
+#define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_BEAM_CHANGE_MASK 0x00000002
+
+/* Description		PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DL_UL_FLAG
+
+			Differentiates between DL and UL transmission
+
+
+
+			<enum 0 DL_UL_FLAG_IS_DL_OR_TDLS>
+
+			<enum 1 DL_UL_FLAG_IS_UL>
+
+			<legal all>
+*/
+#define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DL_UL_FLAG_OFFSET 0x00000000
+#define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DL_UL_FLAG_LSB 2
+#define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DL_UL_FLAG_MASK 0x00000004
+
+/* Description		PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TRANSMIT_MCS
+
+			Indicates the data MCS
+
+
+
+			Field Used by MAC HW
+
+			<legal all>
+*/
+#define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TRANSMIT_MCS_OFFSET 0x00000000
+#define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TRANSMIT_MCS_LSB 3
+#define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TRANSMIT_MCS_MASK 0x00000078
+
+/* Description		PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DCM
+
+
+			0: No DCM
+
+			1:DCM
+
+			<legal all>
+*/
+#define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DCM_OFFSET 0x00000000
+#define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DCM_LSB   7
+#define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DCM_MASK  0x00000080
+
+/* Description		PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_BSS_COLOR_ID
+
+			BSS color ID
+
+
+
+			Field Used by MAC HW
+
+			<legal all>
+*/
+#define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_BSS_COLOR_ID_OFFSET 0x00000000
+#define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_BSS_COLOR_ID_LSB 8
+#define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_BSS_COLOR_ID_MASK 0x00003f00
+
+/* Description		PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_0A
+
+			Note: spec indicates this shall be set to 1
+
+			<legal 1>
+*/
+#define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_0A_OFFSET 0x00000000
+#define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_0A_LSB 14
+#define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_0A_MASK 0x00004000
+
+/* Description		PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_SPATIAL_REUSE
+
+			Spatial reuse
+
+
+
+			For 20MHz one SR field corresponding to entire 20MHz
+			(other 3 fields indicate identical values)
+
+			For 40MHz two SR fields for each 20MHz (other 2 fields
+			indicate identical values)
+
+			For 80MHz four SR fields for each 20MHz
+
+			For 160MHz four SR fields for each 40MHz
+
+			<legal all>
+*/
+#define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_SPATIAL_REUSE_OFFSET 0x00000000
+#define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_SPATIAL_REUSE_LSB 15
+#define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_SPATIAL_REUSE_MASK 0x00078000
+
+/* Description		PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TRANSMIT_BW
+
+			Bandwidth of the PPDU.
+
+
+
+			For HE SU PPDU
+
+
+			<enum 0 HE_SIG_A_BW20> 20 Mhz
+
+			<enum 1 HE_SIG_A_BW40> 40 Mhz
+
+			<enum 2 HE_SIG_A_BW80> 80 Mhz
+
+			<enum 3 HE_SIG_A_BW160> 160 MHz or 80+80 MHz
+
+
+
+			For HE Extended Range SU PPDU
+
+			Set to 0 for 242-tone RU
+			 Set to 1 for right 106-tone RU within the primary 20 MHz
+
+
+
+			On RX side, Field Used by MAC HW
+
+			<legal all>
+*/
+#define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TRANSMIT_BW_OFFSET 0x00000000
+#define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TRANSMIT_BW_LSB 19
+#define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TRANSMIT_BW_MASK 0x00180000
+
+/* Description		PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_CP_LTF_SIZE
+
+			Indicates the CP and HE-LTF type
+
+
+
+			<enum 0 OneX_LTF_0_8CP> 1xLTF + 0.8 us CP (See note for
+			proprietary mode)
+
+			<enum 1 TwoX_LTF_0_8CP> 2x LTF + 0.8 µs CP (See note
+			for proprietary mode)
+
+			<enum 2 TwoX_LTF_1_6CP> 2x LTF + 1.6 µs CP (See note
+			for proprietary mode)
+
+
+
+			<enum 3 FourX_LTF_0_8CP_3_2CP>
+
+			When DCM == 0 OR STBC == 0: 4x LTF + 3.2 µs CP
+
+			When DCM == 1 AND STBC == 1: 4x LTF + 0.8 µs CP. Note:
+			In this scenario, Neither DCM nor STBC is applied to HE data
+			field.
+
+			(See note for proprietary mode)
+
+
+
+			NOTE:
+
+			For QC proprietary mode
+
+			If ( DCM == 1 ) and ( MCS > 0 ) and (STBC == 0)
+
+			0      = 1xLTF + 0.4 usec
+
+			1      = 2xLTF + 0.4 usec
+
+			2~3 = Reserved
+
+
+
+			<legal all>
+*/
+#define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_CP_LTF_SIZE_OFFSET 0x00000000
+#define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_CP_LTF_SIZE_LSB 21
+#define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_CP_LTF_SIZE_MASK 0x00600000
+
+/* Description		PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_NSTS
+
+
+
+
+			For HE SU PPDU
+
+
+
+			For HE Extended Range PPDU
+
+			<legal all>
+*/
+#define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_NSTS_OFFSET 0x00000000
+#define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_NSTS_LSB  23
+#define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_NSTS_MASK 0x03800000
+
+/* Description		PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_0B
+
+			<legal 0>
+*/
+#define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_0B_OFFSET 0x00000000
+#define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_0B_LSB 26
+#define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_0B_MASK 0xfc000000
+
+/* Description		PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TXOP_DURATION
+
+			Indicates the remaining time in the current TXOP
+
+
+
+			Field Used by MAC HW
+
+			 <legal all>
+*/
+#define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TXOP_DURATION_OFFSET 0x00000004
+#define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TXOP_DURATION_LSB 0
+#define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TXOP_DURATION_MASK 0x0000007f
+
+/* Description		PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_CODING
+
+			Distinguishes between BCC and LDPC coding.
+
+
+
+			0: BCC
+
+			1: LDPC
+
+			<legal all>
+*/
+#define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_CODING_OFFSET 0x00000004
+#define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_CODING_LSB 7
+#define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_CODING_MASK 0x00000080
+
+/* Description		PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_LDPC_EXTRA_SYMBOL
+
+			If LDPC,
+
+			  0: LDPC extra symbol not present
+
+			  1: LDPC extra symbol present
+
+			Else
+
+			  Set to 1
+
+			<legal all>
+*/
+#define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_LDPC_EXTRA_SYMBOL_OFFSET 0x00000004
+#define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_LDPC_EXTRA_SYMBOL_LSB 8
+#define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_LDPC_EXTRA_SYMBOL_MASK 0x00000100
+
+/* Description		PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_STBC
+
+			Indicates whether STBC is applied
+
+			0: No STBC
+
+			1: STBC
+
+			<legal all>
+*/
+#define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_STBC_OFFSET 0x00000004
+#define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_STBC_LSB  9
+#define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_STBC_MASK 0x00000200
+
+/* Description		PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TXBF
+
+			Indicates whether beamforming is applied
+
+			0: No beamforming
+
+			1: beamforming
+
+			<legal all>
+*/
+#define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TXBF_OFFSET 0x00000004
+#define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TXBF_LSB  10
+#define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TXBF_MASK 0x00000400
+
+/* Description		PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_PACKET_EXTENSION_A_FACTOR
+
+			Common trigger info
+
+
+
+			the packet extension duration of the trigger-based PPDU
+			response with these two bits indicating the a-factor
+
+
+
+			<enum 0 a_factor_4>
+
+			<enum 1 a_factor_1>
+
+			<enum 2 a_factor_2>
+
+			<enum 3 a_factor_3>
+
+
+
+			<legal all>
+*/
+#define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_PACKET_EXTENSION_A_FACTOR_OFFSET 0x00000004
+#define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_PACKET_EXTENSION_A_FACTOR_LSB 11
+#define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_PACKET_EXTENSION_A_FACTOR_MASK 0x00001800
+
+/* Description		PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_PACKET_EXTENSION_PE_DISAMBIGUITY
+
+			Common trigger info
+
+
+
+			the packet extension duration of the trigger-based PPDU
+			response with this bit indicating the PE-Disambiguity
+
+			<legal all>
+*/
+#define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_PACKET_EXTENSION_PE_DISAMBIGUITY_OFFSET 0x00000004
+#define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_PACKET_EXTENSION_PE_DISAMBIGUITY_LSB 13
+#define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_PACKET_EXTENSION_PE_DISAMBIGUITY_MASK 0x00002000
+
+/* Description		PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_1A
+
+			Note: per standard, set to 1
+
+			<legal 1>
+*/
+#define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_1A_OFFSET 0x00000004
+#define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_1A_LSB 14
+#define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_1A_MASK 0x00004000
+
+/* Description		PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DOPPLER_INDICATION
+
+			0: No Doppler support
+
+			1: Doppler support
+
+			<legal all>
+*/
+#define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DOPPLER_INDICATION_OFFSET 0x00000004
+#define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DOPPLER_INDICATION_LSB 15
+#define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DOPPLER_INDICATION_MASK 0x00008000
+
+/* Description		PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_CRC
+
+			CRC for HE-SIG-A contents.
+
+			<legal all>
+*/
+#define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_CRC_OFFSET 0x00000004
+#define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_CRC_LSB   16
+#define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_CRC_MASK  0x000f0000
+
+/* Description		PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TAIL
+
+			<legal 0>
+*/
+#define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TAIL_OFFSET 0x00000004
+#define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TAIL_LSB  20
+#define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TAIL_MASK 0x03f00000
+
+/* Description		PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DOT11AX_SU_EXTENDED
+
+			TX side:
+
+			Set to 0
+
+
+
+			RX side:
+
+			On RX side, evaluated by MAC HW. This is the only way
+			for MAC RX to know that this was an HE_SIG_A_SU received in
+			'extended' format
+
+
+
+
+			<legal all>
+*/
+#define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DOT11AX_SU_EXTENDED_OFFSET 0x00000004
+#define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DOT11AX_SU_EXTENDED_LSB 26
+#define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DOT11AX_SU_EXTENDED_MASK 0x04000000
+
+/* Description		PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DOT11AX_EXT_RU_SIZE
+
+			TX side:
+
+			Set to 0
+
+
+
+			RX side:
+
+			Field only contains valid info when dot11ax_su_extended
+			is set.
+
+
+
+			On RX side, evaluated by MAC HW. This is the only way
+			for MAC RX to know what the number of based RUs was in this
+			extended range reception. It is used by the MAC to determine
+			the RU size for the response...
+
+			<legal all>
+*/
+#define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DOT11AX_EXT_RU_SIZE_OFFSET 0x00000004
+#define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DOT11AX_EXT_RU_SIZE_LSB 27
+#define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DOT11AX_EXT_RU_SIZE_MASK 0x78000000
+
+/* Description		PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RX_NDP
+
+			TX side:
+
+			Set to 0
+
+
+
+			RX side:Valid on RX side only, and looked at by MAC HW
+
+
+
+			When set, PHY has received (expected) NDP frame
+
+			<legal all>
+*/
+#define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RX_NDP_OFFSET 0x00000004
+#define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RX_NDP_LSB 31
+#define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RX_NDP_MASK 0x80000000
 
 
 #endif // _PHYRX_HE_SIG_A_SU_H_

hw/qca6490/v1/phyrx_he_sig_b1_mu.h

@@ -43,9 +43,32 @@ struct he_sig_b1_mu_info phyrx_he_sig_b1_mu_info_details
 			See detailed description of the STRUCT
 */
 
-#define PHYRX_HE_SIG_B1_MU_0_HE_SIG_B1_MU_INFO_PHYRX_HE_SIG_B1_MU_INFO_DETAILS_OFFSET 0x00000000
-#define PHYRX_HE_SIG_B1_MU_0_HE_SIG_B1_MU_INFO_PHYRX_HE_SIG_B1_MU_INFO_DETAILS_LSB 0
-#define PHYRX_HE_SIG_B1_MU_0_HE_SIG_B1_MU_INFO_PHYRX_HE_SIG_B1_MU_INFO_DETAILS_MASK 0xffffffff
+
+ /* EXTERNAL REFERENCE : struct he_sig_b1_mu_info phyrx_he_sig_b1_mu_info_details */
+
+
+/* Description		PHYRX_HE_SIG_B1_MU_0_PHYRX_HE_SIG_B1_MU_INFO_DETAILS_RU_ALLOCATION
+
+			RU allocation for the user(s) following this common
+			portion of the SIG
+
+
+
+			For details, refer to  RU_TYPE description
+
+			<legal all>
+*/
+#define PHYRX_HE_SIG_B1_MU_0_PHYRX_HE_SIG_B1_MU_INFO_DETAILS_RU_ALLOCATION_OFFSET 0x00000000
+#define PHYRX_HE_SIG_B1_MU_0_PHYRX_HE_SIG_B1_MU_INFO_DETAILS_RU_ALLOCATION_LSB 0
+#define PHYRX_HE_SIG_B1_MU_0_PHYRX_HE_SIG_B1_MU_INFO_DETAILS_RU_ALLOCATION_MASK 0x000000ff
+
+/* Description		PHYRX_HE_SIG_B1_MU_0_PHYRX_HE_SIG_B1_MU_INFO_DETAILS_RESERVED_0
+
+			<legal 0>
+*/
+#define PHYRX_HE_SIG_B1_MU_0_PHYRX_HE_SIG_B1_MU_INFO_DETAILS_RESERVED_0_OFFSET 0x00000000
+#define PHYRX_HE_SIG_B1_MU_0_PHYRX_HE_SIG_B1_MU_INFO_DETAILS_RESERVED_0_LSB 8
+#define PHYRX_HE_SIG_B1_MU_0_PHYRX_HE_SIG_B1_MU_INFO_DETAILS_RESERVED_0_MASK 0xffffff00
 
 
 #endif // _PHYRX_HE_SIG_B1_MU_H_

hw/qca6490/v1/phyrx_he_sig_b2_mu.h

@@ -43,9 +43,103 @@ struct he_sig_b2_mu_info phyrx_he_sig_b2_mu_info_details
 			See detailed description of the STRUCT
 */
 
-#define PHYRX_HE_SIG_B2_MU_0_HE_SIG_B2_MU_INFO_PHYRX_HE_SIG_B2_MU_INFO_DETAILS_OFFSET 0x00000000
-#define PHYRX_HE_SIG_B2_MU_0_HE_SIG_B2_MU_INFO_PHYRX_HE_SIG_B2_MU_INFO_DETAILS_LSB 0
-#define PHYRX_HE_SIG_B2_MU_0_HE_SIG_B2_MU_INFO_PHYRX_HE_SIG_B2_MU_INFO_DETAILS_MASK 0xffffffff
+
+ /* EXTERNAL REFERENCE : struct he_sig_b2_mu_info phyrx_he_sig_b2_mu_info_details */
+
+
+/* Description		PHYRX_HE_SIG_B2_MU_0_PHYRX_HE_SIG_B2_MU_INFO_DETAILS_STA_ID
+
+			Identifies the STA that is addressed. Details of STA ID
+			are TBD
+*/
+#define PHYRX_HE_SIG_B2_MU_0_PHYRX_HE_SIG_B2_MU_INFO_DETAILS_STA_ID_OFFSET 0x00000000
+#define PHYRX_HE_SIG_B2_MU_0_PHYRX_HE_SIG_B2_MU_INFO_DETAILS_STA_ID_LSB 0
+#define PHYRX_HE_SIG_B2_MU_0_PHYRX_HE_SIG_B2_MU_INFO_DETAILS_STA_ID_MASK 0x000007ff
+
+/* Description		PHYRX_HE_SIG_B2_MU_0_PHYRX_HE_SIG_B2_MU_INFO_DETAILS_STA_SPATIAL_CONFIG
+
+			Number of assigned spatial streams and their
+			corresponding index.
+
+			Total number of spatial streams assigned for the MU-MIMO
+			allocation is also signaled.
+*/
+#define PHYRX_HE_SIG_B2_MU_0_PHYRX_HE_SIG_B2_MU_INFO_DETAILS_STA_SPATIAL_CONFIG_OFFSET 0x00000000
+#define PHYRX_HE_SIG_B2_MU_0_PHYRX_HE_SIG_B2_MU_INFO_DETAILS_STA_SPATIAL_CONFIG_LSB 11
+#define PHYRX_HE_SIG_B2_MU_0_PHYRX_HE_SIG_B2_MU_INFO_DETAILS_STA_SPATIAL_CONFIG_MASK 0x00007800
+
+/* Description		PHYRX_HE_SIG_B2_MU_0_PHYRX_HE_SIG_B2_MU_INFO_DETAILS_STA_MCS
+
+			Indicates the data MCS
+*/
+#define PHYRX_HE_SIG_B2_MU_0_PHYRX_HE_SIG_B2_MU_INFO_DETAILS_STA_MCS_OFFSET 0x00000000
+#define PHYRX_HE_SIG_B2_MU_0_PHYRX_HE_SIG_B2_MU_INFO_DETAILS_STA_MCS_LSB 15
+#define PHYRX_HE_SIG_B2_MU_0_PHYRX_HE_SIG_B2_MU_INFO_DETAILS_STA_MCS_MASK 0x00078000
+
+/* Description		PHYRX_HE_SIG_B2_MU_0_PHYRX_HE_SIG_B2_MU_INFO_DETAILS_RESERVED_SET_TO_1
+
+			<legal 1>
+*/
+#define PHYRX_HE_SIG_B2_MU_0_PHYRX_HE_SIG_B2_MU_INFO_DETAILS_RESERVED_SET_TO_1_OFFSET 0x00000000
+#define PHYRX_HE_SIG_B2_MU_0_PHYRX_HE_SIG_B2_MU_INFO_DETAILS_RESERVED_SET_TO_1_LSB 19
+#define PHYRX_HE_SIG_B2_MU_0_PHYRX_HE_SIG_B2_MU_INFO_DETAILS_RESERVED_SET_TO_1_MASK 0x00080000
+
+/* Description		PHYRX_HE_SIG_B2_MU_0_PHYRX_HE_SIG_B2_MU_INFO_DETAILS_STA_CODING
+
+			Distinguishes between BCC/LDPC
+
+
+
+			0: BCC
+
+			1: LDPC
+
+			<legal all>
+*/
+#define PHYRX_HE_SIG_B2_MU_0_PHYRX_HE_SIG_B2_MU_INFO_DETAILS_STA_CODING_OFFSET 0x00000000
+#define PHYRX_HE_SIG_B2_MU_0_PHYRX_HE_SIG_B2_MU_INFO_DETAILS_STA_CODING_LSB 20
+#define PHYRX_HE_SIG_B2_MU_0_PHYRX_HE_SIG_B2_MU_INFO_DETAILS_STA_CODING_MASK 0x00100000
+
+/* Description		PHYRX_HE_SIG_B2_MU_0_PHYRX_HE_SIG_B2_MU_INFO_DETAILS_RESERVED_0A
+
+			<legal 0>
+*/
+#define PHYRX_HE_SIG_B2_MU_0_PHYRX_HE_SIG_B2_MU_INFO_DETAILS_RESERVED_0A_OFFSET 0x00000000
+#define PHYRX_HE_SIG_B2_MU_0_PHYRX_HE_SIG_B2_MU_INFO_DETAILS_RESERVED_0A_LSB 21
+#define PHYRX_HE_SIG_B2_MU_0_PHYRX_HE_SIG_B2_MU_INFO_DETAILS_RESERVED_0A_MASK 0x1fe00000
+
+/* Description		PHYRX_HE_SIG_B2_MU_0_PHYRX_HE_SIG_B2_MU_INFO_DETAILS_NSTS
+
+			MAC RX side usage only:
+
+			Needed by RXPCU. Provided by PHY so that RXPCU does not
+			need to have the RU number decoding logic.
+
+
+
+			Number of spatial streams for this user
+
+
+
+			<enum 0 1_spatial_stream>Single spatial stream
+
+			<enum 1 2_spatial_streams>2 spatial streams
+
+			<enum 2 3_spatial_streams>3 spatial streams
+
+			<enum 3 4_spatial_streams>4 spatial streams
+
+			<enum 4 5_spatial_streams>5 spatial streams
+
+			<enum 5 6_spatial_streams>6 spatial streams
+
+			<enum 6 7_spatial_streams>7 spatial streams
+
+			<enum 7 8_spatial_streams>8 spatial streams
+*/
+#define PHYRX_HE_SIG_B2_MU_0_PHYRX_HE_SIG_B2_MU_INFO_DETAILS_NSTS_OFFSET 0x00000000
+#define PHYRX_HE_SIG_B2_MU_0_PHYRX_HE_SIG_B2_MU_INFO_DETAILS_NSTS_LSB 29
+#define PHYRX_HE_SIG_B2_MU_0_PHYRX_HE_SIG_B2_MU_INFO_DETAILS_NSTS_MASK 0xe0000000
 
 
 #endif // _PHYRX_HE_SIG_B2_MU_H_

hw/qca6490/v1/phyrx_he_sig_b2_ofdma.h

@@ -43,9 +43,107 @@ struct he_sig_b2_ofdma_info phyrx_he_sig_b2_ofdma_info_details
 			See detailed description of the STRUCT
 */
 
-#define PHYRX_HE_SIG_B2_OFDMA_0_HE_SIG_B2_OFDMA_INFO_PHYRX_HE_SIG_B2_OFDMA_INFO_DETAILS_OFFSET 0x00000000
-#define PHYRX_HE_SIG_B2_OFDMA_0_HE_SIG_B2_OFDMA_INFO_PHYRX_HE_SIG_B2_OFDMA_INFO_DETAILS_LSB 0
-#define PHYRX_HE_SIG_B2_OFDMA_0_HE_SIG_B2_OFDMA_INFO_PHYRX_HE_SIG_B2_OFDMA_INFO_DETAILS_MASK 0xffffffff
+
+ /* EXTERNAL REFERENCE : struct he_sig_b2_ofdma_info phyrx_he_sig_b2_ofdma_info_details */
+
+
+/* Description		PHYRX_HE_SIG_B2_OFDMA_0_PHYRX_HE_SIG_B2_OFDMA_INFO_DETAILS_STA_ID
+
+			Identifies the STA that is addressed. Details of STA ID
+			are TBD
+*/
+#define PHYRX_HE_SIG_B2_OFDMA_0_PHYRX_HE_SIG_B2_OFDMA_INFO_DETAILS_STA_ID_OFFSET 0x00000000
+#define PHYRX_HE_SIG_B2_OFDMA_0_PHYRX_HE_SIG_B2_OFDMA_INFO_DETAILS_STA_ID_LSB 0
+#define PHYRX_HE_SIG_B2_OFDMA_0_PHYRX_HE_SIG_B2_OFDMA_INFO_DETAILS_STA_ID_MASK 0x000007ff
+
+/* Description		PHYRX_HE_SIG_B2_OFDMA_0_PHYRX_HE_SIG_B2_OFDMA_INFO_DETAILS_NSTS
+
+			MAC RX side usage only:
+
+
+
+			Number of spatial streams for this user
+
+
+
+			<enum 0 1_spatial_stream>Single spatial stream
+
+			<enum 1 2_spatial_streams>2 spatial streams
+
+			<enum 2 3_spatial_streams>3 spatial streams
+
+			<enum 3 4_spatial_streams>4 spatial streams
+
+			<enum 4 5_spatial_streams>5 spatial streams
+
+			<enum 5 6_spatial_streams>6 spatial streams
+
+			<enum 6 7_spatial_streams>7 spatial streams
+
+			<enum 7 8_spatial_streams>8 spatial streams
+*/
+#define PHYRX_HE_SIG_B2_OFDMA_0_PHYRX_HE_SIG_B2_OFDMA_INFO_DETAILS_NSTS_OFFSET 0x00000000
+#define PHYRX_HE_SIG_B2_OFDMA_0_PHYRX_HE_SIG_B2_OFDMA_INFO_DETAILS_NSTS_LSB 11
+#define PHYRX_HE_SIG_B2_OFDMA_0_PHYRX_HE_SIG_B2_OFDMA_INFO_DETAILS_NSTS_MASK 0x00003800
+
+/* Description		PHYRX_HE_SIG_B2_OFDMA_0_PHYRX_HE_SIG_B2_OFDMA_INFO_DETAILS_TXBF
+
+			Indicates whether beamforming is applied
+
+			0: No beamforming
+
+			1: beamforming
+
+			<legal all>
+*/
+#define PHYRX_HE_SIG_B2_OFDMA_0_PHYRX_HE_SIG_B2_OFDMA_INFO_DETAILS_TXBF_OFFSET 0x00000000
+#define PHYRX_HE_SIG_B2_OFDMA_0_PHYRX_HE_SIG_B2_OFDMA_INFO_DETAILS_TXBF_LSB 14
+#define PHYRX_HE_SIG_B2_OFDMA_0_PHYRX_HE_SIG_B2_OFDMA_INFO_DETAILS_TXBF_MASK 0x00004000
+
+/* Description		PHYRX_HE_SIG_B2_OFDMA_0_PHYRX_HE_SIG_B2_OFDMA_INFO_DETAILS_STA_MCS
+
+			Indicates the data MCS
+*/
+#define PHYRX_HE_SIG_B2_OFDMA_0_PHYRX_HE_SIG_B2_OFDMA_INFO_DETAILS_STA_MCS_OFFSET 0x00000000
+#define PHYRX_HE_SIG_B2_OFDMA_0_PHYRX_HE_SIG_B2_OFDMA_INFO_DETAILS_STA_MCS_LSB 15
+#define PHYRX_HE_SIG_B2_OFDMA_0_PHYRX_HE_SIG_B2_OFDMA_INFO_DETAILS_STA_MCS_MASK 0x00078000
+
+/* Description		PHYRX_HE_SIG_B2_OFDMA_0_PHYRX_HE_SIG_B2_OFDMA_INFO_DETAILS_STA_DCM
+
+
+			0: No DCM
+
+			1:DCM
+
+			<legal all>
+*/
+#define PHYRX_HE_SIG_B2_OFDMA_0_PHYRX_HE_SIG_B2_OFDMA_INFO_DETAILS_STA_DCM_OFFSET 0x00000000
+#define PHYRX_HE_SIG_B2_OFDMA_0_PHYRX_HE_SIG_B2_OFDMA_INFO_DETAILS_STA_DCM_LSB 19
+#define PHYRX_HE_SIG_B2_OFDMA_0_PHYRX_HE_SIG_B2_OFDMA_INFO_DETAILS_STA_DCM_MASK 0x00080000
+
+/* Description		PHYRX_HE_SIG_B2_OFDMA_0_PHYRX_HE_SIG_B2_OFDMA_INFO_DETAILS_STA_CODING
+
+			Distinguishes between BCC/LDPC
+
+
+
+			0: BCC
+
+			1: LDPC
+
+			<legal all>
+*/
+#define PHYRX_HE_SIG_B2_OFDMA_0_PHYRX_HE_SIG_B2_OFDMA_INFO_DETAILS_STA_CODING_OFFSET 0x00000000
+#define PHYRX_HE_SIG_B2_OFDMA_0_PHYRX_HE_SIG_B2_OFDMA_INFO_DETAILS_STA_CODING_LSB 20
+#define PHYRX_HE_SIG_B2_OFDMA_0_PHYRX_HE_SIG_B2_OFDMA_INFO_DETAILS_STA_CODING_MASK 0x00100000
+
+/* Description		PHYRX_HE_SIG_B2_OFDMA_0_PHYRX_HE_SIG_B2_OFDMA_INFO_DETAILS_RESERVED_0
+
+			<legal 0>
+*/
+#define PHYRX_HE_SIG_B2_OFDMA_0_PHYRX_HE_SIG_B2_OFDMA_INFO_DETAILS_RESERVED_0_OFFSET 0x00000000
+#define PHYRX_HE_SIG_B2_OFDMA_0_PHYRX_HE_SIG_B2_OFDMA_INFO_DETAILS_RESERVED_0_LSB 21
+#define PHYRX_HE_SIG_B2_OFDMA_0_PHYRX_HE_SIG_B2_OFDMA_INFO_DETAILS_RESERVED_0_MASK 0xffe00000
 
 
 #endif // _PHYRX_HE_SIG_B2_OFDMA_H_

hw/qca6490/v1/phyrx_ht_sig.h

@@ -43,12 +43,205 @@ struct ht_sig_info phyrx_ht_sig_info_details
 			See detailed description of the STRUCT
 */
 
-#define PHYRX_HT_SIG_0_HT_SIG_INFO_PHYRX_HT_SIG_INFO_DETAILS_OFFSET  0x00000000
-#define PHYRX_HT_SIG_0_HT_SIG_INFO_PHYRX_HT_SIG_INFO_DETAILS_LSB     0
-#define PHYRX_HT_SIG_0_HT_SIG_INFO_PHYRX_HT_SIG_INFO_DETAILS_MASK    0xffffffff
-#define PHYRX_HT_SIG_1_HT_SIG_INFO_PHYRX_HT_SIG_INFO_DETAILS_OFFSET  0x00000004
-#define PHYRX_HT_SIG_1_HT_SIG_INFO_PHYRX_HT_SIG_INFO_DETAILS_LSB     0
-#define PHYRX_HT_SIG_1_HT_SIG_INFO_PHYRX_HT_SIG_INFO_DETAILS_MASK    0xffffffff
+
+ /* EXTERNAL REFERENCE : struct ht_sig_info phyrx_ht_sig_info_details */
+
+
+/* Description		PHYRX_HT_SIG_0_PHYRX_HT_SIG_INFO_DETAILS_MCS
+
+			Modulation Coding Scheme:
+
+			0-7 are used for single stream
+
+			8-15 are used for 2 streams
+
+			16-23 are used for 3 streams
+
+			24-31 are used for 4 streams
+
+			32 is used for duplicate HT20 (unsupported)
+
+			33-76 is used for unequal modulation (unsupported)
+
+			77-127 is reserved.
+
+			<legal 0-31>
+*/
+#define PHYRX_HT_SIG_0_PHYRX_HT_SIG_INFO_DETAILS_MCS_OFFSET          0x00000000
+#define PHYRX_HT_SIG_0_PHYRX_HT_SIG_INFO_DETAILS_MCS_LSB             0
+#define PHYRX_HT_SIG_0_PHYRX_HT_SIG_INFO_DETAILS_MCS_MASK            0x0000007f
+
+/* Description		PHYRX_HT_SIG_0_PHYRX_HT_SIG_INFO_DETAILS_CBW
+
+			Packet bandwidth:
+
+			<enum 0     ht_20_mhz>
+
+			<enum 1     ht_40_mhz>
+
+			<legal 0-1>
+*/
+#define PHYRX_HT_SIG_0_PHYRX_HT_SIG_INFO_DETAILS_CBW_OFFSET          0x00000000
+#define PHYRX_HT_SIG_0_PHYRX_HT_SIG_INFO_DETAILS_CBW_LSB             7
+#define PHYRX_HT_SIG_0_PHYRX_HT_SIG_INFO_DETAILS_CBW_MASK            0x00000080
+
+/* Description		PHYRX_HT_SIG_0_PHYRX_HT_SIG_INFO_DETAILS_LENGTH
+
+			This is the MPDU or A-MPDU length in octets of the PPDU
+
+			<legal all>
+*/
+#define PHYRX_HT_SIG_0_PHYRX_HT_SIG_INFO_DETAILS_LENGTH_OFFSET       0x00000000
+#define PHYRX_HT_SIG_0_PHYRX_HT_SIG_INFO_DETAILS_LENGTH_LSB          8
+#define PHYRX_HT_SIG_0_PHYRX_HT_SIG_INFO_DETAILS_LENGTH_MASK         0x00ffff00
+
+/* Description		PHYRX_HT_SIG_0_PHYRX_HT_SIG_INFO_DETAILS_RESERVED_0
+
+			This field is not part of HT-SIG
+
+			Reserved: Should be set to 0 by the MAC and ignored by
+			the PHY <legal 0>
+*/
+#define PHYRX_HT_SIG_0_PHYRX_HT_SIG_INFO_DETAILS_RESERVED_0_OFFSET   0x00000000
+#define PHYRX_HT_SIG_0_PHYRX_HT_SIG_INFO_DETAILS_RESERVED_0_LSB      24
+#define PHYRX_HT_SIG_0_PHYRX_HT_SIG_INFO_DETAILS_RESERVED_0_MASK     0xff000000
+
+/* Description		PHYRX_HT_SIG_1_PHYRX_HT_SIG_INFO_DETAILS_SMOOTHING
+
+			Field indicates if smoothing is needed
+
+			E_num 0     do_smoothing Unsupported setting: indicates
+			smoothing is often used for beamforming
+
+
+			<legal 1>
+*/
+#define PHYRX_HT_SIG_1_PHYRX_HT_SIG_INFO_DETAILS_SMOOTHING_OFFSET    0x00000004
+#define PHYRX_HT_SIG_1_PHYRX_HT_SIG_INFO_DETAILS_SMOOTHING_LSB       0
+#define PHYRX_HT_SIG_1_PHYRX_HT_SIG_INFO_DETAILS_SMOOTHING_MASK      0x00000001
+
+/* Description		PHYRX_HT_SIG_1_PHYRX_HT_SIG_INFO_DETAILS_NOT_SOUNDING
+
+			E_num 0     sounding Unsupported setting: indicates
+			sounding is used
+
+			<enum 1     no_sounding>  Indicates no sounding is used
+
+			<legal 1>
+*/
+#define PHYRX_HT_SIG_1_PHYRX_HT_SIG_INFO_DETAILS_NOT_SOUNDING_OFFSET 0x00000004
+#define PHYRX_HT_SIG_1_PHYRX_HT_SIG_INFO_DETAILS_NOT_SOUNDING_LSB    1
+#define PHYRX_HT_SIG_1_PHYRX_HT_SIG_INFO_DETAILS_NOT_SOUNDING_MASK   0x00000002
+
+/* Description		PHYRX_HT_SIG_1_PHYRX_HT_SIG_INFO_DETAILS_HT_RESERVED
+
+			Reserved: Should be set to 1 by the MAC and ignored by
+			the PHY
+
+			<legal 1>
+*/
+#define PHYRX_HT_SIG_1_PHYRX_HT_SIG_INFO_DETAILS_HT_RESERVED_OFFSET  0x00000004
+#define PHYRX_HT_SIG_1_PHYRX_HT_SIG_INFO_DETAILS_HT_RESERVED_LSB     2
+#define PHYRX_HT_SIG_1_PHYRX_HT_SIG_INFO_DETAILS_HT_RESERVED_MASK    0x00000004
+
+/* Description		PHYRX_HT_SIG_1_PHYRX_HT_SIG_INFO_DETAILS_AGGREGATION
+
+			<enum 0     mpdu> Indicates MPDU format
+
+			<enum 1     a_mpdu> Indicates A-MPDU format
+
+			<legal 0-1>
+*/
+#define PHYRX_HT_SIG_1_PHYRX_HT_SIG_INFO_DETAILS_AGGREGATION_OFFSET  0x00000004
+#define PHYRX_HT_SIG_1_PHYRX_HT_SIG_INFO_DETAILS_AGGREGATION_LSB     3
+#define PHYRX_HT_SIG_1_PHYRX_HT_SIG_INFO_DETAILS_AGGREGATION_MASK    0x00000008
+
+/* Description		PHYRX_HT_SIG_1_PHYRX_HT_SIG_INFO_DETAILS_STBC
+
+			<enum 0     no_stbc> Indicates no STBC
+
+			<enum 1     1_str_stbc> Indicates 1 stream STBC
+
+			E_num 2     2_str_stbc Indicates 2 stream STBC
+			(Unsupported)
+
+			<legal 0-1>
+*/
+#define PHYRX_HT_SIG_1_PHYRX_HT_SIG_INFO_DETAILS_STBC_OFFSET         0x00000004
+#define PHYRX_HT_SIG_1_PHYRX_HT_SIG_INFO_DETAILS_STBC_LSB            4
+#define PHYRX_HT_SIG_1_PHYRX_HT_SIG_INFO_DETAILS_STBC_MASK           0x00000030
+
+/* Description		PHYRX_HT_SIG_1_PHYRX_HT_SIG_INFO_DETAILS_FEC_CODING
+
+			<enum 0     ht_bcc>  Indicates BCC coding
+
+			<enum 1     ht_ldpc>  Indicates LDPC coding
+
+			<legal 0-1>
+*/
+#define PHYRX_HT_SIG_1_PHYRX_HT_SIG_INFO_DETAILS_FEC_CODING_OFFSET   0x00000004
+#define PHYRX_HT_SIG_1_PHYRX_HT_SIG_INFO_DETAILS_FEC_CODING_LSB      6
+#define PHYRX_HT_SIG_1_PHYRX_HT_SIG_INFO_DETAILS_FEC_CODING_MASK     0x00000040
+
+/* Description		PHYRX_HT_SIG_1_PHYRX_HT_SIG_INFO_DETAILS_SHORT_GI
+
+			<enum 0     ht_normal_gi>  Indicates normal guard
+			interval
+
+
+			<legal 0-1>
+*/
+#define PHYRX_HT_SIG_1_PHYRX_HT_SIG_INFO_DETAILS_SHORT_GI_OFFSET     0x00000004
+#define PHYRX_HT_SIG_1_PHYRX_HT_SIG_INFO_DETAILS_SHORT_GI_LSB        7
+#define PHYRX_HT_SIG_1_PHYRX_HT_SIG_INFO_DETAILS_SHORT_GI_MASK       0x00000080
+
+/* Description		PHYRX_HT_SIG_1_PHYRX_HT_SIG_INFO_DETAILS_NUM_EXT_SP_STR
+
+			Number of extension spatial streams: (Used for TxBF)
+
+			<enum 0     0_ext_sp_str>  No extension spatial streams
+
+			E_num 1     1_ext_sp_str  Not supported: 1 extension
+			spatial streams
+
+			E_num 2     2_ext_sp_str  Not supported:  2 extension
+			spatial streams
+
+			<legal 0>
+*/
+#define PHYRX_HT_SIG_1_PHYRX_HT_SIG_INFO_DETAILS_NUM_EXT_SP_STR_OFFSET 0x00000004
+#define PHYRX_HT_SIG_1_PHYRX_HT_SIG_INFO_DETAILS_NUM_EXT_SP_STR_LSB  8
+#define PHYRX_HT_SIG_1_PHYRX_HT_SIG_INFO_DETAILS_NUM_EXT_SP_STR_MASK 0x00000300
+
+/* Description		PHYRX_HT_SIG_1_PHYRX_HT_SIG_INFO_DETAILS_CRC
+
+			The CRC protects the HT-SIG (HT-SIG[0][23:0] and
+			HT-SIG[1][9:0]. The generator polynomial is G(D) = D8 + D2 +
+			D + 1.  <legal all>
+*/
+#define PHYRX_HT_SIG_1_PHYRX_HT_SIG_INFO_DETAILS_CRC_OFFSET          0x00000004
+#define PHYRX_HT_SIG_1_PHYRX_HT_SIG_INFO_DETAILS_CRC_LSB             10
+#define PHYRX_HT_SIG_1_PHYRX_HT_SIG_INFO_DETAILS_CRC_MASK            0x0003fc00
+
+/* Description		PHYRX_HT_SIG_1_PHYRX_HT_SIG_INFO_DETAILS_SIGNAL_TAIL
+
+			The 6 bits of tail is always set to 0 is used to flush
+			the BCC encoder and decoder.  <legal 0>
+*/
+#define PHYRX_HT_SIG_1_PHYRX_HT_SIG_INFO_DETAILS_SIGNAL_TAIL_OFFSET  0x00000004
+#define PHYRX_HT_SIG_1_PHYRX_HT_SIG_INFO_DETAILS_SIGNAL_TAIL_LSB     18
+#define PHYRX_HT_SIG_1_PHYRX_HT_SIG_INFO_DETAILS_SIGNAL_TAIL_MASK    0x00fc0000
+
+/* Description		PHYRX_HT_SIG_1_PHYRX_HT_SIG_INFO_DETAILS_RESERVED_1
+
+			This field is not part of HT-SIG:
+
+			Reserved: Should be set to 0 by the MAC and ignored by
+			the PHY.  <legal 0>
+*/
+#define PHYRX_HT_SIG_1_PHYRX_HT_SIG_INFO_DETAILS_RESERVED_1_OFFSET   0x00000004
+#define PHYRX_HT_SIG_1_PHYRX_HT_SIG_INFO_DETAILS_RESERVED_1_LSB      24
+#define PHYRX_HT_SIG_1_PHYRX_HT_SIG_INFO_DETAILS_RESERVED_1_MASK     0xff000000
 
 
 #endif // _PHYRX_HT_SIG_H_

hw/qca6490/v1/phyrx_l_sig_a.h

@@ -43,9 +43,139 @@ struct l_sig_a_info phyrx_l_sig_a_info_details
 			See detailed description of the STRUCT
 */
 
-#define PHYRX_L_SIG_A_0_L_SIG_A_INFO_PHYRX_L_SIG_A_INFO_DETAILS_OFFSET 0x00000000
-#define PHYRX_L_SIG_A_0_L_SIG_A_INFO_PHYRX_L_SIG_A_INFO_DETAILS_LSB  0
-#define PHYRX_L_SIG_A_0_L_SIG_A_INFO_PHYRX_L_SIG_A_INFO_DETAILS_MASK 0xffffffff
+
+ /* EXTERNAL REFERENCE : struct l_sig_a_info phyrx_l_sig_a_info_details */
+
+
+/* Description		PHYRX_L_SIG_A_0_PHYRX_L_SIG_A_INFO_DETAILS_RATE
+
+			This format is originally defined for OFDM as a 4 bit
+			field but the 5th bit was added to indicate 11b formatted
+			frames.  In the standard bit [4] is specified as reserved.
+			For 11b frames this L-SIG is transformed in the PHY into the
+			11b preamble format.  The following are the rates:
+
+			<enum 8     ofdm_48_mbps> 64-QAM 2/3 (48 Mbps)
+
+			<enum 9     ofdm_24_mbps> 16-QAM 1/2 (24 Mbps)
+
+			<enum 10     ofdm_12_mbps> QPSK 1/2 (12 Mbps)
+
+			<enum 11     ofdm_6_mbps> BPSK 1/2 (6 Mbps)
+
+			<enum 12     ofdm_54_mbps> 64-QAM 3/4 (54 Mbps)
+
+			<enum 13     ofdm_36_mbps> 16-QAM 3/4 (36 Mbps)
+
+			<enum 14     ofdm_18_mbps> QPSK 1/2 (18 Mbps)
+
+			<enum 15     ofdm_9_mbps> BPSK 3/4 (9 Mbps)
+
+			<legal 8-15>
+*/
+#define PHYRX_L_SIG_A_0_PHYRX_L_SIG_A_INFO_DETAILS_RATE_OFFSET       0x00000000
+#define PHYRX_L_SIG_A_0_PHYRX_L_SIG_A_INFO_DETAILS_RATE_LSB          0
+#define PHYRX_L_SIG_A_0_PHYRX_L_SIG_A_INFO_DETAILS_RATE_MASK         0x0000000f
+
+/* Description		PHYRX_L_SIG_A_0_PHYRX_L_SIG_A_INFO_DETAILS_LSIG_RESERVED
+
+			Reserved: Should be set to 0 by the MAC and ignored by
+			the PHY
+
+			<legal 0>
+*/
+#define PHYRX_L_SIG_A_0_PHYRX_L_SIG_A_INFO_DETAILS_LSIG_RESERVED_OFFSET 0x00000000
+#define PHYRX_L_SIG_A_0_PHYRX_L_SIG_A_INFO_DETAILS_LSIG_RESERVED_LSB 4
+#define PHYRX_L_SIG_A_0_PHYRX_L_SIG_A_INFO_DETAILS_LSIG_RESERVED_MASK 0x00000010
+
+/* Description		PHYRX_L_SIG_A_0_PHYRX_L_SIG_A_INFO_DETAILS_LENGTH
+
+			The length indicates the number of octets in this MPDU.
+			Note that when using mixed mode 11n preamble this length
+			provides the spoofed length for the PPDU.  This length
+			provides part of the information to derive the actually PPDU
+			length.  For legacy OFDM and 11B frames the maximum length
+			is
+
+			<legal all>
+*/
+#define PHYRX_L_SIG_A_0_PHYRX_L_SIG_A_INFO_DETAILS_LENGTH_OFFSET     0x00000000
+#define PHYRX_L_SIG_A_0_PHYRX_L_SIG_A_INFO_DETAILS_LENGTH_LSB        5
+#define PHYRX_L_SIG_A_0_PHYRX_L_SIG_A_INFO_DETAILS_LENGTH_MASK       0x0001ffe0
+
+/* Description		PHYRX_L_SIG_A_0_PHYRX_L_SIG_A_INFO_DETAILS_PARITY
+
+			11a/n/ac TX: This field provides even parity over the
+			first 18 bits of the signal field which means that the sum
+			of 1s in the signal field will always be even on
+
+			11a/n/ac RX: this field contains the received parity
+			field from the L-SIG symbol for the current packet.
+
+			<legal 0-1>
+*/
+#define PHYRX_L_SIG_A_0_PHYRX_L_SIG_A_INFO_DETAILS_PARITY_OFFSET     0x00000000
+#define PHYRX_L_SIG_A_0_PHYRX_L_SIG_A_INFO_DETAILS_PARITY_LSB        17
+#define PHYRX_L_SIG_A_0_PHYRX_L_SIG_A_INFO_DETAILS_PARITY_MASK       0x00020000
+
+/* Description		PHYRX_L_SIG_A_0_PHYRX_L_SIG_A_INFO_DETAILS_TAIL
+
+			The 6 bits of tail is always set to 0 is used to flush
+			the BCC encoder and decoder.  <legal 0>
+*/
+#define PHYRX_L_SIG_A_0_PHYRX_L_SIG_A_INFO_DETAILS_TAIL_OFFSET       0x00000000
+#define PHYRX_L_SIG_A_0_PHYRX_L_SIG_A_INFO_DETAILS_TAIL_LSB          18
+#define PHYRX_L_SIG_A_0_PHYRX_L_SIG_A_INFO_DETAILS_TAIL_MASK         0x00fc0000
+
+/* Description		PHYRX_L_SIG_A_0_PHYRX_L_SIG_A_INFO_DETAILS_PKT_TYPE
+
+			Only used on the RX side.
+
+			Note: This is not really part of L-SIG
+
+
+
+			Packet type:
+
+			<enum 0 dot11a>802.11a PPDU type
+
+			<enum 1 dot11b>802.11b PPDU type
+
+			<enum 2 dot11n_mm>802.11n Mixed Mode PPDU type
+
+			<enum 3 dot11ac>802.11ac PPDU type
+
+			<enum 4 dot11ax>802.11ax PPDU type
+
+			<enum 5 dot11ba>802.11ba (WUR) PPDU type
+*/
+#define PHYRX_L_SIG_A_0_PHYRX_L_SIG_A_INFO_DETAILS_PKT_TYPE_OFFSET   0x00000000
+#define PHYRX_L_SIG_A_0_PHYRX_L_SIG_A_INFO_DETAILS_PKT_TYPE_LSB      24
+#define PHYRX_L_SIG_A_0_PHYRX_L_SIG_A_INFO_DETAILS_PKT_TYPE_MASK     0x0f000000
+
+/* Description		PHYRX_L_SIG_A_0_PHYRX_L_SIG_A_INFO_DETAILS_CAPTURED_IMPLICIT_SOUNDING
+
+			Only used on the RX side.
+
+			Note: This is not really part of L-SIG
+
+
+
+			This indicates that the PHY has captured implicit
+			sounding.
+*/
+#define PHYRX_L_SIG_A_0_PHYRX_L_SIG_A_INFO_DETAILS_CAPTURED_IMPLICIT_SOUNDING_OFFSET 0x00000000
+#define PHYRX_L_SIG_A_0_PHYRX_L_SIG_A_INFO_DETAILS_CAPTURED_IMPLICIT_SOUNDING_LSB 28
+#define PHYRX_L_SIG_A_0_PHYRX_L_SIG_A_INFO_DETAILS_CAPTURED_IMPLICIT_SOUNDING_MASK 0x10000000
+
+/* Description		PHYRX_L_SIG_A_0_PHYRX_L_SIG_A_INFO_DETAILS_RESERVED
+
+			Reserved: Should be set to 0 by the transmitting MAC and
+			ignored by the PHY <legal 0>
+*/
+#define PHYRX_L_SIG_A_0_PHYRX_L_SIG_A_INFO_DETAILS_RESERVED_OFFSET   0x00000000
+#define PHYRX_L_SIG_A_0_PHYRX_L_SIG_A_INFO_DETAILS_RESERVED_LSB      29
+#define PHYRX_L_SIG_A_0_PHYRX_L_SIG_A_INFO_DETAILS_RESERVED_MASK     0xe0000000
 
 
 #endif // _PHYRX_L_SIG_A_H_

hw/qca6490/v1/phyrx_l_sig_b.h

@@ -43,9 +43,50 @@ struct l_sig_b_info phyrx_l_sig_b_info_details
 			See detailed description of the STRUCT
 */
 
-#define PHYRX_L_SIG_B_0_L_SIG_B_INFO_PHYRX_L_SIG_B_INFO_DETAILS_OFFSET 0x00000000
-#define PHYRX_L_SIG_B_0_L_SIG_B_INFO_PHYRX_L_SIG_B_INFO_DETAILS_LSB  0
-#define PHYRX_L_SIG_B_0_L_SIG_B_INFO_PHYRX_L_SIG_B_INFO_DETAILS_MASK 0xffffffff
+
+ /* EXTERNAL REFERENCE : struct l_sig_b_info phyrx_l_sig_b_info_details */
+
+
+/* Description		PHYRX_L_SIG_B_0_PHYRX_L_SIG_B_INFO_DETAILS_RATE
+
+			<enum 1    dsss_1_mpbs_long> DSSS 1 Mbps long
+
+			<enum 2    dsss_2_mbps_long> DSSS 2 Mbps long
+
+			<enum 3    cck_5_5_mbps_long> CCK 5.5 Mbps long
+
+			<enum 4    cck_11_mbps_long> CCK 11 Mbps long
+
+			<enum 5    dsss_2_mbps_short> DSSS 2 Mbps short
+
+			<enum 6    cck_5_5_mbps_short> CCK 5.5 Mbps short
+
+			<enum 7    cck_11_mbps_short> CCK 11 Mbps short
+
+			<legal 1-7>
+*/
+#define PHYRX_L_SIG_B_0_PHYRX_L_SIG_B_INFO_DETAILS_RATE_OFFSET       0x00000000
+#define PHYRX_L_SIG_B_0_PHYRX_L_SIG_B_INFO_DETAILS_RATE_LSB          0
+#define PHYRX_L_SIG_B_0_PHYRX_L_SIG_B_INFO_DETAILS_RATE_MASK         0x0000000f
+
+/* Description		PHYRX_L_SIG_B_0_PHYRX_L_SIG_B_INFO_DETAILS_LENGTH
+
+			The length indicates the number of octets in this MPDU.
+
+			<legal all>
+*/
+#define PHYRX_L_SIG_B_0_PHYRX_L_SIG_B_INFO_DETAILS_LENGTH_OFFSET     0x00000000
+#define PHYRX_L_SIG_B_0_PHYRX_L_SIG_B_INFO_DETAILS_LENGTH_LSB        4
+#define PHYRX_L_SIG_B_0_PHYRX_L_SIG_B_INFO_DETAILS_LENGTH_MASK       0x0000fff0
+
+/* Description		PHYRX_L_SIG_B_0_PHYRX_L_SIG_B_INFO_DETAILS_RESERVED
+
+			Reserved: Should be set to 0 by the transmitting MAC and
+			ignored by the PHY <legal 0>
+*/
+#define PHYRX_L_SIG_B_0_PHYRX_L_SIG_B_INFO_DETAILS_RESERVED_OFFSET   0x00000000
+#define PHYRX_L_SIG_B_0_PHYRX_L_SIG_B_INFO_DETAILS_RESERVED_LSB      16
+#define PHYRX_L_SIG_B_0_PHYRX_L_SIG_B_INFO_DETAILS_RESERVED_MASK     0xffff0000
 
 
 #endif // _PHYRX_L_SIG_B_H_

hw/qca6490/v1/phyrx_rssi_legacy.h

@@ -1412,6 +1412,9 @@ rssi_for_trigger_resp
 
 			Value of 0x80 indicates invalid.
 */
+#define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN0_OFFSET 0x0000004c
+#define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN0_LSB 0
+#define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN0_MASK 0x000000ff
 
 /* Description		PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN0
 
@@ -1420,6 +1423,9 @@ rssi_for_trigger_resp
 
 			Value of 0x80 indicates invalid.
 */
+#define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN0_OFFSET 0x0000004c
+#define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN0_LSB 8
+#define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN0_MASK 0x0000ff00
 
 /* Description		PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN0
 
@@ -1428,6 +1434,9 @@ rssi_for_trigger_resp
 
 			Value of 0x80 indicates invalid.
 */
+#define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN0_OFFSET 0x0000004c
+#define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN0_LSB 16
+#define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN0_MASK 0x00ff0000
 
 /* Description		PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN0
 
@@ -1436,9 +1445,9 @@ rssi_for_trigger_resp
 
 			Value of 0x80 indicates invalid.
 */
-#define PHYRX_RSSI_LEGACY_19_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x0000004c
-#define PHYRX_RSSI_LEGACY_19_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
-#define PHYRX_RSSI_LEGACY_19_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
+#define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN0_OFFSET 0x0000004c
+#define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN0_LSB 24
+#define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN0_MASK 0xff000000
 
 /* Description		PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN0
 
@@ -1447,6 +1456,9 @@ rssi_for_trigger_resp
 
 			Value of 0x80 indicates invalid.
 */
+#define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN0_OFFSET 0x00000050
+#define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN0_LSB 0
+#define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN0_MASK 0x000000ff
 
 /* Description		PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN0
 
@@ -1455,6 +1467,9 @@ rssi_for_trigger_resp
 
 			Value of 0x80 indicates invalid.
 */
+#define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN0_OFFSET 0x00000050
+#define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN0_LSB 8
+#define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN0_MASK 0x0000ff00
 
 /* Description		PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN0
 
@@ -1463,6 +1478,9 @@ rssi_for_trigger_resp
 
 			Value of 0x80 indicates invalid.
 */
+#define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN0_OFFSET 0x00000050
+#define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN0_LSB 16
+#define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN0_MASK 0x00ff0000
 
 /* Description		PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN0
 
@@ -1471,9 +1489,9 @@ rssi_for_trigger_resp
 
 			Value of 0x80 indicates invalid.
 */
-#define PHYRX_RSSI_LEGACY_20_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x00000050
-#define PHYRX_RSSI_LEGACY_20_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
-#define PHYRX_RSSI_LEGACY_20_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
+#define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN0_OFFSET 0x00000050
+#define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN0_LSB 24
+#define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN0_MASK 0xff000000
 
 /* Description		PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN1
 

hw/qca6490/v1/phyrx_vht_sig_a.h

@@ -43,12 +43,328 @@ struct vht_sig_a_info phyrx_vht_sig_a_info_details
 			See detailed description of the STRUCT
 */
 
-#define PHYRX_VHT_SIG_A_0_VHT_SIG_A_INFO_PHYRX_VHT_SIG_A_INFO_DETAILS_OFFSET 0x00000000
-#define PHYRX_VHT_SIG_A_0_VHT_SIG_A_INFO_PHYRX_VHT_SIG_A_INFO_DETAILS_LSB 0
-#define PHYRX_VHT_SIG_A_0_VHT_SIG_A_INFO_PHYRX_VHT_SIG_A_INFO_DETAILS_MASK 0xffffffff
-#define PHYRX_VHT_SIG_A_1_VHT_SIG_A_INFO_PHYRX_VHT_SIG_A_INFO_DETAILS_OFFSET 0x00000004
-#define PHYRX_VHT_SIG_A_1_VHT_SIG_A_INFO_PHYRX_VHT_SIG_A_INFO_DETAILS_LSB 0
-#define PHYRX_VHT_SIG_A_1_VHT_SIG_A_INFO_PHYRX_VHT_SIG_A_INFO_DETAILS_MASK 0xffffffff
+
+ /* EXTERNAL REFERENCE : struct vht_sig_a_info phyrx_vht_sig_a_info_details */
+
+
+/* Description		PHYRX_VHT_SIG_A_0_PHYRX_VHT_SIG_A_INFO_DETAILS_BANDWIDTH
+
+			Packet bandwidth
+
+
+
+			<enum 0    20_MHZ_11AC>
+
+			<enum 1    40_MHZ_11AC>
+
+			<enum 2    80_MHZ_11AC>
+
+			<enum 3    160_MHZ_11AC>
+
+
+
+			<legal 0-3>
+*/
+#define PHYRX_VHT_SIG_A_0_PHYRX_VHT_SIG_A_INFO_DETAILS_BANDWIDTH_OFFSET 0x00000000
+#define PHYRX_VHT_SIG_A_0_PHYRX_VHT_SIG_A_INFO_DETAILS_BANDWIDTH_LSB 0
+#define PHYRX_VHT_SIG_A_0_PHYRX_VHT_SIG_A_INFO_DETAILS_BANDWIDTH_MASK 0x00000003
+
+/* Description		PHYRX_VHT_SIG_A_0_PHYRX_VHT_SIG_A_INFO_DETAILS_VHTA_RESERVED_0
+
+			Reserved.  Set to 1 by MAC, PHY should ignore
+
+			<legal 1>
+*/
+#define PHYRX_VHT_SIG_A_0_PHYRX_VHT_SIG_A_INFO_DETAILS_VHTA_RESERVED_0_OFFSET 0x00000000
+#define PHYRX_VHT_SIG_A_0_PHYRX_VHT_SIG_A_INFO_DETAILS_VHTA_RESERVED_0_LSB 2
+#define PHYRX_VHT_SIG_A_0_PHYRX_VHT_SIG_A_INFO_DETAILS_VHTA_RESERVED_0_MASK 0x00000004
+
+/* Description		PHYRX_VHT_SIG_A_0_PHYRX_VHT_SIG_A_INFO_DETAILS_STBC
+
+			Space time block coding:
+
+			<enum 0     stbc_disabled>  Indicates STBC is disabled
+
+			<enum 1     stbc_enabled>  Indicates STBC is enabled on
+			all streams
+
+			<legal 0-1>
+*/
+#define PHYRX_VHT_SIG_A_0_PHYRX_VHT_SIG_A_INFO_DETAILS_STBC_OFFSET   0x00000000
+#define PHYRX_VHT_SIG_A_0_PHYRX_VHT_SIG_A_INFO_DETAILS_STBC_LSB      3
+#define PHYRX_VHT_SIG_A_0_PHYRX_VHT_SIG_A_INFO_DETAILS_STBC_MASK     0x00000008
+
+/* Description		PHYRX_VHT_SIG_A_0_PHYRX_VHT_SIG_A_INFO_DETAILS_GROUP_ID
+
+			In a SU VHT PPDU, if the PPDU carries MPDU(s) addressed
+			to an AP or to a mesh STA, the Group ID field is set to 0,
+			otherwise it is set to 63.  In an NDP PPDU the Group ID is
+			set according to IEEE 802.11ac_D1.0 Section 9.30.6
+			(Transmission of a VHT NDP). For a MU-MIMO PPDU the Group ID
+			is set as in 802.11ac_D1.0 Section 22.3.11.3 (Group ID).
+			<legal all>
+*/
+#define PHYRX_VHT_SIG_A_0_PHYRX_VHT_SIG_A_INFO_DETAILS_GROUP_ID_OFFSET 0x00000000
+#define PHYRX_VHT_SIG_A_0_PHYRX_VHT_SIG_A_INFO_DETAILS_GROUP_ID_LSB  4
+#define PHYRX_VHT_SIG_A_0_PHYRX_VHT_SIG_A_INFO_DETAILS_GROUP_ID_MASK 0x000003f0
+
+/* Description		PHYRX_VHT_SIG_A_0_PHYRX_VHT_SIG_A_INFO_DETAILS_N_STS
+
+			For MU:
+
+			3 bits/user with maximum of 4 users (user u uses
+
+			vht_sig_a[0][10+3u] - vht_sig_a[0][12+3u]), u = 0, 1, 2,
+			3)
+
+			Set to 0 for 0 space time streams
+
+			Set to 1 for 1 space time stream
+
+			Set to 2 for 2 space time streams
+
+			Set to 3 for 3 space time streams
+
+			Set to 4 for 4 space time streams (not supported in Wifi
+			3.0)
+
+			Values 5-7 are reserved
+
+			In this field, references to user u should be
+			interpreted as MU user u. As described in the previous
+			chapter in this document (see chapter on User number), the
+			MU user value for a given client is defined for each MU
+			group that the client participates in. The MU user number is
+			not related to the internal user number that is used within
+			the BFer.
+
+
+
+
+
+			For SU:
+
+			vht_sig_a[0][12:10]
+
+			Set to 0 for 1 space time stream
+
+			Set to 1 for 2 space time streams
+
+			Set to 2 for 3 space time streams
+
+			Set to 3 for 4 space time streams
+
+			Set to 4 for 5 space time streams
+
+			Set to 5 for 6 space time streams
+
+			Set to 6 for 7 space time streams
+
+			Set to 7 for 8 space time streams
+
+
+
+			vht_sig_a[0][21:13]
+
+			Partial AID:
+
+			Set to the value of the TXVECTOR parameter PARTIAL_AID.
+			Partial AID provides an abbreviated indication of the
+			intended recipient(s) of the frame (see IEEE802.11ac_D1.0
+			Section 9.17a (Partial AID in VHT PPDUs)).
+
+			<legal all>
+*/
+#define PHYRX_VHT_SIG_A_0_PHYRX_VHT_SIG_A_INFO_DETAILS_N_STS_OFFSET  0x00000000
+#define PHYRX_VHT_SIG_A_0_PHYRX_VHT_SIG_A_INFO_DETAILS_N_STS_LSB     10
+#define PHYRX_VHT_SIG_A_0_PHYRX_VHT_SIG_A_INFO_DETAILS_N_STS_MASK    0x003ffc00
+
+/* Description		PHYRX_VHT_SIG_A_0_PHYRX_VHT_SIG_A_INFO_DETAILS_TXOP_PS_NOT_ALLOWED
+
+			E_num 0     txop_ps_allowed  Not supported: If set to by
+			VHT AP if it allows non-AP VHT STAs in TXOP power save mode
+			to enter Doze state during a TXOP
+
+			<enum 1     no_txop_ps_allowed> Otherwise
+
+			<legal 1>
+*/
+#define PHYRX_VHT_SIG_A_0_PHYRX_VHT_SIG_A_INFO_DETAILS_TXOP_PS_NOT_ALLOWED_OFFSET 0x00000000
+#define PHYRX_VHT_SIG_A_0_PHYRX_VHT_SIG_A_INFO_DETAILS_TXOP_PS_NOT_ALLOWED_LSB 22
+#define PHYRX_VHT_SIG_A_0_PHYRX_VHT_SIG_A_INFO_DETAILS_TXOP_PS_NOT_ALLOWED_MASK 0x00400000
+
+/* Description		PHYRX_VHT_SIG_A_0_PHYRX_VHT_SIG_A_INFO_DETAILS_VHTA_RESERVED_0B
+
+			Reserved: Should be set to 1 by the MAC and ignored by
+			the PHY  <legal 1>
+*/
+#define PHYRX_VHT_SIG_A_0_PHYRX_VHT_SIG_A_INFO_DETAILS_VHTA_RESERVED_0B_OFFSET 0x00000000
+#define PHYRX_VHT_SIG_A_0_PHYRX_VHT_SIG_A_INFO_DETAILS_VHTA_RESERVED_0B_LSB 23
+#define PHYRX_VHT_SIG_A_0_PHYRX_VHT_SIG_A_INFO_DETAILS_VHTA_RESERVED_0B_MASK 0x00800000
+
+/* Description		PHYRX_VHT_SIG_A_0_PHYRX_VHT_SIG_A_INFO_DETAILS_RESERVED_0
+
+			This field is not part of HT-SIG:
+
+			Reserved: Should be set to 0 by the MAC and ignored by
+			the PHY <legal 0>
+*/
+#define PHYRX_VHT_SIG_A_0_PHYRX_VHT_SIG_A_INFO_DETAILS_RESERVED_0_OFFSET 0x00000000
+#define PHYRX_VHT_SIG_A_0_PHYRX_VHT_SIG_A_INFO_DETAILS_RESERVED_0_LSB 24
+#define PHYRX_VHT_SIG_A_0_PHYRX_VHT_SIG_A_INFO_DETAILS_RESERVED_0_MASK 0xff000000
+
+/* Description		PHYRX_VHT_SIG_A_1_PHYRX_VHT_SIG_A_INFO_DETAILS_GI_SETTING
+
+			<enum 0     normal_gi>  Indicates short guard interval
+			is not used in the data field
+
+			<enum 1     short_gi>  Indicates short guard interval is
+			used in the data field
+
+			<enum 3     short_gi_ambiguity>  Indicates short guard
+			interval is used in the data field and NSYM mod 10 = 9
+
+			NSYM is defined in IEEE802.11ac_D1.0 Section 22.4.3
+			(TXTIME and PSDU_LENGTH calculation).
+
+			<legal 0,1,3>
+*/
+#define PHYRX_VHT_SIG_A_1_PHYRX_VHT_SIG_A_INFO_DETAILS_GI_SETTING_OFFSET 0x00000004
+#define PHYRX_VHT_SIG_A_1_PHYRX_VHT_SIG_A_INFO_DETAILS_GI_SETTING_LSB 0
+#define PHYRX_VHT_SIG_A_1_PHYRX_VHT_SIG_A_INFO_DETAILS_GI_SETTING_MASK 0x00000003
+
+/* Description		PHYRX_VHT_SIG_A_1_PHYRX_VHT_SIG_A_INFO_DETAILS_SU_MU_CODING
+
+			For an SU PPDU, B2 is set to 0 for BCC, 1 for LDPC For
+			an MU PPDU, if the MU[0] NSTS field is nonzero(#6773), then
+			B2 indicates the coding used for user 0; set to 0 for BCC
+			and 1 for LDPC. If the MU[0] NSTS field is 0, then this
+			field is reserved and set to 1
+*/
+#define PHYRX_VHT_SIG_A_1_PHYRX_VHT_SIG_A_INFO_DETAILS_SU_MU_CODING_OFFSET 0x00000004
+#define PHYRX_VHT_SIG_A_1_PHYRX_VHT_SIG_A_INFO_DETAILS_SU_MU_CODING_LSB 2
+#define PHYRX_VHT_SIG_A_1_PHYRX_VHT_SIG_A_INFO_DETAILS_SU_MU_CODING_MASK 0x00000004
+
+/* Description		PHYRX_VHT_SIG_A_1_PHYRX_VHT_SIG_A_INFO_DETAILS_LDPC_EXTRA_SYMBOL
+
+			Set to 1 if the LDPC PPDU encoding process (if an SU
+			PPDU), or at least one LDPC user's PPDU encoding process (if
+			an MU PPDU), results in an extra OFDM symbol (or symbols) as
+			described in 22.3.10.5.4 (LDPC coding) and 22.3.10.5.5
+			(Encoding process for MU PPDUs). Set to 0 otherwise.
+*/
+#define PHYRX_VHT_SIG_A_1_PHYRX_VHT_SIG_A_INFO_DETAILS_LDPC_EXTRA_SYMBOL_OFFSET 0x00000004
+#define PHYRX_VHT_SIG_A_1_PHYRX_VHT_SIG_A_INFO_DETAILS_LDPC_EXTRA_SYMBOL_LSB 3
+#define PHYRX_VHT_SIG_A_1_PHYRX_VHT_SIG_A_INFO_DETAILS_LDPC_EXTRA_SYMBOL_MASK 0x00000008
+
+/* Description		PHYRX_VHT_SIG_A_1_PHYRX_VHT_SIG_A_INFO_DETAILS_MCS
+
+			For SU:
+
+			Set to 0 for BPSK 1/2
+
+			Set to 1 for QPSK 1/2
+
+			Set to 2 for QPSK 3/4
+
+			Set to 3 for 16-QAM 1/2
+
+			Set to 4 for 16-QAM 3/4
+
+			Set to 5 for 64-QAM 2/3
+
+			Set to 6 for 64-QAM 3/4
+
+			Set to 7 for 64-QAM 5/6
+
+			Set to 8 for 256-QAM 3/4
+
+			Set to 9 for 256-QAM 5/6
+
+			For MU:
+
+			If NSTS for user 1 is non-zero, then vht_sig_a[1][4]
+			indicates coding for user 1: set to 0 for BCC, 1 for LDPC.
+
+			If NSTS for user 1 is set to 0, then vht_sig_a[1][4] is
+			reserved and set to 1.
+
+			If NSTS for user 2 is non-zero, then vht_sig_a[1][5]
+			indicates coding for user 2: set to 0 for BCC, 1 for LDPC.
+
+			If NSTS for user 2 is set to 0, then vht_sig_a[1][5] is
+			reserved and set to 1.
+
+			If NSTS for user 3 is non-zero, then vht_sig_a[1][6]
+			indicates coding for user 3: set to 0 for BCC, 1 for LDPC.
+
+			If NSTS for user 3 is set to 0, then vht_sig_a[1][6] is
+			reserved and set to 1.
+
+			vht_sig_a[1][7] is reserved and set to 1
+
+			<legal 0-15>
+*/
+#define PHYRX_VHT_SIG_A_1_PHYRX_VHT_SIG_A_INFO_DETAILS_MCS_OFFSET    0x00000004
+#define PHYRX_VHT_SIG_A_1_PHYRX_VHT_SIG_A_INFO_DETAILS_MCS_LSB       4
+#define PHYRX_VHT_SIG_A_1_PHYRX_VHT_SIG_A_INFO_DETAILS_MCS_MASK      0x000000f0
+
+/* Description		PHYRX_VHT_SIG_A_1_PHYRX_VHT_SIG_A_INFO_DETAILS_BEAMFORMED
+
+			For SU:
+
+			Set to 1 if a Beamforming steering matrix is applied to
+			the waveform in an SU transmission as described in
+			IEEE802.11ac_D1.0 Section 19.3.11.11.2 (Spatial mapping),
+			set to 0 otherwise.
+
+			For MU:
+
+			Reserved and set to 1
+
+			<legal 0-1>
+*/
+#define PHYRX_VHT_SIG_A_1_PHYRX_VHT_SIG_A_INFO_DETAILS_BEAMFORMED_OFFSET 0x00000004
+#define PHYRX_VHT_SIG_A_1_PHYRX_VHT_SIG_A_INFO_DETAILS_BEAMFORMED_LSB 8
+#define PHYRX_VHT_SIG_A_1_PHYRX_VHT_SIG_A_INFO_DETAILS_BEAMFORMED_MASK 0x00000100
+
+/* Description		PHYRX_VHT_SIG_A_1_PHYRX_VHT_SIG_A_INFO_DETAILS_VHTA_RESERVED_1
+
+			Reserved and set to 1.  <legal 1>
+*/
+#define PHYRX_VHT_SIG_A_1_PHYRX_VHT_SIG_A_INFO_DETAILS_VHTA_RESERVED_1_OFFSET 0x00000004
+#define PHYRX_VHT_SIG_A_1_PHYRX_VHT_SIG_A_INFO_DETAILS_VHTA_RESERVED_1_LSB 9
+#define PHYRX_VHT_SIG_A_1_PHYRX_VHT_SIG_A_INFO_DETAILS_VHTA_RESERVED_1_MASK 0x00000200
+
+/* Description		PHYRX_VHT_SIG_A_1_PHYRX_VHT_SIG_A_INFO_DETAILS_CRC
+
+			CRC calculated as in IEEE802.11ac_D1.0 Section
+			19.3.9.4.4 (CRC calculation for HTSIG) with C7 in
+			vht_sig_a[1][10], etc.  <legal all>
+*/
+#define PHYRX_VHT_SIG_A_1_PHYRX_VHT_SIG_A_INFO_DETAILS_CRC_OFFSET    0x00000004
+#define PHYRX_VHT_SIG_A_1_PHYRX_VHT_SIG_A_INFO_DETAILS_CRC_LSB       10
+#define PHYRX_VHT_SIG_A_1_PHYRX_VHT_SIG_A_INFO_DETAILS_CRC_MASK      0x0003fc00
+
+/* Description		PHYRX_VHT_SIG_A_1_PHYRX_VHT_SIG_A_INFO_DETAILS_TAIL
+
+			Used to terminate the trellis of the convolutional
+			decoder.  Set to 0.  <legal 0>
+*/
+#define PHYRX_VHT_SIG_A_1_PHYRX_VHT_SIG_A_INFO_DETAILS_TAIL_OFFSET   0x00000004
+#define PHYRX_VHT_SIG_A_1_PHYRX_VHT_SIG_A_INFO_DETAILS_TAIL_LSB      18
+#define PHYRX_VHT_SIG_A_1_PHYRX_VHT_SIG_A_INFO_DETAILS_TAIL_MASK     0x00fc0000
+
+/* Description		PHYRX_VHT_SIG_A_1_PHYRX_VHT_SIG_A_INFO_DETAILS_RESERVED_1
+
+			This field is not part of HT-SIG:
+
+			Reserved: Should be set to 0 by the MAC and ignored by
+			the PHY <legal 0>
+*/
+#define PHYRX_VHT_SIG_A_1_PHYRX_VHT_SIG_A_INFO_DETAILS_RESERVED_1_OFFSET 0x00000004
+#define PHYRX_VHT_SIG_A_1_PHYRX_VHT_SIG_A_INFO_DETAILS_RESERVED_1_LSB 24
+#define PHYRX_VHT_SIG_A_1_PHYRX_VHT_SIG_A_INFO_DETAILS_RESERVED_1_MASK 0xff000000
 
 
 #endif // _PHYRX_VHT_SIG_A_H_

hw/qca6490/v1/wcss_version.h

@@ -16,4 +16,4 @@
  * PERFORMANCE OF THIS SOFTWARE.
  */
 
-#define WCSS_VERSION 1044
+#define WCSS_VERSION 1050