diff --git a/msm/eva/cvp_hfi.c b/msm/eva/cvp_hfi.c
index e418b6e417..a52af9233d 100644
--- a/msm/eva/cvp_hfi.c
+++ b/msm/eva/cvp_hfi.c
@@ -1974,42 +1974,59 @@ static int __hwfence_regs_map(struct iris_hfi_device *device)
 		return -EINVAL;
 	}
 
-	if (device->res->ipclite_phyaddr != 0) {
-		rc = iommu_map(cb->domain, device->res->ipclite_iova,
-			device->res->ipclite_phyaddr,
-			device->res->ipclite_size,
+	if (device->res->reg_mappings.ipclite_phyaddr != 0) {
+		rc = iommu_map(cb->domain,
+			device->res->reg_mappings.ipclite_iova,
+			device->res->reg_mappings.ipclite_phyaddr,
+			device->res->reg_mappings.ipclite_size,
 			IOMMU_READ | IOMMU_WRITE);
 		if (rc) {
 			dprintk(CVP_ERR, "map ipclite fail %d %#x %#x %#x\n",
-				rc, device->res->ipclite_iova,
-				device->res->ipclite_phyaddr,
-				device->res->ipclite_size);
+				rc, device->res->reg_mappings.ipclite_iova,
+				device->res->reg_mappings.ipclite_phyaddr,
+				device->res->reg_mappings.ipclite_size);
 			return rc;
 		}
 	}
-	if (device->res->hwmutex_phyaddr != 0) {
-		rc = iommu_map(cb->domain, device->res->hwmutex_iova,
-			device->res->hwmutex_phyaddr,
-			device->res->hwmutex_size,
+	if (device->res->reg_mappings.hwmutex_phyaddr != 0) {
+		rc = iommu_map(cb->domain,
+			device->res->reg_mappings.hwmutex_iova,
+			device->res->reg_mappings.hwmutex_phyaddr,
+			device->res->reg_mappings.hwmutex_size,
 			IOMMU_MMIO | IOMMU_READ | IOMMU_WRITE);
 		if (rc) {
 			dprintk(CVP_ERR, "map hwmutex fail %d %#x %#x %#x\n",
-				rc, device->res->hwmutex_iova,
-				device->res->hwmutex_phyaddr,
-				device->res->hwmutex_size);
+				rc, device->res->reg_mappings.hwmutex_iova,
+				device->res->reg_mappings.hwmutex_phyaddr,
+				device->res->reg_mappings.hwmutex_size);
 			return rc;
 		}
 	}
-	if (device->res->aon_phyaddr != 0) {
-		rc = iommu_map(cb->domain, device->res->aon_iova,
-			device->res->aon_phyaddr,
-			device->res->aon_size,
+	if (device->res->reg_mappings.aon_phyaddr != 0) {
+		rc = iommu_map(cb->domain,
+			device->res->reg_mappings.aon_iova,
+			device->res->reg_mappings.aon_phyaddr,
+			device->res->reg_mappings.aon_size,
 			IOMMU_MMIO | IOMMU_READ | IOMMU_WRITE);
 		if (rc) {
 			dprintk(CVP_ERR, "map aon fail %d %#x %#x %#x\n",
-				rc, device->res->aon_iova,
-				device->res->aon_phyaddr,
-				device->res->aon_size);
+				rc, device->res->reg_mappings.aon_iova,
+				device->res->reg_mappings.aon_phyaddr,
+				device->res->reg_mappings.aon_size);
+			return rc;
+		}
+	}
+	if (device->res->reg_mappings.timer_phyaddr != 0) {
+		rc = iommu_map(cb->domain,
+			device->res->reg_mappings.timer_iova,
+			device->res->reg_mappings.timer_phyaddr,
+			device->res->reg_mappings.timer_size,
+			IOMMU_MMIO | IOMMU_READ | IOMMU_WRITE);
+		if (rc) {
+			dprintk(CVP_ERR, "map timer fail %d %#x %#x %#x\n",
+				rc, device->res->reg_mappings.timer_iova,
+				device->res->reg_mappings.timer_phyaddr,
+				device->res->reg_mappings.timer_size);
 			return rc;
 		}
 	}
@@ -2027,17 +2044,25 @@ static int __hwfence_regs_unmap(struct iris_hfi_device *device)
 		return -EINVAL;
 	}
 
-	if (device->res->ipclite_iova != 0) {
-		iommu_unmap(cb->domain, device->res->ipclite_iova,
-			device->res->ipclite_size);
+	if (device->res->reg_mappings.ipclite_iova != 0) {
+		iommu_unmap(cb->domain,
+			device->res->reg_mappings.ipclite_iova,
+			device->res->reg_mappings.ipclite_size);
 	}
-	if (device->res->hwmutex_iova != 0) {
-		iommu_unmap(cb->domain, device->res->hwmutex_iova,
-			device->res->hwmutex_size);
+	if (device->res->reg_mappings.hwmutex_iova != 0) {
+		iommu_unmap(cb->domain,
+			device->res->reg_mappings.hwmutex_iova,
+			device->res->reg_mappings.hwmutex_size);
 	}
-	if (device->res->aon_iova != 0) {
-		iommu_unmap(cb->domain, device->res->aon_iova,
-			device->res->aon_size);
+	if (device->res->reg_mappings.aon_iova != 0) {
+		iommu_unmap(cb->domain,
+			device->res->reg_mappings.aon_iova,
+			device->res->reg_mappings.aon_size);
+	}
+	if (device->res->reg_mappings.timer_iova != 0) {
+		iommu_unmap(cb->domain,
+			device->res->reg_mappings.timer_iova,
+			device->res->reg_mappings.timer_size);
 	}
 	return rc;
 }
@@ -4880,18 +4905,18 @@ static int iris_hfi_get_core_capabilities(void *dev)
 static const char * const mid_names[16] = {
 	"CVP_FW",
 	"ARP_DATA",
-	"CVP_OD_NON_PIXEL",
-	"CVP_OD_ORIG_PIXEL",
-	"CVP_OD_WR_PIXEL",
-	"CVP_MPU_ORIG_PIXEL",
-	"CVP_MPU_REF_PIXEL",
+	"CVP_MPU_PIXEL",
 	"CVP_MPU_NON_PIXEL",
-	"CVP_MPU_DFS",
-	"CVP_FDU_NON_PIXEL",
 	"CVP_FDU_PIXEL",
-	"CVP_ICA_PIXEL",
-	"Invalid",
-	"Invalid",
+	"CVP_FDU_NON_PIXEL",
+	"CVP_GCE_PIXEL",
+	"CVP_GCE_NON_PIXEL",
+	"CVP_TOF_PIXEL",
+	"CVP_TOF_NON_PIXEL",
+	"CVP_VADL_PIXEL",
+	"CVP_VADL_NON_PIXEL",
+	"CVP_RGE_NON_PIXEL",
+	"CVP_CDM",
 	"Invalid",
 	"Invalid"
 };
diff --git a/msm/eva/msm_cvp_res_parse.c b/msm/eva/msm_cvp_res_parse.c
index 7dd9fd45f3..251882ee6f 100644
--- a/msm/eva/msm_cvp_res_parse.c
+++ b/msm/eva/msm_cvp_res_parse.c
@@ -144,9 +144,10 @@ static int msm_cvp_load_ipcc_regs(struct msm_cvp_platform_resources *res)
 static int msm_cvp_load_regspace_mapping(struct msm_cvp_platform_resources *res)
 {
 	int ret = 0;
-	unsigned int ipclite_mapping_config[3];
-	unsigned int hwmutex_mapping_config[3];
-	unsigned int aon_mapping_config[3];
+	unsigned int ipclite_mapping_config[3] = {0};
+	unsigned int hwmutex_mapping_config[3] = {0};
+	unsigned int aon_mapping_config[3] = {0};
+	unsigned int timer_config[3] = {0};
 	struct platform_device *pdev = res->pdev;
 
 	ret = of_property_read_u32_array(pdev->dev.of_node, "ipclite_mappings",
@@ -155,9 +156,9 @@ static int msm_cvp_load_regspace_mapping(struct msm_cvp_platform_resources *res)
 		dprintk(CVP_ERR, "Failed to read ipclite reg: %d\n", ret);
 		return ret;
 	}
-	res->ipclite_iova = ipclite_mapping_config[0];
-	res->ipclite_size = ipclite_mapping_config[1];
-	res->ipclite_phyaddr = ipclite_mapping_config[2];
+	res->reg_mappings.ipclite_iova = ipclite_mapping_config[0];
+	res->reg_mappings.ipclite_size = ipclite_mapping_config[1];
+	res->reg_mappings.ipclite_phyaddr = ipclite_mapping_config[2];
 
 	ret = of_property_read_u32_array(pdev->dev.of_node, "hwmutex_mappings",
 		hwmutex_mapping_config, 3);
@@ -165,13 +166,9 @@ static int msm_cvp_load_regspace_mapping(struct msm_cvp_platform_resources *res)
 		dprintk(CVP_ERR, "Failed to read hwmutex reg: %d\n", ret);
 		return ret;
 	}
-	res->hwmutex_iova = hwmutex_mapping_config[0];
-	res->hwmutex_size = hwmutex_mapping_config[1];
-	res->hwmutex_phyaddr = hwmutex_mapping_config[2];
-	dprintk(CVP_CORE, "ipclite %#x %#x %#x hwmutex %#x %#x %#x\n",
-		res->ipclite_iova, res->ipclite_phyaddr, res->ipclite_size,
-		res->hwmutex_iova, res->hwmutex_phyaddr, res->hwmutex_size);
-
+	res->reg_mappings.hwmutex_iova = hwmutex_mapping_config[0];
+	res->reg_mappings.hwmutex_size = hwmutex_mapping_config[1];
+	res->reg_mappings.hwmutex_phyaddr = hwmutex_mapping_config[2];
 
 	ret = of_property_read_u32_array(pdev->dev.of_node, "aon_mappings",
 		aon_mapping_config, 3);
@@ -179,11 +176,28 @@ static int msm_cvp_load_regspace_mapping(struct msm_cvp_platform_resources *res)
 		dprintk(CVP_ERR, "Failed to read aon reg: %d\n", ret);
 		return ret;
 	}
-	res->aon_iova = aon_mapping_config[0];
-	res->aon_size = aon_mapping_config[1];
-	res->aon_phyaddr = aon_mapping_config[2];
-	dprintk(CVP_CORE, "aon %#x %#x %#x \n",
-		res->hwmutex_iova, res->hwmutex_phyaddr, res->hwmutex_size);
+	res->reg_mappings.aon_iova = aon_mapping_config[0];
+	res->reg_mappings.aon_size = aon_mapping_config[1];
+	res->reg_mappings.aon_phyaddr = aon_mapping_config[2];
+
+	ret = of_property_read_u32_array(pdev->dev.of_node,
+		"aon_timer_mappings", timer_config, 3);
+	if (ret) {
+		dprintk(CVP_ERR, "Failed to read timer reg: %d\n", ret);
+		return ret;
+	}
+	res->reg_mappings.timer_iova = timer_config[0];
+	res->reg_mappings.timer_size = timer_config[1];
+	res->reg_mappings.timer_phyaddr = timer_config[2];
+
+	dprintk(CVP_CORE,
+	"reg mappings %#x %#x %#x %#x %#x %#X %#x %#x %#x %#x %#x %#x\n",
+	res->reg_mappings.ipclite_iova, res->reg_mappings.ipclite_size,
+	res->reg_mappings.ipclite_phyaddr, res->reg_mappings.hwmutex_iova,
+	res->reg_mappings.hwmutex_size, res->reg_mappings.hwmutex_phyaddr,
+	res->reg_mappings.aon_iova, res->reg_mappings.aon_size,
+	res->reg_mappings.aon_phyaddr,  res->reg_mappings.timer_iova,
+	res->reg_mappings.timer_size, res->reg_mappings.timer_phyaddr);
 
 	return ret;
 }
diff --git a/msm/eva/msm_cvp_resources.h b/msm/eva/msm_cvp_resources.h
index 9b2959975d..c6fe037ea8 100644
--- a/msm/eva/msm_cvp_resources.h
+++ b/msm/eva/msm_cvp_resources.h
@@ -153,14 +153,7 @@ struct cvp_pm_qos {
 	struct dev_pm_qos_request *pm_qos_hdls;
 };
 
-struct msm_cvp_platform_resources {
-	phys_addr_t firmware_base;
-	phys_addr_t register_base;
-	phys_addr_t ipcc_reg_base;
-	phys_addr_t gcc_reg_base;
-	uint32_t register_size;
-	uint32_t ipcc_reg_size;
-	uint32_t gcc_reg_size;
+struct cvp_fw_reg_mappings {
 	phys_addr_t ipclite_iova;
 	phys_addr_t ipclite_phyaddr;
 	uint32_t ipclite_size;
@@ -170,6 +163,20 @@ struct msm_cvp_platform_resources {
 	phys_addr_t aon_iova;
 	phys_addr_t aon_phyaddr;
 	uint32_t aon_size;
+	phys_addr_t timer_iova;
+	phys_addr_t timer_phyaddr;
+	uint32_t timer_size;
+};
+
+struct msm_cvp_platform_resources {
+	phys_addr_t firmware_base;
+	phys_addr_t register_base;
+	phys_addr_t ipcc_reg_base;
+	phys_addr_t gcc_reg_base;
+	uint32_t register_size;
+	uint32_t ipcc_reg_size;
+	uint32_t gcc_reg_size;
+	struct cvp_fw_reg_mappings reg_mappings;
 	uint32_t irq;
 	uint32_t sku_version;
 	struct allowed_clock_rates_table *allowed_clks_tbl;