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@@ -429,6 +429,7 @@ int32_t cam_cmd_buf_parser(struct csiphy_device *csiphy_dev,
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uint32_t lane_enable = 0;
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uint16_t lane_assign = 0;
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uint8_t lane_cnt = 0;
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+ uint16_t preamble_en = 0;
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if (!cfg_dev || !csiphy_dev) {
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CAM_ERR(CAM_CSIPHY, "Invalid Args");
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@@ -502,6 +503,27 @@ int32_t cam_cmd_buf_parser(struct csiphy_device *csiphy_dev,
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return rc;
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}
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+
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+ preamble_en = (cam_cmd_csiphy_info->mipi_flags &
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+ PREAMBLE_PATTEN_CAL_MASK);
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+
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+ /* Cannot support CPHY combo mode with One sensor setting
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+ * preamble enable and second/third sensor is without
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+ * preamble enable.
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+ */
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+ if (csiphy_dev->preamble_enable && !preamble_en &&
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+ csiphy_dev->csiphy_info[index].csiphy_3phase) {
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+ CAM_ERR(CAM_CSIPHY,
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+ "Cannot support CPHY combo mode with differnt preamble settings");
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+ return -EINVAL;
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+ } else if (preamble_en &&
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+ !csiphy_dev->csiphy_info[index].csiphy_3phase) {
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+ CAM_ERR(CAM_CSIPHY,
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+ "Preamble pattern enablement is not supported for DPHY sensors");
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+ return -EINVAL;
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+ }
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+
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+ csiphy_dev->preamble_enable = preamble_en;
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csiphy_dev->csiphy_info[index].lane_cnt = cam_cmd_csiphy_info->lane_cnt;
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csiphy_dev->csiphy_info[index].lane_assign =
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cam_cmd_csiphy_info->lane_assign;
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@@ -513,7 +535,7 @@ int32_t cam_cmd_buf_parser(struct csiphy_device *csiphy_dev,
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csiphy_dev->csiphy_info[index].secure_mode =
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cam_cmd_csiphy_info->secure_mode;
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csiphy_dev->csiphy_info[index].mipi_flags =
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- cam_cmd_csiphy_info->mipi_flags;
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+ (cam_cmd_csiphy_info->mipi_flags & SKEW_CAL_MASK);
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lane_assign = csiphy_dev->csiphy_info[index].lane_assign;
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lane_cnt = csiphy_dev->csiphy_info[index].lane_cnt;
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@@ -543,9 +565,10 @@ int32_t cam_cmd_buf_parser(struct csiphy_device *csiphy_dev,
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index);
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CAM_DBG(CAM_CSIPHY,
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- "phy version:%d, phy_idx: %d",
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+ "phy version:%d, phy_idx: %d, preamble_en: %u",
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csiphy_dev->hw_version,
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- csiphy_dev->soc_info.index);
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+ csiphy_dev->soc_info.index,
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+ csiphy_dev->preamble_enable);
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CAM_DBG(CAM_CSIPHY,
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"3phase:%d, combo mode:%d, secure mode:%d",
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csiphy_dev->csiphy_info[index].csiphy_3phase,
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@@ -705,8 +728,7 @@ static int cam_csiphy_cphy_data_rate_config(
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intermediate_var = csiphy_device->csiphy_info[idx].settle_time;
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do_div(intermediate_var, 200000000);
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settle_cnt = intermediate_var;
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- skew_cal_enable =
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- csiphy_device->csiphy_info[idx].mipi_flags & SKEW_CAL_MASK;
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+ skew_cal_enable = csiphy_device->csiphy_info[idx].mipi_flags;
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CAM_DBG(CAM_CSIPHY, "required data rate : %llu", phy_data_rate);
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for (data_rate_idx = 0; data_rate_idx < num_table_entries;
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@@ -789,6 +811,38 @@ static int cam_csiphy_cphy_data_rate_config(
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return 0;
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}
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+static int __cam_csiphy_prgm_bist_reg(struct csiphy_device *csiphy_dev, bool is_3phase)
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+{
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+ int i = 0;
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+ int bist_arr_size = csiphy_dev->ctrl_reg->csiphy_bist_reg->num_data_settings;
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+ struct csiphy_reg_t *csiphy_common_reg = NULL;
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+ void __iomem *csiphybase = NULL;
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+
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+ csiphybase = csiphy_dev->soc_info.reg_map[0].mem_base;
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+
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+ for (i = 0; i < bist_arr_size; i++) {
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+ csiphy_common_reg = &csiphy_dev->ctrl_reg->csiphy_bist_reg->bist_arry[i];
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+ switch (csiphy_common_reg->csiphy_param_type) {
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+ case CSIPHY_3PH_REGS:
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+ if (is_3phase)
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+ cam_io_w_mb(csiphy_common_reg->reg_data,
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+ csiphybase + csiphy_common_reg->reg_addr);
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+ break;
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+ case CSIPHY_2PH_REGS:
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+ if (!is_3phase)
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+ cam_io_w_mb(csiphy_common_reg->reg_data,
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+ csiphybase + csiphy_common_reg->reg_addr);
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+ break;
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+ default:
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+ cam_io_w_mb(csiphy_common_reg->reg_data,
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+ csiphybase + csiphy_common_reg->reg_addr);
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+ break;
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+ }
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+ }
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+
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+ return 0;
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+}
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+
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int32_t cam_csiphy_config_dev(struct csiphy_device *csiphy_dev,
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int32_t dev_handle)
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{
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@@ -939,8 +993,7 @@ int32_t cam_csiphy_config_dev(struct csiphy_device *csiphy_dev,
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intermediate_var = csiphy_dev->csiphy_info[index].settle_time;
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do_div(intermediate_var, 200000000);
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settle_cnt = intermediate_var;
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- skew_cal_enable =
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- csiphy_dev->csiphy_info[index].mipi_flags & SKEW_CAL_MASK;
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+ skew_cal_enable = csiphy_dev->csiphy_info[index].mipi_flags;
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for (lane_pos = 0; lane_pos < max_lanes; lane_pos++) {
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CAM_DBG(CAM_CSIPHY, "lane_pos: %d is configuring", lane_pos);
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@@ -983,6 +1036,8 @@ int32_t cam_csiphy_config_dev(struct csiphy_device *csiphy_dev,
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}
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}
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+ if (csiphy_dev->preamble_enable)
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+ __cam_csiphy_prgm_bist_reg(csiphy_dev, is_3phase);
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if (csiphy_dev->csiphy_info[index].csiphy_3phase) {
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rc = cam_csiphy_cphy_data_rate_config(csiphy_dev, index);
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if (rc) {
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