Merge "disp: msm: sde: fix static cache programming"

msm/msm_gem_prime.c

@@ -170,6 +170,8 @@ struct drm_gem_object *msm_gem_prime_import(struct drm_device *dev,
 		return ERR_CAST(attach);
 	}
 
+	attach->dma_map_attrs |= DMA_ATTR_IOMMU_USE_LLC_NWA;
+
 	/*
 	 * For cached buffers where CPU access is required, dma_map_attachment
 	 * must be called now to allow user-space to perform cpu sync begin/end

msm/sde/sde_crtc.c

@@ -6321,7 +6321,6 @@ void __sde_crtc_static_cache_read_work(struct kthread_work *work)
 	struct sde_crtc *sde_crtc = container_of(work, struct sde_crtc,
 			static_cache_read_work.work);
 	struct drm_crtc *crtc;
-	struct drm_plane *plane;
 	struct sde_crtc_mixer *mixer;
 	struct sde_hw_ctl *ctl;
 
@@ -6336,18 +6335,10 @@ void __sde_crtc_static_cache_read_work(struct kthread_work *work)
 	ctl = mixer->hw_ctl;
 
 	if (sde_crtc->cache_state != CACHE_STATE_FRAME_WRITE ||
-			!ctl->ops.update_bitmask_ctl ||
 			!ctl->ops.trigger_flush)
 		return;
 
 	sde_crtc_static_img_control(crtc, CACHE_STATE_FRAME_READ, false);
-	drm_atomic_crtc_for_each_plane(plane, crtc) {
-		if (!plane->state)
-			continue;
-
-		sde_plane_ctl_flush(plane, ctl, true);
-	}
-	ctl->ops.update_bitmask_ctl(ctl, true);
 	ctl->ops.trigger_flush(ctl);
 }
 

msm/sde/sde_hw_catalog.c

@@ -1489,8 +1489,6 @@ static int _sde_sspp_setup_vigs(struct device_node *np,
 		if (sde_cfg->inline_disable_const_clr)
 			set_bit(SDE_SSPP_INLINE_CONST_CLR, &sspp->features);
 
-		if (sc_cfg[SDE_SYS_CACHE_DISP].has_sys_cache)
-			set_bit(SDE_PERF_SSPP_SYS_CACHE, &sspp->perf_features);
 	}
 
 	sde_put_dt_props(props);
@@ -1733,6 +1731,9 @@ static void sde_sspp_set_features(struct sde_mdss_cfg *sde_cfg,
 		if (sde_cfg->uidle_cfg.uidle_rev)
 			set_bit(SDE_PERF_SSPP_UIDLE, &sspp->perf_features);
 
+		if (sde_cfg->sc_cfg[SDE_SYS_CACHE_DISP].has_sys_cache)
+			set_bit(SDE_PERF_SSPP_SYS_CACHE, &sspp->perf_features);
+
 		if (sde_cfg->has_decimation) {
 			sblk->maxhdeciexp = MAX_HORZ_DECIMATION;
 			sblk->maxvdeciexp = MAX_VERT_DECIMATION;

msm/sde/sde_hw_ctl.c

@@ -52,7 +52,7 @@
 
 #define CTL_MIXER_BORDER_OUT            BIT(24)
 #define CTL_FLUSH_MASK_ROT              BIT(27)
-#define CTL_FLUSH_CTL                   17
+#define CTL_FLUSH_MASK_CTL              BIT(17)
 
 #define CTL_NUM_EXT			4
 #define CTL_SSPP_MAX_RECTS		2
@@ -417,15 +417,6 @@ static inline void sde_hw_ctl_uidle_enable(struct sde_hw_ctl *ctx, bool enable)
 	SDE_REG_WRITE(&ctx->hw, CTL_UIDLE_ACTIVE, val);
 }
 
-static inline int sde_hw_ctl_update_bitmask_ctl(struct sde_hw_ctl *ctx,
-		bool enable)
-{
-	if (!ctx)
-		return -EINVAL;
-
-	UPDATE_MASK(ctx->flush.pending_flush_mask, CTL_FLUSH_CTL, enable);
-	return 0;
-}
 
 static inline int sde_hw_ctl_update_bitmask_sspp(struct sde_hw_ctl *ctx,
 		enum sde_sspp sspp,
@@ -456,7 +447,7 @@ static inline int sde_hw_ctl_update_bitmask_mixer(struct sde_hw_ctl *ctx,
 	}
 
 	UPDATE_MASK(ctx->flush.pending_flush_mask, mixer_tbl[lm], enable);
-	sde_hw_ctl_update_bitmask_ctl(ctx, true);
+	ctx->flush.pending_flush_mask |= CTL_FLUSH_MASK_CTL;
 
 	return 0;
 }
@@ -1386,7 +1377,6 @@ static void _setup_ctl_ops(struct sde_hw_ctl_ops *ops,
 	ops->clear_all_blendstages = sde_hw_ctl_clear_all_blendstages;
 	ops->setup_blendstage = sde_hw_ctl_setup_blendstage;
 	ops->get_staged_sspp = sde_hw_ctl_get_staged_sspp;
-	ops->update_bitmask_ctl = sde_hw_ctl_update_bitmask_ctl;
 	ops->update_bitmask_sspp = sde_hw_ctl_update_bitmask_sspp;
 	ops->update_bitmask_mixer = sde_hw_ctl_update_bitmask_mixer;
 	ops->reg_dma_flush = sde_hw_reg_dma_flush;

msm/sde/sde_hw_ctl.h

@@ -319,13 +319,6 @@ struct sde_hw_ctl_ops {
 	 */
 	int (*wait_reset_status)(struct sde_hw_ctl *ctx);
 
-	/**
-	 * update_bitmask_ctl: updates mask corresponding to ctl
-	 * @enable           : true to enable, false to disable
-	 */
-	int (*update_bitmask_ctl)(struct sde_hw_ctl *ctx,
-		bool enable);
-
 	/**
 	 * update_bitmask_sspp: updates mask corresponding to sspp
 	 * @blk               : blk id

msm/sde/sde_plane.c

@@ -2853,7 +2853,7 @@ void sde_plane_static_img_control(struct drm_plane *plane,
 
 	pstate->static_cache_state = state;
 
-	if (state == CACHE_STATE_FRAME_READ)
+	if (state == CACHE_STATE_FRAME_WRITE || state == CACHE_STATE_FRAME_READ)
 		_sde_plane_sspp_setup_sys_cache(psde, pstate, false);
 }