disp: msm: reset lm blend stages for missing vsync

MDSS INTF HW block does not generate vsync if controller
turns off the link clock prematurely. This leads to
frame trigger timeout and SDE driver triggers the retire
fence after 84ms to recover gracefully. A client may switch
source pipe from one CTL path to another CTL path based
on delayed retire fence. It can lead to other ctl path
hang. This can be resolved by resetting the lm blend
stages for each missing vsync frame trigger.

Change-Id: I5a6ed03afbdad83d8fd6decc593d39e04bef62e4
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
This commit is contained in:
Dhaval Patel
2021-09-21 14:35:18 -07:00
parent 958acc9e7c
commit fc2226ea25
5 changed files with 38 additions and 53 deletions

View File

@@ -325,12 +325,9 @@ void sde_encoder_trigger_kickoff_pending(struct drm_encoder *encoder);
* sde_encoder_kickoff - trigger a double buffer flip of the ctl path
* (i.e. ctl flush and start) immediately.
* @encoder: encoder pointer
* @is_error: whether the current commit needs to be aborted and replaced
* with a 'safe' commit
* @config_changed: if true new configuration is applied on the control path
*/
void sde_encoder_kickoff(struct drm_encoder *encoder, bool is_error,
bool config_changed);
void sde_encoder_kickoff(struct drm_encoder *encoder, bool config_changed);
/**
* sde_encoder_wait_for_event - Waits for encoder events