disp: msm: reset lm blend stages for missing vsync
MDSS INTF HW block does not generate vsync if controller turns off the link clock prematurely. This leads to frame trigger timeout and SDE driver triggers the retire fence after 84ms to recover gracefully. A client may switch source pipe from one CTL path to another CTL path based on delayed retire fence. It can lead to other ctl path hang. This can be resolved by resetting the lm blend stages for each missing vsync frame trigger. Change-Id: I5a6ed03afbdad83d8fd6decc593d39e04bef62e4 Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
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@@ -325,12 +325,9 @@ void sde_encoder_trigger_kickoff_pending(struct drm_encoder *encoder);
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* sde_encoder_kickoff - trigger a double buffer flip of the ctl path
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* (i.e. ctl flush and start) immediately.
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* @encoder: encoder pointer
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* @is_error: whether the current commit needs to be aborted and replaced
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* with a 'safe' commit
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* @config_changed: if true new configuration is applied on the control path
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*/
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void sde_encoder_kickoff(struct drm_encoder *encoder, bool is_error,
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bool config_changed);
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void sde_encoder_kickoff(struct drm_encoder *encoder, bool config_changed);
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/**
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* sde_encoder_wait_for_event - Waits for encoder events
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