disp: msm: reset lm blend stages for missing vsync
MDSS INTF HW block does not generate vsync if controller turns off the link clock prematurely. This leads to frame trigger timeout and SDE driver triggers the retire fence after 84ms to recover gracefully. A client may switch source pipe from one CTL path to another CTL path based on delayed retire fence. It can lead to other ctl path hang. This can be resolved by resetting the lm blend stages for each missing vsync frame trigger. Change-Id: I5a6ed03afbdad83d8fd6decc593d39e04bef62e4 Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
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@@ -3979,7 +3979,7 @@ int sde_crtc_reset_hw(struct drm_crtc *crtc, struct drm_crtc_state *old_state,
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continue;
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if (sde_encoder_get_intf_mode(encoder) == INTF_MODE_VIDEO)
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sde_encoder_kickoff(encoder, false, true);
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sde_encoder_kickoff(encoder, true);
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}
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/* panic the device if VBIF is not in good state */
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@@ -4086,7 +4086,7 @@ void sde_crtc_commit_kickoff(struct drm_crtc *crtc,
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if (encoder->crtc != crtc)
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continue;
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sde_encoder_kickoff(encoder, false, true);
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sde_encoder_kickoff(encoder, true);
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}
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sde_crtc->kickoff_in_progress = false;
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@@ -7061,7 +7061,7 @@ void __sde_crtc_static_cache_read_work(struct kthread_work *work)
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sde_plane_ctl_flush(plane, ctl, true);
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/* kickoff encoder and wait for VBLANK */
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sde_encoder_kickoff(drm_enc, false, false);
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sde_encoder_kickoff(drm_enc, false);
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sde_encoder_wait_for_event(drm_enc, MSM_ENC_VBLANK);
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SDE_EVT32(DRMID(crtc), SDE_EVTLOG_FUNC_EXIT);
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