Merge "msm: sde: SW workaround for REG_BLK_LUT_WRITE HW limitation"
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melakukan
fbb802950c
@@ -48,6 +48,7 @@
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(cfg)->dma_buf->index)
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#define REL_ADDR_OPCODE (BIT(27))
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#define NO_OP_OPCODE (0)
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#define SINGLE_REG_WRITE_OPCODE (BIT(28))
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#define SINGLE_REG_MODIFY_OPCODE (BIT(29))
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#define HW_INDEX_REG_WRITE_OPCODE (BIT(28) | BIT(29))
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@@ -352,6 +353,7 @@ static int write_single_modify(struct sde_reg_dma_setup_ops_cfg *cfg)
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static int write_block_lut_reg(struct sde_reg_dma_setup_ops_cfg *cfg)
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{
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u32 *loc = NULL;
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int rc = -EINVAL;
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loc = (u32 *)((u8 *)cfg->dma_buf->vaddr +
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cfg->dma_buf->index);
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@@ -362,7 +364,22 @@ static int write_block_lut_reg(struct sde_reg_dma_setup_ops_cfg *cfg)
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loc[1] |= (cfg->lut_size & LUTBUS_LUT_SIZE_MASK);
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cfg->dma_buf->index += ops_mem_size[cfg->ops];
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return write_multi_reg(cfg);
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rc = write_multi_reg(cfg);
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if (rc)
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return rc;
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/* adding 3 NO OPs as SW workaround for REG_BLK_LUT_WRITE
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* HW limitation that requires the residual data plus the
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* following opcode to exceed 4 DWORDs length.
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*/
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loc = (u32 *)((u8 *)cfg->dma_buf->vaddr +
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cfg->dma_buf->index);
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loc[0] = NO_OP_OPCODE;
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loc[1] = NO_OP_OPCODE;
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loc[2] = NO_OP_OPCODE;
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cfg->dma_buf->index += sizeof(u32) * 3;
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return 0;
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}
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static int write_decode_sel(struct sde_reg_dma_setup_ops_cfg *cfg)
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