video: driver: Align hfi files to pick ring buffer changes

Align hfi property and memory file to pick interface changes
for encoder ring buffer support

Change-Id: Icde4cdffe5275d416c51c36e562bb832027b0fa1
Signed-off-by: Akshata Sahukar <quic_asahukar@quicinc.com>
This commit is contained in:
Akshata Sahukar
2023-02-27 12:36:17 -08:00
parent 5dcf0adb92
commit fb2e2c5715
2 changed files with 9 additions and 7 deletions

View File

@@ -1447,7 +1447,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
} while (0) } while (0)
#define HFI_BUFFER_BIN_ENC(_size, rc_type, frame_width, frame_height, lcu_size, \ #define HFI_BUFFER_BIN_ENC(_size, rc_type, frame_width, frame_height, lcu_size, \
work_mode, num_vpp_pipes, profile) \ work_mode, num_vpp_pipes, profile, ring_buf_count) \
do \ do \
{ \ { \
HFI_U32 bitstream_size = 0, total_bitbin_buffers = 0, \ HFI_U32 bitstream_size = 0, total_bitbin_buffers = 0, \
@@ -1456,8 +1456,8 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
frame_height, work_mode, lcu_size, profile); \ frame_height, work_mode, lcu_size, profile); \
if (work_mode == HFI_WORKMODE_2) \ if (work_mode == HFI_WORKMODE_2) \
{ \ { \
total_bitbin_buffers = 3; \ total_bitbin_buffers = (ring_buf_count > 3) ? ring_buf_count : 3; \
bitbin_size = bitstream_size * 12 / 10; \ bitbin_size = bitstream_size * 17 / 10; \
bitbin_size = HFI_ALIGN(bitbin_size, \ bitbin_size = HFI_ALIGN(bitbin_size, \
VENUS_DMA_ALIGNMENT); \ VENUS_DMA_ALIGNMENT); \
} \ } \
@@ -1482,19 +1482,19 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
} while (0) } while (0)
#define HFI_BUFFER_BIN_H264E(_size, rc_type, frame_width, frame_height, \ #define HFI_BUFFER_BIN_H264E(_size, rc_type, frame_width, frame_height, \
work_mode, num_vpp_pipes, profile) \ work_mode, num_vpp_pipes, profile, ring_buf_count) \
do \ do \
{ \ { \
HFI_BUFFER_BIN_ENC(_size, rc_type, frame_width, frame_height, 16, \ HFI_BUFFER_BIN_ENC(_size, rc_type, frame_width, frame_height, 16, \
work_mode, num_vpp_pipes, profile); \ work_mode, num_vpp_pipes, profile, ring_buf_count); \
} while (0) } while (0)
#define HFI_BUFFER_BIN_H265E(_size, rc_type, frame_width, frame_height, \ #define HFI_BUFFER_BIN_H265E(_size, rc_type, frame_width, frame_height, \
work_mode, num_vpp_pipes, profile) \ work_mode, num_vpp_pipes, profile, ring_buf_count) \
do \ do \
{ \ { \
HFI_BUFFER_BIN_ENC(_size, rc_type, frame_width, frame_height, 32,\ HFI_BUFFER_BIN_ENC(_size, rc_type, frame_width, frame_height, 32,\
work_mode, num_vpp_pipes, profile); \ work_mode, num_vpp_pipes, profile, ring_buf_count); \
} while (0) } while (0)
#define SIZE_ENC_SLICE_INFO_BUF(num_lcu_in_frame) HFI_ALIGN((256 + \ #define SIZE_ENC_SLICE_INFO_BUF(num_lcu_in_frame) HFI_ALIGN((256 + \

View File

@@ -573,6 +573,8 @@ enum hfi_saliency_type {
#define HFI_PROP_SLICE_DECODE 0x03000196 #define HFI_PROP_SLICE_DECODE 0x03000196
#define HFI_PROP_ENC_RING_BIN_BUF 0x0300019C
/* u32 */ /* u32 */
enum hfi_fence_type { enum hfi_fence_type {
HFI_SW_FENCE = 0x00000001, HFI_SW_FENCE = 0x00000001,