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@@ -1447,7 +1447,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
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} while (0)
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#define HFI_BUFFER_BIN_ENC(_size, rc_type, frame_width, frame_height, lcu_size, \
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- work_mode, num_vpp_pipes, profile) \
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+ work_mode, num_vpp_pipes, profile, ring_buf_count) \
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do \
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{ \
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HFI_U32 bitstream_size = 0, total_bitbin_buffers = 0, \
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@@ -1456,8 +1456,8 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
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frame_height, work_mode, lcu_size, profile); \
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if (work_mode == HFI_WORKMODE_2) \
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{ \
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- total_bitbin_buffers = 3; \
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- bitbin_size = bitstream_size * 12 / 10; \
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+ total_bitbin_buffers = (ring_buf_count > 3) ? ring_buf_count : 3; \
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+ bitbin_size = bitstream_size * 17 / 10; \
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bitbin_size = HFI_ALIGN(bitbin_size, \
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VENUS_DMA_ALIGNMENT); \
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} \
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@@ -1482,19 +1482,19 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
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} while (0)
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#define HFI_BUFFER_BIN_H264E(_size, rc_type, frame_width, frame_height, \
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- work_mode, num_vpp_pipes, profile) \
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+ work_mode, num_vpp_pipes, profile, ring_buf_count) \
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do \
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{ \
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HFI_BUFFER_BIN_ENC(_size, rc_type, frame_width, frame_height, 16, \
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- work_mode, num_vpp_pipes, profile); \
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+ work_mode, num_vpp_pipes, profile, ring_buf_count); \
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} while (0)
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#define HFI_BUFFER_BIN_H265E(_size, rc_type, frame_width, frame_height, \
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- work_mode, num_vpp_pipes, profile) \
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+ work_mode, num_vpp_pipes, profile, ring_buf_count) \
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do \
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{ \
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HFI_BUFFER_BIN_ENC(_size, rc_type, frame_width, frame_height, 32,\
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- work_mode, num_vpp_pipes, profile); \
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+ work_mode, num_vpp_pipes, profile, ring_buf_count); \
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} while (0)
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#define SIZE_ENC_SLICE_INFO_BUF(num_lcu_in_frame) HFI_ALIGN((256 + \
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