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@@ -46,9 +46,6 @@
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#define WLAN_CFG_TX_FLOW_START_QUEUE_OFFSET 0
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#define WLAN_CFG_TX_FLOW_STOP_QUEUE_TH 0
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#endif
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-#else
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-#define WLAN_CFG_TX_FLOW_START_QUEUE_OFFSET 0
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-#define WLAN_CFG_TX_FLOW_STOP_QUEUE_TH 0
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#endif
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#define WLAN_CFG_PER_PDEV_TX_RING_MIN 0
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@@ -88,47 +85,6 @@
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#define WLAN_CFG_INT_TIMER_THRESHOLD_TX 8
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#define WLAN_CFG_INT_TIMER_THRESHOLD_RX 8
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#define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER 8
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-#else
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-#define WLAN_CFG_PER_PDEV_TX_RING 0
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-#define WLAN_CFG_IPA_UC_TX_BUF_SIZE 0
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-#define WLAN_CFG_IPA_UC_TX_PARTITION_BASE 0
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-#define WLAN_CFG_IPA_UC_RX_IND_RING_COUNT 0
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-#endif
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-
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-#ifdef CONFIG_WIN
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-#define WLAN_CFG_PER_PDEV_RX_RING 0
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-#define WLAN_CFG_PER_PDEV_LMAC_RING 1
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-#define WLAN_LRO_ENABLE 0
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-#define WLAN_CFG_MAC_PER_TARGET 3
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-/* Tx Descriptor and Tx Extension Descriptor pool sizes */
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-#ifndef QCA_WIFI_QCA8074_VP
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-#define WLAN_CFG_NUM_TX_DESC 0x320000
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-#else
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-#define WLAN_CFG_NUM_TX_DESC (8 << 10)
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-#endif
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-#define WLAN_CFG_NUM_TX_EXT_DESC 0x80000
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-
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-/* Interrupt Mitigation - Batch threshold in terms of number of frames */
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-#define WLAN_CFG_INT_BATCH_THRESHOLD_TX 256
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-#define WLAN_CFG_INT_BATCH_THRESHOLD_RX 128
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-#define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER 1
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-
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-/* Interrupt Mitigation - Timer threshold in us */
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-#define WLAN_CFG_INT_TIMER_THRESHOLD_TX 1000
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-#define WLAN_CFG_INT_TIMER_THRESHOLD_RX 500
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-#define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER 1000
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-
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-#define WLAN_CFG_TX_RING_SIZE 512
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-
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-/* Size the completion ring using following 2 parameters
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- * - NAPI schedule latency (assuming 1 netdev competing for CPU)
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- * = 20 ms (2 jiffies)
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- * - Worst case PPS requirement = 400K PPS
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- *
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- * Ring size = 20 * 400 = 8000
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- * 8192 is nearest power of 2
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- */
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-#define WLAN_CFG_TX_COMP_RING_SIZE 0x80000
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#endif
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#define WLAN_CFG_PER_PDEV_RX_RING_MIN 0
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