Merge "disp: msm: sde: fix system cache feature enable"
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@@ -3351,7 +3351,8 @@ static void sde_crtc_atomic_flush(struct drm_crtc *crtc,
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event_thread = &priv->event_thread[crtc->index];
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idle_time = sde_crtc_get_property(cstate, CRTC_PROP_IDLE_TIMEOUT);
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if (sde_crtc_get_property(cstate, CRTC_PROP_CACHE_STATE))
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if ((sde_crtc->cache_state == CACHE_STATE_PRE_CACHE) &&
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sde_crtc_get_property(cstate, CRTC_PROP_CACHE_STATE))
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sde_crtc_static_img_control(crtc, CACHE_STATE_FRAME_WRITE,
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false);
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else
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@@ -6285,6 +6286,8 @@ void sde_crtc_static_img_control(struct drm_crtc *crtc,
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return;
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sde_crtc = to_sde_crtc(crtc);
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if (sde_crtc->cache_state == state)
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return;
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switch (state) {
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case CACHE_STATE_NORMAL:
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@@ -6400,6 +6403,7 @@ static void __sde_crtc_idle_notify_work(struct kthread_work *work)
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msm_mode_object_event_notify(&crtc->base, crtc->dev,
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&event, (u8 *)&ret);
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SDE_EVT32(DRMID(crtc));
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SDE_DEBUG("crtc[%d]: idle timeout notified\n", crtc->base.id);
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sde_crtc_static_img_control(crtc, CACHE_STATE_PRE_CACHE, false);
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@@ -2833,6 +2833,9 @@ static void _sde_plane_sspp_setup_sys_cache(struct sde_plane *psde,
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pstate->sc_cfg.type = SDE_SYS_CACHE_DISP;
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}
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SDE_EVT32(DRMID(&psde->base), pstate->sc_cfg.rd_scid,
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pstate->sc_cfg.rd_en, pstate->sc_cfg.rd_noallocate);
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psde->pipe_hw->ops.setup_sys_cache(
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psde->pipe_hw, &pstate->sc_cfg);
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}
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