qcacmn: Fix for kernel panic in wifi down path for peregrine

Warm reset is done in wifi down path for peregrine

Change-Id: Id187b8e60859f9936e4761bdce9ae7f744bd79d7

hif/src/hif_hw_version.h

@@ -31,6 +31,7 @@
 
 #define AR6004_VERSION_REV1_3           0x31c8088a
 #define AR9888_REV2_VERSION             0x4100016c
+#define AR9887_REV1_VERSION             0x4100016d
 #define AR6320_REV1_VERSION             0x5000000
 #define AR6320_REV1_1_VERSION           0x5000001
 #define AR6320_REV1_3_VERSION           0x5000003

hif/src/pcie/hif_io32_pci.h

@@ -39,7 +39,9 @@
  * For maximum performance and no power management, set this to 1.
  * For power management at the cost of performance, set this to 0.
  */
+#ifndef CONFIG_ATH_PCIE_MAX_PERF
 #define CONFIG_ATH_PCIE_MAX_PERF 0
+#endif
 
 /*
  * For keeping the target awake till the driver is

hif/src/pcie/if_pci.c

@@ -2417,6 +2417,7 @@ void hif_pci_disable_bus(struct hif_softc *scn)
 	struct hif_pci_softc *sc = HIF_GET_PCI_SOFTC(scn);
 	struct pci_dev *pdev;
 	void __iomem *mem;
+	struct hif_target_info *tgt_info = &scn->target_info;
 
 	/* Attach did not succeed, all resources have been
 	 * freed in error handler
@@ -2431,7 +2432,18 @@ void hif_pci_disable_bus(struct hif_softc *scn)
 			       HOST_GROUP0_MASK);
 	}
 
+#if defined(CPU_WARM_RESET_WAR)
+	/* Currently CPU warm reset sequence is tested only for AR9888_REV2
+	 * Need to enable for AR9888_REV1 once CPU warm reset sequence is
+	 * verified for AR9888_REV1
+	 */
+	if ((tgt_info->target_version == AR9888_REV2_VERSION) || (tgt_info->target_version == AR9887_REV1_VERSION))
+		hif_pci_device_warm_reset(sc);
+	else
+		hif_pci_device_reset(sc);
+#else
 	hif_pci_device_reset(sc);
+#endif
 	mem = (void __iomem *)sc->mem;
 	if (mem) {
 		pci_disable_msi(pdev);