msm: camera: isp: Add CSID meta handling

For some chipsets, CSID lies outside the IFE domain. To handle
the cmd buffer programming in such cases, we need to handle
the CSID meta and add change bases accordingly. Reg update for
CSID is also optimized.

Change-Id: I77cceb62681bc46b4ac8a4f54e4051401b02ba36
CRs-Fixed: 2830502
Signed-off-by: Gaurav Jindal <[email protected]>

drivers/cam_isp/isp_hw_mgr/cam_ife_hw_mgr.c

@@ -256,7 +256,7 @@ static int cam_ife_mgr_get_hw_caps(void *hw_mgr_priv,
 			continue;
 
 		ife_csid_caps = (struct cam_ife_csid_hw_caps *)
-			&hw_mgr->ife_csid_dev_caps[i];
+			&hw_mgr->csid_hw_caps[i];
 
 		if (ife_csid_caps->is_lite) {
 			if (csid_lite_hw_info == NULL) {
@@ -407,7 +407,7 @@ static int cam_ife_hw_mgr_reset_csid(
 	struct cam_csid_reset_cfg_args  reset_args;
 	struct cam_isp_hw_mgr_res *hw_mgr_res;
 	struct cam_ife_hw_mgr          *hw_mgr;
-	unsigned long hw_idx_bitmap[CAM_IFE_CSID_HW_NUM_MAX] = {0};
+	bool hw_idx_map[CAM_IFE_CSID_HW_NUM_MAX] = {0};
 
 	hw_mgr = ctx->hw_mgr;
 
@@ -420,15 +420,16 @@ static int cam_ife_hw_mgr_reset_csid(
 			hw_intf = hw_mgr_res->hw_res[i]->hw_intf;
 
 			if ((hw_mgr->csid_global_reset_en) &&
-				(test_bit(hw_intf->hw_idx, hw_idx_bitmap)))
+				(hw_idx_map[hw_intf->hw_idx]))
 				continue;
+
 			reset_args.reset_type = reset_type;
 			reset_args.node_res = hw_mgr_res->hw_res[i];
 			rc  = hw_intf->hw_ops.reset(hw_intf->hw_priv,
 				&reset_args, sizeof(reset_args));
-			set_bit(hw_intf->hw_idx, hw_idx_bitmap);
 			if (rc)
 				goto err;
+			hw_idx_map[hw_intf->hw_idx] = true;
 		}
 	}
 
@@ -711,7 +712,8 @@ static int cam_ife_hw_mgr_init_hw(
 	hw_mgr = ctx->hw_mgr;
 
 	if (hw_mgr->csid_global_reset_en) {
-		rc = cam_ife_hw_mgr_reset_csid(ctx, CAM_IFE_CSID_RESET_GLOBAL);
+		rc = cam_ife_hw_mgr_reset_csid(ctx,
+			CAM_IFE_CSID_RESET_GLOBAL);
 		if (rc) {
 			CAM_ERR(CAM_ISP, "CSID reset failed");
 			goto deinit;
@@ -1308,6 +1310,9 @@ static int cam_ife_mgr_process_base_info(
 	struct cam_isp_hw_mgr_res        *hw_mgr_res;
 	struct cam_isp_resource_node     *res = NULL;
 	uint32_t i;
+	struct cam_ife_csid_hw_caps      *csid_caps = NULL;
+	struct cam_ife_hw_mgr            *hw_mgr;
+	bool   hw_idx_map[CAM_IFE_CSID_HW_NUM_MAX] = {0};
 
 	if (list_empty(&ctx->res_list_ife_src) &&
 		list_empty(&ctx->res_list_sfe_src)) {
@@ -1315,6 +1320,8 @@ static int cam_ife_mgr_process_base_info(
 		return -ENODEV;
 	}
 
+	hw_mgr = ctx->hw_mgr;
+
 	/* IFE mux in resources */
 	list_for_each_entry(hw_mgr_res, &ctx->res_list_ife_src, list) {
 		if (hw_mgr_res->res_type == CAM_ISP_RESOURCE_UNINT)
@@ -1333,6 +1340,35 @@ static int cam_ife_mgr_process_base_info(
 		}
 	}
 
+	/*CSID resources */
+
+	list_for_each_entry(hw_mgr_res, &ctx->res_list_ife_csid, list) {
+		if (hw_mgr_res->res_type == CAM_ISP_RESOURCE_UNINT)
+			continue;
+
+		for (i = 0; i < CAM_ISP_HW_SPLIT_MAX; i++) {
+			if (!hw_mgr_res->hw_res[i])
+				continue;
+
+			res = hw_mgr_res->hw_res[i];
+
+			if (hw_idx_map[res->hw_intf->hw_idx])
+				continue;
+
+			csid_caps = &hw_mgr->csid_hw_caps[res->hw_intf->hw_idx];
+
+			if (!csid_caps->need_separate_base)
+				continue;
+
+			cam_ife_mgr_add_base_info(ctx, i,
+				res->hw_intf->hw_idx,
+				CAM_ISP_HW_TYPE_CSID);
+			hw_idx_map[res->hw_intf->hw_idx] = true;
+			CAM_DBG(CAM_ISP, "add CSID base info for hw %d",
+				res->hw_intf->hw_idx);
+		}
+	}
+
 	/* SFE in resources */
 	list_for_each_entry(hw_mgr_res, &ctx->res_list_sfe_src, list) {
 		if (hw_mgr_res->res_type == CAM_ISP_RESOURCE_UNINT)
@@ -2704,8 +2740,7 @@ static int cam_ife_hw_mgr_acquire_csid_hw(
 	}
 
 	/* Start from lower_idx for SFE */
-	if (ife_ctx->is_fe_enabled || ife_ctx->dsp_enabled
-		|| in_port->usage_type ||
+	if (ife_ctx->is_fe_enabled || ife_ctx->dsp_enabled ||
 		(ife_ctx->ctx_type == CAM_IFE_CTX_TYPE_SFE))
 		is_start_lower_idx =  true;
 
@@ -8489,6 +8524,133 @@ static int cam_isp_sfe_add_scratch_buffer_cfg(
 	return rc;
 }
 
+static int cam_ife_mgr_csid_add_reg_update(struct cam_ife_hw_mgr_ctx *ctx,
+	struct cam_hw_prepare_update_args *prepare,
+	struct cam_kmd_buf_info *kmd_buf)
+{
+	int                                   i;
+	int                                   rc = 0;
+	uint32_t                              hw_idx;
+	struct cam_ife_hw_mgr                *hw_mgr;
+	struct cam_isp_hw_mgr_res            *hw_mgr_res;
+	struct cam_ife_csid_hw_caps          *csid_caps;
+	struct cam_isp_resource_node         *res;
+	struct cam_isp_change_base_args       change_base_info = {0};
+	struct cam_isp_csid_reg_update_args
+			rup_args[CAM_IFE_CSID_HW_NUM_MAX]  = {0};
+
+	hw_mgr = ctx->hw_mgr;
+	list_for_each_entry(hw_mgr_res, &ctx->res_list_ife_csid, list) {
+
+		if (hw_mgr_res->res_type == CAM_ISP_RESOURCE_UNINT)
+			continue;
+
+		for (i = 0; i < CAM_ISP_HW_SPLIT_MAX; i++) {
+			if (!hw_mgr_res->hw_res[i])
+				continue;
+
+			res = hw_mgr_res->hw_res[i];
+			hw_idx = res->hw_intf->hw_idx;
+			csid_caps = &hw_mgr->csid_hw_caps[hw_idx];
+
+			if (i == CAM_ISP_HW_SPLIT_RIGHT &&
+				csid_caps->only_master_rup)
+				continue;
+
+			rup_args[hw_idx].res[rup_args[hw_idx].num_res] = res;
+			rup_args[hw_idx].num_res++;
+
+			CAM_DBG(CAM_ISP,
+				"Reg update queued for res %d hw_id %d",
+				res->res_id, res->hw_intf->hw_idx);
+		}
+	}
+
+	for (i = 0; i < CAM_IFE_CSID_HW_NUM_MAX; i++) {
+		if (!rup_args[i].num_res)
+			continue;
+
+		change_base_info.base_idx = i;
+		change_base_info.cdm_id = ctx->cdm_id;
+		rc = cam_isp_add_change_base(prepare,
+			&ctx->res_list_ife_csid,
+			&change_base_info, kmd_buf);
+
+		CAM_DBG(CAM_ISP, "Ctx:%d Change base added for num_res %d",
+			ctx->ctx_index, rup_args[i].num_res);
+
+		if (rc) {
+			CAM_ERR(CAM_ISP,
+				"Change base Failed Ctx:%d hw_idx=%d, rc=%d",
+				ctx->ctx_index, i, rc);
+			break;
+		}
+
+		rc = cam_isp_add_csid_reg_update(prepare, kmd_buf,
+			&rup_args[i]);
+
+		if (rc) {
+			CAM_ERR(CAM_ISP, "Ctx:%u Reg Update failed idx:%u",
+				ctx->ctx_index, i);
+			break;
+		}
+
+		CAM_DBG(CAM_ISP, "Ctx:%d Reg update added id:%d num_res %d",
+			ctx->ctx_index, i, rup_args[i].num_res);
+	}
+
+	return rc;
+}
+
+static int cam_ife_mgr_isp_add_reg_update(struct cam_ife_hw_mgr_ctx *ctx,
+	struct cam_hw_prepare_update_args *prepare,
+	struct cam_kmd_buf_info *kmd_buf)
+{
+	int i;
+	int rc = 0;
+	struct cam_isp_change_base_args   change_base_info = {0};
+
+	for (i = 0; i < ctx->num_base; i++) {
+
+		change_base_info.base_idx = ctx->base[i].idx;
+		change_base_info.cdm_id = ctx->cdm_id;
+
+		/* Add change base */
+		if (!ctx->internal_cdm) {
+			rc = cam_isp_add_change_base(prepare,
+				&ctx->res_list_ife_src,
+				&change_base_info, kmd_buf);
+
+			if (rc) {
+				CAM_ERR(CAM_ISP,
+					"Add Change base cmd Failed i=%d, idx=%d, rc=%d",
+					i, ctx->base[i].idx, rc);
+				break;
+			}
+
+			CAM_DBG(CAM_ISP,
+				"Add Change base cmd i=%d, idx=%d, rc=%d",
+				i, ctx->base[i].idx, rc);
+		}
+
+		rc = cam_isp_add_reg_update(prepare,
+			&ctx->res_list_ife_src,
+			ctx->base[i].idx, kmd_buf);
+
+		if (rc) {
+			CAM_ERR(CAM_ISP,
+				"Add Reg Update cmd Failed i=%d, idx=%d, rc=%d",
+				i, ctx->base[i].idx, rc);
+			break;
+		}
+
+		CAM_DBG(CAM_ISP,
+			"Add Reg Update cmd i=%d, idx=%d, rc=%d",
+			i, ctx->base[i].idx, rc);
+	}
+	return rc;
+}
+
 static int cam_ife_mgr_prepare_hw_update(void *hw_mgr_priv,
 	void *prepare_hw_update_args)
 {
@@ -8506,7 +8668,6 @@ static int cam_ife_mgr_prepare_hw_update(void *hw_mgr_priv,
 	struct cam_isp_prepare_hw_update_data   *prepare_hw_data;
 	struct cam_isp_frame_header_info         frame_header_info;
 	struct cam_isp_change_base_args          change_base_info = {0};
-	struct list_head                        *res_list;
 	struct list_head                        *res_list_ife_rd_tmp = NULL;
 	struct cam_isp_check_sfe_fe_io_cfg       sfe_fe_chk_cfg;
 
@@ -8592,25 +8753,30 @@ static int cam_ife_mgr_prepare_hw_update(void *hw_mgr_priv,
 				rc = cam_isp_add_change_base(prepare,
 					&ctx->res_list_sfe_src,
 					&change_base_info, &kmd_buf);
-			} else {
+			} else if (ctx->base[i].hw_type == CAM_ISP_HW_TYPE_VFE){
 				CAM_DBG(CAM_ISP, "changing the base for IFE: %u CDM ID: %d",
 					ctx->base[i].idx, ctx->cdm_id);
 				rc = cam_isp_add_change_base(prepare,
 					&ctx->res_list_ife_src,
 					&change_base_info, &kmd_buf);
+			} else if (ctx->base[i].hw_type == CAM_ISP_HW_TYPE_CSID){
+				CAM_DBG(CAM_ISP, "changing the base for CSID: %u CDM ID: %d",
+					ctx->base[i].idx, ctx->cdm_id);
+				rc = cam_isp_add_change_base(prepare,
+					&ctx->res_list_ife_csid,
+					&change_base_info, &kmd_buf);
 			}
 
 			if (rc) {
 				CAM_ERR(CAM_ISP,
-				"Failed in change base for hw_type: %s i: %d, idx: %d, rc: %d",
-				(ctx->base[i].hw_type == CAM_ISP_HW_TYPE_SFE ? "SFE" : "IFE"),
-				i, ctx->base[i].idx, rc);
+				"Failed in change base for hw_type: %d i: %d, idx: %d, rc: %d",
+				ctx->base[i].hw_type, i, ctx->base[i].idx, rc);
 				goto end;
 			}
 		}
 		/* get command buffers */
 		if (ctx->base[i].split_id != CAM_ISP_HW_SPLIT_MAX) {
-			if (ctx->base[i].hw_type != CAM_ISP_HW_TYPE_SFE)
+			if (ctx->base[i].hw_type == CAM_ISP_HW_TYPE_VFE)
 				rc = cam_isp_add_command_buffers(
 					prepare, &kmd_buf, &ctx->base[i],
 					cam_isp_packet_generic_blob_handler,
@@ -8618,13 +8784,17 @@ static int cam_ife_mgr_prepare_hw_update(void *hw_mgr_priv,
 					CAM_ISP_IFE_OUT_RES_BASE,
 					(CAM_ISP_IFE_OUT_RES_BASE +
 					max_ife_out_res));
-			else
+			else if (ctx->base[i].hw_type == CAM_ISP_HW_TYPE_SFE)
 				rc = cam_sfe_add_command_buffers(
 					prepare, &kmd_buf, &ctx->base[i],
 					cam_sfe_packet_generic_blob_handler,
 					ctx->res_list_sfe_out,
 					CAM_ISP_SFE_OUT_RES_BASE,
 					CAM_ISP_SFE_OUT_RES_MAX);
+			else if (ctx->base[i].hw_type == CAM_ISP_HW_TYPE_CSID)
+				rc = cam_isp_add_csid_command_buffers(prepare,
+					&kmd_buf, &ctx->base[i]);
+
 			if (rc) {
 				CAM_ERR(CAM_ISP,
 					"Failed in add cmdbuf, i=%d, split_id=%d, rc=%d hw_type=%s",
@@ -8651,7 +8821,7 @@ static int cam_ife_mgr_prepare_hw_update(void *hw_mgr_priv,
 		}
 
 		/* get IO buffers */
-		if (ctx->base[i].hw_type != CAM_ISP_HW_TYPE_SFE)
+		if (ctx->base[i].hw_type == CAM_ISP_HW_TYPE_VFE)
 			rc = cam_isp_add_io_buffers(
 				hw_mgr->mgr_common.img_iommu_hdl,
 				hw_mgr->mgr_common.img_iommu_hdl_secure,
@@ -8663,7 +8833,7 @@ static int cam_ife_mgr_prepare_hw_update(void *hw_mgr_priv,
 				fill_ife_fence,
 				CAM_ISP_HW_TYPE_VFE, &frame_header_info,
 				&sfe_fe_chk_cfg);
-		else
+		else if (ctx->base[i].hw_type == CAM_ISP_HW_TYPE_SFE)
 			rc = cam_isp_add_io_buffers(
 				hw_mgr->mgr_common.img_iommu_hdl,
 				hw_mgr->mgr_common.img_iommu_hdl_secure,
@@ -8770,44 +8940,18 @@ static int cam_ife_mgr_prepare_hw_update(void *hw_mgr_priv,
 	}
 
 	/* add reg update commands */
-	for (i = 0; i < ctx->num_base; i++) {
+	if (hw_mgr->csid_rup_en)
+		rc = cam_ife_mgr_csid_add_reg_update(ctx,
+			prepare, &kmd_buf);
 
-		if (hw_mgr->csid_rup_en)
-			res_list = &ctx->res_list_ife_csid;
-		else
-			res_list = &ctx->res_list_ife_src;
-
-		change_base_info.base_idx = ctx->base[i].idx;
-		change_base_info.cdm_id = ctx->cdm_id;
-
-		/* Add change base */
-		if (!ctx->internal_cdm) {
-			rc = cam_isp_add_change_base(prepare,
-				res_list,
-				&change_base_info, &kmd_buf);
-
-			if (rc) {
-				CAM_ERR(CAM_ISP,
-					"Add Change base cmd Failed i=%d, idx=%d, rc=%d",
-					i, ctx->base[i].idx, rc);
-				goto end;
-			}
-		}
+	else
+		rc = cam_ife_mgr_isp_add_reg_update(ctx,
+			prepare, &kmd_buf);
 
-		if (hw_mgr->csid_rup_en)
-			rc = cam_isp_add_csid_reg_update(prepare,
-				&ctx->res_list_ife_csid,
-				ctx->base[i].idx, &kmd_buf);
-		else
-			rc = cam_isp_add_reg_update(prepare,
-				&ctx->res_list_ife_src,
-				ctx->base[i].idx, &kmd_buf);
-		if (rc) {
-			CAM_ERR(CAM_ISP,
-				"Add Change base cmd Failed i=%d, idx=%d, rc=%d",
-				i, ctx->base[i].idx, rc);
-			goto end;
-		}
+	if (rc) {
+		CAM_ERR(CAM_ISP, "Add RUP fail csid_rup_en %d",
+			hw_mgr->csid_rup_en);
+		goto end;
 	}
 
 	/* add go_cmd for offline context */
@@ -10335,6 +10479,7 @@ static int cam_ife_hw_mgr_event_handler(
 	case CAM_ISP_HW_EVENT_ERROR:
 		rc = cam_ife_hw_mgr_handle_hw_err(evt_id, priv, evt_info);
 		break;
+
 	default:
 		CAM_ERR(CAM_ISP, "Invalid event ID %d", evt_id);
 		break;
@@ -10358,13 +10503,13 @@ static int cam_ife_hw_mgr_sort_dev_with_caps(
 
 		ife_hw_mgr->csid_devices[i]->hw_ops.get_hw_caps(
 			ife_hw_mgr->csid_devices[i]->hw_priv,
-			&ife_hw_mgr->ife_csid_dev_caps[i],
-			sizeof(ife_hw_mgr->ife_csid_dev_caps[i]));
+			&ife_hw_mgr->csid_hw_caps[i],
+			sizeof(ife_hw_mgr->csid_hw_caps[i]));
 
 		ife_hw_mgr->csid_global_reset_en =
-			ife_hw_mgr->ife_csid_dev_caps[i].global_reset_en;
+			ife_hw_mgr->csid_hw_caps[i].global_reset_en;
 		ife_hw_mgr->csid_rup_en =
-			ife_hw_mgr->ife_csid_dev_caps[i].rup_en;
+			ife_hw_mgr->csid_hw_caps[i].rup_en;
 	}
 
 	/* get caps for ife devices */

drivers/cam_isp/isp_hw_mgr/cam_ife_hw_mgr.h

@@ -237,7 +237,7 @@ struct cam_ife_hw_mgr_ctx {
  * @free_ctx_list:         free hw context list
  * @used_ctx_list:         used hw context list
  * @ctx_pool:              context storage
- * @ife_csid_dev_caps      csid device capability stored per core
+ * @csid_hw_caps           csid hw capability stored per core
  * @ife_dev_caps           ife device capability per core
  * @work q                 work queue for IFE hw manager
  * @debug_cfg              debug configuration
@@ -262,7 +262,7 @@ struct cam_ife_hw_mgr {
 	struct list_head               used_ctx_list;
 	struct cam_ife_hw_mgr_ctx      ctx_pool[CAM_IFE_CTX_MAX];
 
-	struct cam_ife_csid_hw_caps    ife_csid_dev_caps[
+	struct cam_ife_csid_hw_caps    csid_hw_caps[
 						CAM_IFE_CSID_HW_NUM_MAX];
 	struct cam_vfe_hw_get_hw_cap   ife_dev_caps[CAM_IFE_HW_NUM_MAX];
 	struct cam_req_mgr_core_workq *workq;

drivers/cam_isp/isp_hw_mgr/hw_utils/cam_isp_packet_parser.c

@@ -450,6 +450,10 @@ int cam_isp_add_command_buffers(
 		case CAM_ISP_SFE_PACKET_META_COMMON:
 		case CAM_ISP_SFE_PACKET_META_DUAL_CONFIG:
 			break;
+		case CAM_ISP_PACKET_META_CSID_LEFT:
+		case CAM_ISP_PACKET_META_CSID_RIGHT:
+		case CAM_ISP_PACKET_META_CSID_COMMON:
+			break;
 		default:
 			CAM_ERR(CAM_ISP, "invalid cdm command meta data %d",
 				cmd_meta_data);
@@ -1544,18 +1548,142 @@ int cam_isp_add_wait_trigger(
 	return rc;
 }
 
+int cam_isp_add_csid_command_buffers(
+	struct cam_hw_prepare_update_args   *prepare,
+	struct cam_kmd_buf_info             *kmd_buf_info,
+	struct cam_isp_ctx_base_info        *base_info)
+{
+	int rc = 0;
+	uint32_t                           cmd_meta_data, num_ent, i;
+	uint32_t                           base_idx;
+	enum cam_isp_hw_split_id           split_id;
+	struct cam_cmd_buf_desc           *cmd_desc = NULL;
+	struct cam_hw_update_entry        *hw_entry = NULL;
+
+	split_id = base_info->split_id;
+	base_idx = base_info->idx;
+	hw_entry = prepare->hw_update_entries;
+
+	/*
+	 * set the cmd_desc to point the first command descriptor in the
+	 * packet
+	 */
+	cmd_desc = (struct cam_cmd_buf_desc *)
+			((uint8_t *)&prepare->packet->payload +
+			prepare->packet->cmd_buf_offset);
+
+	CAM_DBG(CAM_ISP, "split id = %d, number of command buffers:%d",
+		split_id, prepare->packet->num_cmd_buf);
+
+	for (i = 0; i < prepare->packet->num_cmd_buf; i++) {
+		num_ent = prepare->num_hw_update_entries;
+		if (!cmd_desc[i].length)
+			continue;
+
+		/* One hw entry space required for left or right or common */
+		if (num_ent + 1 >= prepare->max_hw_update_entries) {
+			CAM_ERR(CAM_ISP, "Insufficient  HW entries :%d %d",
+				num_ent, prepare->max_hw_update_entries);
+			return -EINVAL;
+		}
+
+		rc = cam_packet_util_validate_cmd_desc(&cmd_desc[i]);
+		if (rc)
+			return rc;
+
+		cmd_meta_data = cmd_desc[i].meta_data;
+
+		CAM_DBG(CAM_ISP, "meta type: %d, split_id: %d",
+			cmd_meta_data, split_id);
+
+		switch (cmd_meta_data) {
+
+		case CAM_ISP_PACKET_META_BASE:
+		case CAM_ISP_PACKET_META_LEFT:
+		case CAM_ISP_PACKET_META_DMI_LEFT:
+		case CAM_ISP_PACKET_META_RIGHT:
+		case CAM_ISP_PACKET_META_DMI_RIGHT:
+		case CAM_ISP_PACKET_META_COMMON:
+		case CAM_ISP_PACKET_META_DMI_COMMON:
+		case CAM_ISP_PACKET_META_DUAL_CONFIG:
+		case CAM_ISP_PACKET_META_GENERIC_BLOB_LEFT:
+		case CAM_ISP_PACKET_META_GENERIC_BLOB_RIGHT:
+		case CAM_ISP_PACKET_META_GENERIC_BLOB_COMMON:
+		case CAM_ISP_PACKET_META_REG_DUMP_ON_FLUSH:
+		case CAM_ISP_PACKET_META_REG_DUMP_ON_ERROR:
+		case CAM_ISP_PACKET_META_REG_DUMP_PER_REQUEST:
+			break;
+		case CAM_ISP_PACKET_META_CSID_LEFT:
+			if (split_id == CAM_ISP_HW_SPLIT_LEFT) {
+				hw_entry[num_ent].len = cmd_desc[i].length;
+				hw_entry[num_ent].handle =
+					cmd_desc[i].mem_handle;
+				hw_entry[num_ent].offset = cmd_desc[i].offset;
+				CAM_DBG(CAM_ISP,
+					"Meta_Left num_ent=%d handle=0x%x, len=%u, offset=%u",
+					num_ent,
+					hw_entry[num_ent].handle,
+					hw_entry[num_ent].len,
+					hw_entry[num_ent].offset);
+					hw_entry[num_ent].flags =
+						CAM_ISP_IQ_BL;
+
+				num_ent++;
+			}
+			break;
+		case CAM_ISP_PACKET_META_CSID_RIGHT:
+			if (split_id == CAM_ISP_HW_SPLIT_RIGHT) {
+				hw_entry[num_ent].len = cmd_desc[i].length;
+				hw_entry[num_ent].handle =
+					cmd_desc[i].mem_handle;
+				hw_entry[num_ent].offset = cmd_desc[i].offset;
+				CAM_DBG(CAM_ISP,
+					"Meta_Right num_ent=%d handle=0x%x, len=%u, offset=%u",
+					num_ent,
+					hw_entry[num_ent].handle,
+					hw_entry[num_ent].len,
+					hw_entry[num_ent].offset);
+					hw_entry[num_ent].flags =
+						CAM_ISP_IQ_BL;
+				num_ent++;
+			}
+			break;
+		case CAM_ISP_PACKET_META_CSID_COMMON:
+			hw_entry[num_ent].len = cmd_desc[i].length;
+			hw_entry[num_ent].handle =
+				cmd_desc[i].mem_handle;
+			hw_entry[num_ent].offset = cmd_desc[i].offset;
+			CAM_DBG(CAM_ISP,
+				"Meta_Common num_ent=%d handle=0x%x, len=%u, offset=%u",
+				num_ent,
+				hw_entry[num_ent].handle,
+				hw_entry[num_ent].len,
+				hw_entry[num_ent].offset);
+				hw_entry[num_ent].flags = CAM_ISP_IQ_BL;
+
+			num_ent++;
+			break;
+		default:
+			CAM_ERR(CAM_ISP, "invalid cdm command meta data %d",
+				cmd_meta_data);
+			return -EINVAL;
+		}
+		prepare->num_hw_update_entries = num_ent;
+	}
+
+	return rc;
+}
+
 int cam_isp_add_csid_reg_update(
 	struct cam_hw_prepare_update_args    *prepare,
-	struct list_head                     *res_list,
-	uint32_t                              base_idx,
-	struct cam_kmd_buf_info              *kmd_buf_info)
+	struct cam_kmd_buf_info              *kmd_buf_info,
+	void                                 *args)
 {
 	int rc = 0;
-	struct cam_isp_hw_mgr_res            *hw_mgr_res;
 	struct cam_isp_resource_node         *res;
-	uint32_t kmd_buf_remain_size, num_ent, i, reg_update_size, hw_idx;
-	struct cam_ife_csid_reg_update_args
-				rup_args[CAM_IFE_CSID_HW_NUM_MAX] = {0};
+	uint32_t kmd_buf_remain_size, num_ent;
+	uint32_t reg_update_size = 0;
+	struct cam_isp_csid_reg_update_args *rup_args = NULL;
 
 	if (prepare->num_hw_update_entries + 1 >=
 		prepare->max_hw_update_entries) {
@@ -1565,65 +1693,44 @@ int cam_isp_add_csid_reg_update(
 		return -EINVAL;
 	}
 
-	reg_update_size = 0;
-	list_for_each_entry(hw_mgr_res, res_list, list) {
-		if (hw_mgr_res->res_type == CAM_ISP_RESOURCE_UNINT)
-			continue;
+	rup_args = (struct cam_isp_csid_reg_update_args *)args;
 
-		for (i = 0; i < CAM_ISP_HW_SPLIT_MAX; i++) {
-			if (!hw_mgr_res->hw_res[i])
-				continue;
-			if (i == CAM_ISP_HW_SPLIT_RIGHT)
-				continue;
-			res = hw_mgr_res->hw_res[i];
-			if (res->hw_intf->hw_idx != base_idx)
-				continue;
-			hw_idx = res->hw_intf->hw_idx;
-			rup_args[hw_idx].res[rup_args[hw_idx].num_res] = res;
-			rup_args[hw_idx].num_res++;
-
-			CAM_DBG(CAM_ISP,
-				"Reg update added for res %d hw_id %d cdm_idx %d",
-				res->res_id, res->hw_intf->hw_idx, base_idx);
-		}
+	if (!rup_args->num_res) {
+		CAM_ERR(CAM_ISP, "No Res for Reg Update");
+		return -EINVAL;
 	}
 
-	for (i = 0; i < CAM_IFE_CSID_HW_NUM_MAX; i++) {
-		if (!rup_args[i].num_res)
-			continue;
-
-		if (kmd_buf_info->size > (kmd_buf_info->used_bytes +
-			reg_update_size)) {
-			kmd_buf_remain_size =  kmd_buf_info->size -
-				(kmd_buf_info->used_bytes +
-				reg_update_size);
-		} else {
-			CAM_ERR(CAM_ISP, "no free mem %d %d %d",
-				base_idx, kmd_buf_info->size,
-				kmd_buf_info->used_bytes +
-				reg_update_size);
-			rc = -EINVAL;
-			return rc;
-		}
+	if (kmd_buf_info->size <=(kmd_buf_info->used_bytes +
+		reg_update_size)) {
+		CAM_ERR(CAM_ISP, "no free mem %u %u %u",
+			kmd_buf_info->size,
+			kmd_buf_info->used_bytes +
+			reg_update_size);
+		return -EINVAL;
+	}
 
-		rup_args[i].cmd.cmd_buf_addr = kmd_buf_info->cpu_addr +
-			kmd_buf_info->used_bytes/4 +
-			reg_update_size/4;
-		rup_args[i].cmd.size = kmd_buf_remain_size;
-		res = rup_args[i].res[0];
+	kmd_buf_remain_size =  kmd_buf_info->size -
+		(kmd_buf_info->used_bytes +
+		reg_update_size);
 
-		rc = res->hw_intf->hw_ops.process_cmd(
-			res->hw_intf->hw_priv,
-			CAM_ISP_HW_CMD_GET_REG_UPDATE, &rup_args[i],
-			sizeof(struct cam_ife_csid_reg_update_args));
-		if (rc)
-			return rc;
+	memset(&rup_args->cmd, 0, sizeof(struct cam_isp_hw_cmd_buf_update));
+	rup_args->cmd.cmd_buf_addr = kmd_buf_info->cpu_addr +
+		kmd_buf_info->used_bytes/4 +
+		reg_update_size/4;
+	rup_args->cmd.size = kmd_buf_remain_size;
+	res = rup_args->res[0];
+
+	rc = res->hw_intf->hw_ops.process_cmd(
+		res->hw_intf->hw_priv,
+		CAM_ISP_HW_CMD_GET_REG_UPDATE, rup_args,
+		sizeof(struct cam_isp_csid_reg_update_args));
+	if (rc)
+		return rc;
 
-		CAM_DBG(CAM_ISP,
-			"Reg update added for res %d hw_id %d cdm_idx %d",
-			res->res_id, res->hw_intf->hw_idx, base_idx);
-		reg_update_size += rup_args[i].cmd.used_bytes;
-	}
+	CAM_DBG(CAM_ISP,
+		"Reg update added for res %d hw_id %d",
+		res->res_id, res->hw_intf->hw_idx);
+	reg_update_size += rup_args->cmd.used_bytes;
 
 	if (reg_update_size) {
 		/* Update the HW entries */
@@ -1648,7 +1755,6 @@ int cam_isp_add_csid_reg_update(
 		kmd_buf_info->offset     += reg_update_size;
 		prepare->num_hw_update_entries = num_ent;
 		/* reg update is success return status 0 */
-		rc = 0;
 	}
 
 	return rc;

drivers/cam_isp/isp_hw_mgr/hw_utils/include/cam_isp_packet_parser.h

@@ -302,17 +302,15 @@ int cam_isp_add_go_cmd(
  *                         ISP HW instance
  *
  * @prepare:               Contain the  packet and HW update variables
- * @res_list_isp_src:      Resource list for IFE/VFE source
- * @base_idx:              Base or dev index of the IFE/VFE HW instance
  * @kmd_buf_info:          Kmd buffer to store the change base command
+ * @rup_args:              Reg Update args
  * @return:                0 for success
  *                         -EINVAL for Fail
  */
 int cam_isp_add_csid_reg_update(
 	struct cam_hw_prepare_update_args    *prepare,
-	struct list_head                     *res_list,
-	uint32_t                              base_idx,
-	struct cam_kmd_buf_info              *kmd_buf_info);
+	struct cam_kmd_buf_info              *kmd_buf_info,
+	void                                 *args);
 
 
 /* cam_isp_add_csid_offline_cmd()
@@ -331,4 +329,22 @@ int cam_isp_add_csid_offline_cmd(
 	struct list_head                     *res_list,
 	uint32_t                              base_idx,
 	struct cam_kmd_buf_info              *kmd_buf_info);
+
+/*
+ * cam_isp_add_csid_command_buffers()
+ *
+ * @brief                  Add command buffer in the HW entries list for given
+ *                         left or right CSID instance.
+ *
+ * @prepare:               Contain the packet and HW update variables
+ * @kmd_buf_info:          KMD buffer to store the custom cmd data
+ * @base_info:             base hardware information
+ *
+ * @return:                0 for success
+ *                         Negative for Failure
+ */
+int cam_isp_add_csid_command_buffers(
+	struct cam_hw_prepare_update_args   *prepare,
+	struct cam_kmd_buf_info             *kmd_buf_info,
+	struct cam_isp_ctx_base_info        *base_info);
 #endif /*_CAM_ISP_HW_PARSER_H */

drivers/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid680.h

@@ -908,6 +908,8 @@ static struct cam_ife_csid_ver2_common_reg_info
 	.epoch_div_factor                        = 4,
 	.global_reset                            = 1,
 	.rup_supported                           = 1,
+	.only_master_rup                         = 1,
+	.need_separate_base                      = 0,
 };
 
 static struct cam_ife_csid_ver2_top_reg_info

drivers/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid_hw_ver2.c

@@ -986,6 +986,8 @@ int cam_ife_csid_ver2_get_hw_caps(void *hw_priv,
 	hw_caps->version_incr = csid_reg->cmn_reg->version_incr;
 	hw_caps->global_reset_en = csid_reg->cmn_reg->global_reset;
 	hw_caps->rup_en = csid_reg->cmn_reg->rup_supported;
+	hw_caps->only_master_rup = csid_reg->cmn_reg->only_master_rup;
+	hw_caps->need_separate_base = csid_reg->cmn_reg->need_separate_base;
 
 	CAM_DBG(CAM_ISP,
 		"CSID:%d No rdis:%d, no pix:%d, major:%d minor:%d ver :%d",
@@ -1098,7 +1100,6 @@ wait_only:
 		mem_base + csid_reg->cmn_reg->top_irq_mask_addr);
 
 	rc = cam_ife_csid_ver2_wait_for_reset(csid_hw);
-	cam_io_r_mb(mem_base + csid_reg->cmn_reg->top_irq_status_addr);
 	if (rc)
 		CAM_ERR(CAM_ISP,
 			"CSID[%d] Reset failed mode %d cmd %d loc %d",
@@ -2558,7 +2559,8 @@ static int cam_ife_csid_ver2_enable_csi2(struct cam_ife_csid_ver2_hw *csid_hw)
 
 	cam_io_w_mb(val, mem_base + csi2_reg->cfg0_addr);
 
-	CAM_DBG(CAM_ISP, "CSID[%d] rx_cfg0: 0x%x", val);
+	CAM_DBG(CAM_ISP, "CSID[%d] rx_cfg0: 0x%x",
+		csid_hw->hw_intf->hw_idx, val);
 
 	val = 0;
 	/*Configure Rx cfg1*/
@@ -2577,7 +2579,8 @@ static int cam_ife_csid_ver2_enable_csi2(struct cam_ife_csid_ver2_hw *csid_hw)
 	}
 
 	cam_io_w_mb(val, mem_base + csi2_reg->cfg1_addr);
-	CAM_DBG(CAM_ISP, "CSID[%d] rx_cfg1: 0x%x", val);
+	CAM_DBG(CAM_ISP, "CSID[%d] rx_cfg1: 0x%x",
+		csid_hw->hw_intf->hw_idx, val);
 
 	val = 0;
 
@@ -3233,7 +3236,7 @@ static int cam_ife_csid_ver2_reg_update(
 	void *cmd_args, uint32_t arg_size)
 {
 	const struct cam_ife_csid_ver2_rdi_reg_info *rdi_reg;
-	struct cam_ife_csid_reg_update_args         *rup_args = cmd_args;
+	struct cam_isp_csid_reg_update_args         *rup_args = cmd_args;
 	struct cam_cdm_utils_ops                    *cdm_util_ops;
 	struct cam_ife_csid_ver2_reg_info           *csid_reg;
 	uint32_t                                     size, i;
@@ -3241,9 +3244,9 @@ static int cam_ife_csid_ver2_reg_update(
 	uint32_t                                     rup_aup_mask = 0;
 	int rc                                       = 0;
 
-	if (arg_size != sizeof(struct cam_ife_csid_reg_update_args)) {
+	if (arg_size != sizeof(struct cam_isp_csid_reg_update_args)) {
 		CAM_ERR(CAM_ISP, "Invalid arg size: %d expected:%ld",
-			arg_size, sizeof(struct cam_ife_csid_reg_update_args));
+			arg_size, sizeof(struct cam_isp_csid_reg_update_args));
 		return -EINVAL;
 	}
 

drivers/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid_hw_ver2.h

@@ -518,6 +518,8 @@ struct cam_ife_csid_ver2_common_reg_info {
 	uint32_t early_eof_supported;
 	uint32_t global_reset;
 	uint32_t rup_supported;
+	uint32_t only_master_rup;
+	uint32_t need_separate_base;
 	/* Masks */
 	uint32_t pxl_cnt_mask;
 	uint32_t line_cnt_mask;

drivers/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid_lite680.h

@@ -74,6 +74,8 @@ static struct cam_ife_csid_ver2_common_reg_info
 	.top_reset_irq_shift_val                      = 0,
 	.global_reset                                 = 1,
 	.rup_supported                                = 1,
+	.only_master_rup                              = 1,
+	.need_separate_base                           = 0,
 };
 
 static struct cam_ife_csid_csi2_rx_reg_info

drivers/cam_isp/isp_hw_mgr/isp_hw/include/cam_ife_csid_hw_intf.h

@@ -55,15 +55,17 @@ enum cam_ife_cid_res_id {
 
 /**
  * struct cam_ife_csid_hw_caps- get the CSID hw capability
- * @num_rdis:          number of rdis supported by CSID HW device
- * @num_pix:           number of pxl paths supported by CSID HW device
- * @num_ppp:           number of ppp paths supported by CSID HW device
- * @major_version :    major version
- * @minor_version:     minor version
- * @version_incr:      version increment
- * @is_lite:           is the ife_csid lite
- * @global_reset_en:   flag to indicate if global reset is enabled
- * @rup_en:            flag to indicate if rup is on csid side
+ * @num_rdis:             number of rdis supported by CSID HW device
+ * @num_pix:              number of pxl paths supported by CSID HW device
+ * @num_ppp:              number of ppp paths supported by CSID HW device
+ * @major_version :       major version
+ * @minor_version:        minor version
+ * @version_incr:         version increment
+ * @is_lite:              is the ife_csid lite
+ * @global_reset_en:      flag to indicate if global reset is enabled
+ * @rup_en:               flag to indicate if rup is on csid side
+ * @only_master_rup:      flag to indicate if only master RUP
+ * @need_separate_base:   flag to indicate is separate base is needed
  */
 struct cam_ife_csid_hw_caps {
 	uint32_t      num_rdis;
@@ -75,6 +77,8 @@ struct cam_ife_csid_hw_caps {
 	bool          is_lite;
 	bool          global_reset_en;
 	bool          rup_en;
+	bool          only_master_rup;
+	bool          need_separate_base;
 };
 
 struct cam_isp_out_port_generic_info {
@@ -350,18 +354,16 @@ struct cam_ife_csid_dual_sync_args {
 };
 
 /*
- * struct cam_ife_csid_get_cmd_reg_update:
+ * struct cam_isp_csid_reg_update_args:
  *
  * @cmd:           cmd buf update args
  * @node_res:      Node res pointer
  * @num_res:       Num of resources
- * @is_mup_update: Flag to indicate if mup update
  */
-struct cam_ife_csid_reg_update_args {
+struct cam_isp_csid_reg_update_args {
 	struct cam_isp_hw_cmd_buf_update  cmd;
 	struct cam_isp_resource_node     *res[CAM_IFE_PIX_PATH_RES_MAX];
 	uint32_t                          num_res;
-	bool                              is_mup_update;
 };
 
 /*

drivers/cam_isp/isp_hw_mgr/isp_hw/include/cam_isp_hw.h

@@ -311,7 +311,6 @@ struct cam_isp_hw_get_res_for_mid {
  * @cmd:             Command buffer information
  * @use_scratch_cfg: To indicate if it's scratch buffer config
  * @trigger_cdm_en:  Flag to indicate if cdm is trigger
- * @is_mup_update:   Flag to indicate if MUP is updated
  *
  */
 struct cam_isp_hw_get_cmd_update {
@@ -326,7 +325,6 @@ struct cam_isp_hw_get_cmd_update {
 		struct cam_isp_hw_get_wm_update      *rm_update;
 	};
 	bool trigger_cdm_en;
-	bool is_mup_update;
 };
 
 /*