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msm: camera: csiphy: Add support for multiple AON Cameras

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Add support for more than one AON cameras for SM8650 target.

CRs-Fixed: 3149294
Change-Id: I842317ab59812109785a026fd0f728baf837b27f
Signed-off-by: Jigar Agrawal <quic_jigar@quicinc.com>
This commit is contained in:
Jigar Agrawal
2022-03-10 15:24:05 -08:00
committed by Camera Software Integration
parent e994f3799b
commit f8d9ddc7a4
11 changed files with 51 additions and 36 deletions
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30
drivers/cam_sensor_module/cam_csiphy/cam_csiphy_core.c
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@@ -47,7 +47,7 @@ struct g_csiphy_data {
uint32_t cpas_handle; uint32_t cpas_handle;
bool is_configured_for_main; bool is_configured_for_main;
uint64_t data_rate_aux_mask; uint64_t data_rate_aux_mask;
bool enable_aon_support; uint8_t aon_cam_id;
struct cam_csiphy_aon_sel_params_t *aon_sel_param; struct cam_csiphy_aon_sel_params_t *aon_sel_param;
}; };
@@ -1312,6 +1312,17 @@ static int __csiphy_cpas_configure_for_main_or_aon(
uint32_t aon_config = 0; uint32_t aon_config = 0;
uint32_t cpas_handle = g_phy_data[phy_idx].cpas_handle; uint32_t cpas_handle = g_phy_data[phy_idx].cpas_handle;
if (g_phy_data[phy_idx].aon_cam_id == NOT_AON_CAM) {
CAM_ERR(CAM_CSIPHY, "Not an AON Camera");
return -EINVAL;
}
if (!aon_sel_params->aon_cam_sel_offset[g_phy_data[phy_idx].aon_cam_id]) {
CAM_ERR(CAM_CSIPHY, "Mux register offset can not be 0. AON_Cam_ID: %u",
g_phy_data[phy_idx].aon_cam_id);
return -EINVAL;
}
if (get_access == g_phy_data[phy_idx].is_configured_for_main) { if (get_access == g_phy_data[phy_idx].is_configured_for_main) {
CAM_DBG(CAM_CSIPHY, "Already Configured/Released for %s", CAM_DBG(CAM_CSIPHY, "Already Configured/Released for %s",
get_access ? "Main" : "AON"); get_access ? "Main" : "AON");
@@ -1325,7 +1336,7 @@ static int __csiphy_cpas_configure_for_main_or_aon(
} }
cam_cpas_reg_read(cpas_handle, CAM_CPAS_REG_CPASTOP, cam_cpas_reg_read(cpas_handle, CAM_CPAS_REG_CPASTOP,
aon_sel_params->aon_cam_sel_offset, aon_sel_params->aon_cam_sel_offset[g_phy_data[phy_idx].aon_cam_id],
true, &aon_config); true, &aon_config);
if (get_access && !g_phy_data[phy_idx].is_configured_for_main) { if (get_access && !g_phy_data[phy_idx].is_configured_for_main) {
@@ -1344,7 +1355,7 @@ static int __csiphy_cpas_configure_for_main_or_aon(
CAM_DBG(CAM_CSIPHY, "value of aon_config = %u", aon_config); CAM_DBG(CAM_CSIPHY, "value of aon_config = %u", aon_config);
rc = cam_cpas_reg_write(cpas_handle, CAM_CPAS_REG_CPASTOP, rc = cam_cpas_reg_write(cpas_handle, CAM_CPAS_REG_CPASTOP,
aon_sel_params->aon_cam_sel_offset, aon_sel_params->aon_cam_sel_offset[g_phy_data[phy_idx].aon_cam_id],
true, aon_config); true, aon_config);
if (rc) if (rc)
CAM_ERR(CAM_CSIPHY, "CPAS AON sel register write failed"); CAM_ERR(CAM_CSIPHY, "CPAS AON sel register write failed");
@@ -1354,8 +1365,7 @@ static int __csiphy_cpas_configure_for_main_or_aon(
return rc; return rc;
} }
int cam_csiphy_util_update_aon_registration int cam_csiphy_util_update_aon_registration(uint32_t phy_idx, uint8_t aon_cam_id)
(uint32_t phy_idx, bool is_aon_user)
{ {
/* aon support enable for the sensor associated with phy idx*/ /* aon support enable for the sensor associated with phy idx*/
if (phy_idx >= MAX_CSIPHY) { if (phy_idx >= MAX_CSIPHY) {
@@ -1369,7 +1379,7 @@ int cam_csiphy_util_update_aon_registration
return -EINVAL; return -EINVAL;
} }
g_phy_data[phy_idx].enable_aon_support = is_aon_user; g_phy_data[phy_idx].aon_cam_id = aon_cam_id;
return 0; return 0;
} }
@@ -1401,7 +1411,7 @@ int cam_csiphy_util_update_aon_ops(
mutex_lock(&main_aon_selection); mutex_lock(&main_aon_selection);
CAM_DBG(CAM_CSIPHY, "PHY idx: %d, AON_support is %s", phy_idx, CAM_DBG(CAM_CSIPHY, "PHY idx: %d, AON_support %s", phy_idx,
(get_access) ? "enable" : "disable"); (get_access) ? "enable" : "disable");
rc = __csiphy_cpas_configure_for_main_or_aon( rc = __csiphy_cpas_configure_for_main_or_aon(
@@ -1863,7 +1873,7 @@ int32_t cam_csiphy_core_cfg(void *phy_dev,
g_phy_data[soc_info->index].is_3phase); g_phy_data[soc_info->index].is_3phase);
} }
if (g_phy_data[soc_info->index].enable_aon_support) { if (g_phy_data[soc_info->index].aon_cam_id != NOT_AON_CAM) {
rc = cam_csiphy_util_update_aon_ops(true, soc_info->index); rc = cam_csiphy_util_update_aon_ops(true, soc_info->index);
if (rc) { if (rc) {
CAM_ERR(CAM_CSIPHY, CAM_ERR(CAM_CSIPHY,
@@ -2048,7 +2058,7 @@ int32_t cam_csiphy_core_cfg(void *phy_dev,
if (csiphy_dev->acquire_count == 0) { if (csiphy_dev->acquire_count == 0) {
CAM_DBG(CAM_CSIPHY, "All PHY devices released"); CAM_DBG(CAM_CSIPHY, "All PHY devices released");
if (g_phy_data[soc_info->index].enable_aon_support) { if (g_phy_data[soc_info->index].aon_cam_id != NOT_AON_CAM) {
rc = cam_csiphy_util_update_aon_ops(false, soc_info->index); rc = cam_csiphy_util_update_aon_ops(false, soc_info->index);
if (rc) { if (rc) {
CAM_WARN(CAM_CSIPHY, CAM_WARN(CAM_CSIPHY,
@@ -2361,7 +2371,7 @@ int cam_csiphy_register_baseaddress(struct csiphy_device *csiphy_dev)
csiphy_dev->cpas_handle; csiphy_dev->cpas_handle;
g_phy_data[phy_idx].aon_sel_param = g_phy_data[phy_idx].aon_sel_param =
csiphy_dev->ctrl_reg->csiphy_reg->aon_sel_params; csiphy_dev->ctrl_reg->csiphy_reg->aon_sel_params;
g_phy_data[phy_idx].enable_aon_support = false; g_phy_data[phy_idx].aon_cam_id = NOT_AON_CAM;
g_phy_data[phy_idx].is_configured_for_main = false; g_phy_data[phy_idx].is_configured_for_main = false;
g_phy_data[phy_idx].data_rate_aux_mask = 0; g_phy_data[phy_idx].data_rate_aux_mask = 0;

5
drivers/cam_sensor_module/cam_csiphy/cam_csiphy_core.h
View File

@@ -84,11 +84,12 @@ void cam_csiphy_update_auxiliary_mask(struct csiphy_device *csiphy_dev);
int cam_csiphy_dump_status_reg(struct csiphy_device *csiphy_dev); int cam_csiphy_dump_status_reg(struct csiphy_device *csiphy_dev);
/** /**
* @phy_idx : To acquire the correct PHY hw to do the operation with * @phy_idx : To acquire the correct PHY hw to do the operation with
* @aon_camera_id : AON Camera ID
* *
* This API provides Utility/helper function to register AON Hw supprot for * This API provides Utility/helper function to register AON Hw supprot for
* correct PHY hw. * correct PHY hw.
* *
*/ */
int cam_csiphy_util_update_aon_registration(uint32_t phy_idx, bool is_aon_user); int cam_csiphy_util_update_aon_registration(uint32_t phy_idx, uint8_t aon_camera_id);
#endif /* _CAM_CSIPHY_CORE_H_ */ #endif /* _CAM_CSIPHY_CORE_H_ */

2
drivers/cam_sensor_module/cam_csiphy/cam_csiphy_dev.h
View File

@@ -96,7 +96,7 @@ enum cam_csiphy_common_reg_program {
* @mclk_sel_mask : MCLK select mask. * @mclk_sel_mask : MCLK select mask.
*/ */
struct cam_csiphy_aon_sel_params_t { struct cam_csiphy_aon_sel_params_t {
uint32_t aon_cam_sel_offset; uint32_t aon_cam_sel_offset[MAX_AON_CAM];
uint32_t cam_sel_mask; uint32_t cam_sel_mask;
uint32_t mclk_sel_mask; uint32_t mclk_sel_mask;
}; };

3
drivers/cam_sensor_module/cam_csiphy/include/cam_csiphy_2_1_0_hwreg.h
View File

@@ -10,7 +10,8 @@
#include "../cam_csiphy_dev.h" #include "../cam_csiphy_dev.h"
struct cam_csiphy_aon_sel_params_t aon_cam_select_params = { struct cam_csiphy_aon_sel_params_t aon_cam_select_params = {
.aon_cam_sel_offset = 0x01E0, .aon_cam_sel_offset[0] = 0x01E0,
.aon_cam_sel_offset[1] = 0,
.cam_sel_mask = BIT(0), .cam_sel_mask = BIT(0),
.mclk_sel_mask = BIT(8), .mclk_sel_mask = BIT(8),
}; };

3
drivers/cam_sensor_module/cam_csiphy/include/cam_csiphy_2_1_2_hwreg.h
View File

@@ -9,7 +9,8 @@
#include "../cam_csiphy_dev.h" #include "../cam_csiphy_dev.h"
struct cam_csiphy_aon_sel_params_t aon_cam_select_params_2_1_2 = { struct cam_csiphy_aon_sel_params_t aon_cam_select_params_2_1_2 = {
.aon_cam_sel_offset = 0x01E0, .aon_cam_sel_offset[0] = 0x01E0,
.aon_cam_sel_offset[1] = 0,
.cam_sel_mask = BIT(0), .cam_sel_mask = BIT(0),
.mclk_sel_mask = BIT(8), .mclk_sel_mask = BIT(8),
}; };

3
drivers/cam_sensor_module/cam_csiphy/include/cam_csiphy_2_1_3_hwreg.h
View File

@@ -10,7 +10,8 @@
#include "../cam_csiphy_dev.h" #include "../cam_csiphy_dev.h"
struct cam_csiphy_aon_sel_params_t aon_cam_select_params_2_1_3 = { struct cam_csiphy_aon_sel_params_t aon_cam_select_params_2_1_3 = {
.aon_cam_sel_offset = 0x01E0, .aon_cam_sel_offset[0] = 0x01E0,
.aon_cam_sel_offset[1] = 0,
.cam_sel_mask = BIT(0), .cam_sel_mask = BIT(0),
.mclk_sel_mask = BIT(8), .mclk_sel_mask = BIT(8),
}; };

4
drivers/cam_sensor_module/cam_sensor/cam_sensor_core.c
View File

@@ -1379,7 +1379,7 @@ int cam_sensor_power_up(struct cam_sensor_ctrl_t *s_ctrl)
} }
} }
if (s_ctrl->is_aon_user) { if (s_ctrl->aon_camera_id != NOT_AON_CAM) {
CAM_INFO(CAM_SENSOR, CAM_INFO(CAM_SENSOR,
"Setup for Main Camera with csiphy index: %d", "Setup for Main Camera with csiphy index: %d",
s_ctrl->sensordata->subdev_id[SUB_MODULE_CSIPHY]); s_ctrl->sensordata->subdev_id[SUB_MODULE_CSIPHY]);
@@ -1442,7 +1442,7 @@ int cam_sensor_power_down(struct cam_sensor_ctrl_t *s_ctrl)
return rc; return rc;
} }
if (s_ctrl->is_aon_user) { if (s_ctrl->aon_camera_id != NOT_AON_CAM) {
CAM_INFO(CAM_SENSOR, CAM_INFO(CAM_SENSOR,
"Setup for AON FW with csiphy index: %d", "Setup for AON FW with csiphy index: %d",
s_ctrl->sensordata->subdev_id[SUB_MODULE_CSIPHY]); s_ctrl->sensordata->subdev_id[SUB_MODULE_CSIPHY]);

8
drivers/cam_sensor_module/cam_sensor/cam_sensor_dev.h
View File

@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
/* /*
* Copyright (c) 2017-2019, 2021 The Linux Foundation. All rights reserved. * Copyright (c) 2017-2019, 2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
*/ */
#ifndef _CAM_SENSOR_DEV_H_ #ifndef _CAM_SENSOR_DEV_H_
@@ -86,7 +87,7 @@ struct sensor_intf_params {
* @last_flush_req: Last request to flush * @last_flush_req: Last request to flush
* @pipeline_delay: Sensor pipeline delay * @pipeline_delay: Sensor pipeline delay
* @sensor_name: Sensor name * @sensor_name: Sensor name
* @is_aon_user: To determine whether sensor is AON user or not * @aon_camera_id: AON Camera ID associated with this sensor
*/ */
struct cam_sensor_ctrl_t { struct cam_sensor_ctrl_t {
char device_name[ char device_name[
@@ -114,9 +115,8 @@ struct cam_sensor_ctrl_t {
bool bob_pwm_switch; bool bob_pwm_switch;
uint32_t last_flush_req; uint32_t last_flush_req;
uint16_t pipeline_delay; uint16_t pipeline_delay;
char sensor_name[ char sensor_name[CAM_SENSOR_NAME_MAX_SIZE];
CAM_SENSOR_NAME_MAX_SIZE]; uint8_t aon_camera_id;
bool is_aon_user;
}; };
/** /**

16
drivers/cam_sensor_module/cam_sensor/cam_sensor_soc.c
View File

@@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0-only // SPDX-License-Identifier: GPL-2.0-only
/* /*
* Copyright (c) 2017-2019, 2021 The Linux Foundation. All rights reserved. * Copyright (c) 2017-2019, 2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
*/ */
#include <linux/of.h> #include <linux/of.h>
@@ -242,21 +243,14 @@ static int32_t cam_sensor_driver_get_dt_data(struct cam_sensor_ctrl_t *s_ctrl)
sensordata->pos_yaw = 360; sensordata->pos_yaw = 360;
} }
if (!of_property_read_bool(of_node, "aon-user")) { if (of_property_read_u8(of_node, "aon-camera-id", &s_ctrl->aon_camera_id)) {
CAM_DBG(CAM_SENSOR, CAM_DBG(CAM_SENSOR, "cell_idx: %d is not used for AON usecase", soc_info->index);
"SENSOR cell_idx: %d not use for AON usecase", s_ctrl->aon_camera_id = NOT_AON_CAM;
s_ctrl->soc_info.index);
s_ctrl->is_aon_user = false;
} else {
CAM_DBG(CAM_SENSOR,
"SENSOR cell_idx: %d is user for AON usecase",
s_ctrl->soc_info.index);
s_ctrl->is_aon_user = true;
} }
rc = cam_sensor_util_aon_registration( rc = cam_sensor_util_aon_registration(
s_ctrl->sensordata->subdev_id[SUB_MODULE_CSIPHY], s_ctrl->sensordata->subdev_id[SUB_MODULE_CSIPHY],
s_ctrl->is_aon_user); s_ctrl->aon_camera_id);
if (rc) { if (rc) {
CAM_ERR(CAM_SENSOR, "Aon registration failed, rc: %d", rc); CAM_ERR(CAM_SENSOR, "Aon registration failed, rc: %d", rc);
goto FREE_SENSOR_DATA; goto FREE_SENSOR_DATA;

7
drivers/cam_sensor_module/cam_sensor_utils/cam_sensor_util.h
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@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
/* /*
* Copyright (c) 2017-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
*/ */
#ifndef _CAM_SENSOR_UTIL_H_ #ifndef _CAM_SENSOR_UTIL_H_
@@ -89,10 +90,10 @@ static inline int cam_sensor_util_aon_ops(bool get_access, uint32_t phy_idx)
return cam_csiphy_util_update_aon_ops(get_access, phy_idx); return cam_csiphy_util_update_aon_ops(get_access, phy_idx);
} }
static inline int cam_sensor_util_aon_registration(uint32_t phy_idx, bool aon_user) static inline int cam_sensor_util_aon_registration(uint32_t phy_idx, uint8_t aon_camera_id)
{ {
CAM_DBG(CAM_SENSOR, "Regsiter phy_idx: %u for AON operatoin: %d", phy_idx, aon_user); CAM_DBG(CAM_SENSOR, "Register phy_idx: %u for AON_Camera_ID: %d", phy_idx, aon_camera_id);
return cam_csiphy_util_update_aon_registration(phy_idx, aon_user); return cam_csiphy_util_update_aon_registration(phy_idx, aon_camera_id);
} }
#endif /* _CAM_SENSOR_UTIL_H_ */ #endif /* _CAM_SENSOR_UTIL_H_ */

6
dt-bindings/msm-camera.h
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@@ -106,4 +106,10 @@
#define CCI_MASTER_1 1 #define CCI_MASTER_1 1
#define CCI_MASTER_MAX 2 #define CCI_MASTER_MAX 2
/* AON Camera IDs*/
#define AON_CAM1 0
#define AON_CAM2 1
#define MAX_AON_CAM 2
#define NOT_AON_CAM 255
#endif #endif