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asoc: codecs: bolero: Update mixing path and channel mask for RX path

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RX_CDC_DMA_RX0/1/2/3 ports  drives RX0/RX1, RX2/RX3, RX4 and RX5
channels on bolero rx-macro. Update channel mask
as per these mapping and return to channel map
accordingly.

Change-Id: I2e66e601b5137ebc513527827332bbb7cde0acb3
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
This commit is contained in:
Laxminath Kasam
2019-08-09 21:47:33 +05:30
parent 52ae6581d7
commit f8adb5f3c3
2 changed files with 56 additions and 15 deletions
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32
asoc/codecs/bolero/rx-macro.c
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@@ -849,9 +849,9 @@ static int rx_macro_set_prim_interpolator_rate(struct snd_soc_dai *dai,
inp0_sel = int_mux_cfg0_val & 0x0F;
inp1_sel = (int_mux_cfg0_val >> 4) & 0x0F;
inp2_sel = (int_mux_cfg1_val >> 4) & 0x0F;
if ((inp0_sel == int_1_mix1_inp) ||
(inp1_sel == int_1_mix1_inp) ||
(inp2_sel == int_1_mix1_inp)) {
if ((inp0_sel == int_1_mix1_inp + INTn_1_INP_SEL_RX0) ||
(inp1_sel == int_1_mix1_inp + INTn_1_INP_SEL_RX0) ||
(inp2_sel == int_1_mix1_inp + INTn_1_INP_SEL_RX0)) {
int_fs_reg = BOLERO_CDC_RX_RX0_RX_PATH_CTL +
0x80 * j;
pr_debug("%s: AIF_PB DAI(%d) connected to INT%u_1\n",
@@ -900,7 +900,8 @@ static int rx_macro_set_mix_interpolator_rate(struct snd_soc_dai *dai,
int_mux_cfg1_val = snd_soc_component_read32(
component, int_mux_cfg1) &
0x0F;
if (int_mux_cfg1_val == int_2_inp) {
if (int_mux_cfg1_val == int_2_inp +
INTn_2_INP_SEL_RX0) {
int_fs_reg = BOLERO_CDC_RX_RX0_RX_PATH_MIX_CTL +
0x80 * j;
pr_debug("%s: AIF_PB DAI(%d) connected to INT%u_2\n",
@@ -1028,8 +1029,26 @@ static int rx_macro_get_channel_map(struct snd_soc_dai *dai,
if (++i == RX_MACRO_MAX_DMA_CH_PER_PORT)
break;
}
/*
* CDC_DMA_RX_0 port drives RX0/RX1 -- ch_mask 0x1/0x2/0x3
* CDC_DMA_RX_1 port drives RX2/RX3 -- ch_mask 0x1/0x2/0x3
* CDC_DMA_RX_2 port drives RX4 -- ch_mask 0x1
* CDC_DMA_RX_3 port drives RX5 -- ch_mask 0x1
* AIFn can pair to any CDC_DMA_RX_n port.
* In general, below convention is used::
* CDC_DMA_RX_0(AIF1)/CDC_DMA_RX_1(AIF2)/
* CDC_DMA_RX_2(AIF3)/CDC_DMA_RX_3(AIF4)
* Above is reflected in machine driver BE dailink
*/
if (ch_mask & 0x0C)
ch_mask = ch_mask >> 2;
if ((ch_mask & 0x10) || (ch_mask & 0x20))
ch_mask = 0x1;
*rx_slot = ch_mask;
*rx_num = rx_priv->active_ch_cnt[dai->id];
dev_dbg(rx_priv->dev,
"%s: dai->id:%d, ch_mask:0x%x, active_ch_cnt:%d active_mask: 0x%x\n",
__func__, dai->id, *rx_slot, *rx_num, rx_priv->active_ch_mask[dai->id]);
break;
case RX_MACRO_AIF_ECHO:
val = snd_soc_component_read32(component,
@@ -1097,9 +1116,12 @@ static int rx_macro_digital_mute(struct snd_soc_dai *dai, int mute)
if (int_mux_cfg0_val || (int_mux_cfg1_val & 0xF0))
snd_soc_component_update_bits(component,
reg, 0x20, 0x20);
if (int_mux_cfg1_val & 0x0F)
if (int_mux_cfg1_val & 0x0F) {
snd_soc_component_update_bits(component,
reg, 0x20, 0x20);
snd_soc_component_update_bits(component,
mix_reg, 0x20, 0x20);
}
}
}
break;