qcacmn: Interrupt assignment for UMAC HW reset feature
UMAC HW reset feature will be using the last interrupt context in each DP interrupt combination i.e., on a system with more than 8 MSIs for DP, UMAC HW reset will be assigned a dedicated interrupt context. Add the necessary support for the same. CRs-Fixed: 3163900 Change-Id: I26abd01e4261661ed95e1aa3cb2a774e78b50d9f
This commit is contained in:

committed by
Madan Koyyalamudi

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@@ -93,6 +93,8 @@
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#define WLAN_CFG_HOST2RXDMA_RING_MASK_2 0x4
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#define WLAN_CFG_HOST2RXDMA_RING_MASK_3 0x0
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#define WLAN_CFG_UMAC_RESET_INTR_MASK_0 0x1
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struct dp_int_mask_assignment {
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uint8_t tx_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
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uint8_t rx_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
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@@ -109,6 +111,7 @@ struct dp_int_mask_assignment {
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uint8_t tx_ring_near_full_irq_mask[WLAN_CFG_INT_NUM_CONTEXTS];
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uint8_t host2txmon_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
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uint8_t tx_mon_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
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uint8_t umac_reset_intr_mask[WLAN_CFG_INT_NUM_CONTEXTS];
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};
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#if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
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@@ -853,6 +856,8 @@ static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIO
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{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
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/* tx mon ring masks */
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{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
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/* umac reset mask */
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{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
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},
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/* Interrupt assignment for 1 MSI combination */
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{
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@@ -926,6 +931,9 @@ static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIO
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{ WLAN_CFG_TX_MON_RING_MASK_0 |
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WLAN_CFG_TX_MON_RING_MASK_1,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
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/* umac reset mask */
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{WLAN_CFG_UMAC_RESET_INTR_MASK_0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0},
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},
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/* Interrupt assignment for 2 MSI combination */
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{
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@@ -999,6 +1007,9 @@ static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIO
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{ WLAN_CFG_TX_MON_RING_MASK_0,
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WLAN_CFG_TX_MON_RING_MASK_1,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
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/* umac reset mask */
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{0, WLAN_CFG_UMAC_RESET_INTR_MASK_0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0},
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},
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/* Interrupt assignment for 3 MSI combination */
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{
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@@ -1080,6 +1091,9 @@ static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIO
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{ WLAN_CFG_TX_MON_RING_MASK_0,
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WLAN_CFG_TX_MON_RING_MASK_1,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
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/* umac reset mask */
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{0, 0, WLAN_CFG_UMAC_RESET_INTR_MASK_0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0},
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},
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/* Interrupt assignment for 4 MSI combination */
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{
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@@ -1153,6 +1167,9 @@ static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIO
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{ WLAN_CFG_TX_MON_RING_MASK_0,
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WLAN_CFG_TX_MON_RING_MASK_1,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
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/* umac reset mask */
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{0, 0, 0, WLAN_CFG_UMAC_RESET_INTR_MASK_0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0},
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},
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/* Interrupt assignment for 5 MSI combination */
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{
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@@ -1234,6 +1251,9 @@ static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIO
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{ WLAN_CFG_TX_MON_RING_MASK_0,
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WLAN_CFG_TX_MON_RING_MASK_1,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
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/* umac reset mask */
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{0, 0, 0, 0, WLAN_CFG_UMAC_RESET_INTR_MASK_0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0},
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},
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/* Interrupt assignment for 6 MSI combination */
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{
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@@ -1308,6 +1328,9 @@ static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIO
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{ WLAN_CFG_TX_MON_RING_MASK_0,
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WLAN_CFG_TX_MON_RING_MASK_1,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
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/* umac reset mask */
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{0, 0, 0, 0, 0, WLAN_CFG_UMAC_RESET_INTR_MASK_0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0},
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},
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/* Interrupt assignment for 7 MSI combination */
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{
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@@ -1390,6 +1413,9 @@ static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIO
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{ WLAN_CFG_TX_MON_RING_MASK_0,
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WLAN_CFG_TX_MON_RING_MASK_1,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
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/* umac reset mask */
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{0, 0, 0, 0, 0, 0, WLAN_CFG_UMAC_RESET_INTR_MASK_0, 0,
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0, 0, 0, 0, 0, 0, 0, 0},
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},
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/* Interrupt assignment for 8 MSI combination */
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{
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@@ -1472,6 +1498,9 @@ static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIO
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{ WLAN_CFG_TX_MON_RING_MASK_0,
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WLAN_CFG_TX_MON_RING_MASK_1,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
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/* umac reset mask */
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{0, 0, 0, 0, 0, 0, 0, WLAN_CFG_UMAC_RESET_INTR_MASK_0,
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0, 0, 0, 0, 0, 0, 0, 0},
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},
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/* Interrupt assignment for 9 MSI combination */
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{
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@@ -1554,6 +1583,9 @@ static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIO
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{ WLAN_CFG_TX_MON_RING_MASK_0,
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WLAN_CFG_TX_MON_RING_MASK_1,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
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/* umac reset mask */
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{0, 0, 0, 0, 0, 0, 0, 0,
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WLAN_CFG_UMAC_RESET_INTR_MASK_0, 0, 0, 0, 0, 0, 0, 0},
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},
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/* Interrupt assignment for 10 MSI combination */
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{
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@@ -1636,6 +1668,9 @@ static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIO
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{ WLAN_CFG_TX_MON_RING_MASK_0,
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WLAN_CFG_TX_MON_RING_MASK_1,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
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/* umac reset mask */
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{0, 0, 0, 0, 0, 0, 0, 0,
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0, WLAN_CFG_UMAC_RESET_INTR_MASK_0, 0, 0, 0, 0, 0, 0},
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},
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/* Interrupt assignment for 11 MSI combination */
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{
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@@ -1718,6 +1753,9 @@ static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIO
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{ WLAN_CFG_TX_MON_RING_MASK_0,
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WLAN_CFG_TX_MON_RING_MASK_1,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
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/* umac reset mask */
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{0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, WLAN_CFG_UMAC_RESET_INTR_MASK_0, 0, 0, 0, 0, 0},
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},
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/* Interrupt assignment for 12 MSI combination */
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{
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@@ -1791,6 +1829,9 @@ static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIO
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WLAN_CFG_TX_MON_RING_MASK_0,
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WLAN_CFG_TX_MON_RING_MASK_1,
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0, 0, 0, 0, 0, 0},
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/* umac reset mask */
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{0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, WLAN_CFG_UMAC_RESET_INTR_MASK_0, 0, 0, 0, 0},
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},
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/* Interrupt assignment for 13 MSI combination */
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{
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@@ -1864,6 +1905,9 @@ static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIO
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WLAN_CFG_TX_MON_RING_MASK_0,
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WLAN_CFG_TX_MON_RING_MASK_1,
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0, 0, 0, 0, 0, 0},
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/* umac reset mask */
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{0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, WLAN_CFG_UMAC_RESET_INTR_MASK_0, 0, 0, 0},
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},
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/* Interrupt assignment for 14 MSI combination */
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{
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@@ -1937,6 +1981,9 @@ static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIO
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WLAN_CFG_TX_MON_RING_MASK_0,
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WLAN_CFG_TX_MON_RING_MASK_1,
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0, 0, 0, 0, 0, 0},
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/* umac reset mask */
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{0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, WLAN_CFG_UMAC_RESET_INTR_MASK_0, 0, 0},
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},
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/* Interrupt assignment for 15 MSI combination */
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{
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@@ -2010,6 +2057,9 @@ static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIO
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WLAN_CFG_TX_MON_RING_MASK_0,
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WLAN_CFG_TX_MON_RING_MASK_1,
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0, 0, 0, 0, 0, 0},
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/* umac reset mask */
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{0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, WLAN_CFG_UMAC_RESET_INTR_MASK_0, 0},
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},
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/* Interrupt assignment for 16 MSI combination */
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{
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@@ -2083,6 +2133,9 @@ static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIO
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WLAN_CFG_TX_MON_RING_MASK_0,
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WLAN_CFG_TX_MON_RING_MASK_1,
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0, 0, 0, 0, 0},
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/* umac reset mask */
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{0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, WLAN_CFG_UMAC_RESET_INTR_MASK_0},
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},
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};
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#endif
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@@ -2312,6 +2365,8 @@ void wlan_cfg_fill_interrupt_mask(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx,
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wlan_cfg_ctx->int_host2rxdma_mon_ring_mask[i] =
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dp_mask_assignment[interrupt_index].host2rxdma_mon_ring_mask[i];
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}
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wlan_cfg_ctx->int_umac_reset_intr_mask[i] =
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dp_mask_assignment[interrupt_index].umac_reset_intr_mask[i];
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}
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}
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#endif
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@@ -3084,6 +3139,12 @@ int wlan_cfg_per_pdev_tx_ring(struct wlan_cfg_dp_soc_ctxt *cfg)
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return cfg->per_pdev_tx_ring;
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}
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int wlan_cfg_get_umac_reset_intr_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
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int context)
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{
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return cfg->int_umac_reset_intr_mask[context];
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}
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uint32_t
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wlan_cfg_rx_pending_hl_threshold(struct wlan_cfg_dp_soc_ctxt *cfg)
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{
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