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qcacmn: Interrupt assignment for UMAC HW reset feature

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UMAC HW reset feature will be using the last interrupt context in each
DP interrupt combination i.e., on a system with more than 8 MSIs for DP,
UMAC HW reset will be assigned a dedicated interrupt context.
Add the necessary support for the same.

CRs-Fixed: 3163900
Change-Id: I26abd01e4261661ed95e1aa3cb2a774e78b50d9f
This commit is contained in:
Shiva Krishna Pittala
2022-06-23 14:06:59 +05:30
committed by Madan Koyyalamudi
parent 0e54add2cb
commit f853241025
6 changed files with 118 additions and 1 deletions
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2
dp/wifi3.0/dp_umac_reset.h
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@@ -81,7 +81,7 @@ struct dp_soc_umac_reset_ctx {
struct umac_reset_shmem *shmem_vaddr_unaligned;
qdf_dma_addr_t shmem_paddr_aligned;
struct umac_reset_shmem *shmem_vaddr_aligned;
uint32_t intr_offset;
int intr_offset;
enum umac_reset_state current_state;
};