msm: camera: isp: Add new IRQ for VFE 780

Add new IRQ support in VFE driver for VFE 780.

CRs-Fixed: 2948116
Change-Id: Id4d3602b492b310216a477f0ed2f0325c4ffe2ad
Signed-off-by: Chandan Kumar Jha <[email protected]>

drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe17x/cam_vfe680.h

@@ -12,7 +12,7 @@
 
 #define CAM_VFE_BUS_VER3_680_MAX_CLIENTS     28
 
-static struct cam_vfe_top_ver4_module_desc vfe680_pp_mod_desc[] = {
+static struct cam_vfe_top_ver4_module_desc vfe680_ipp_mod_desc[] = {
 	{
 		.id = 0,
 		.desc = "CLC_DEMUX",
@@ -386,6 +386,65 @@ static struct cam_vfe_top_ver4_wr_client_desc vfe680_wr_client_desc[] = {
 	},
 };
 
+static struct cam_vfe_top_ver4_top_err_irq_desc vfe680_top_irq_err_desc[] = {
+	{
+		.bitmask = BIT(4),
+		.err_name = "PP VIOLATION",
+		.desc = "",
+	},
+	{
+		.bitmask = BIT(6),
+		.err_name = "PDAF VIOLATION",
+		.desc = "",
+	},
+	{
+		.bitmask = BIT(12),
+		.err_name = "DSP IFE PROTOCOL VIOLATION",
+		.desc = "CCIF protocol violation on the output Data",
+	},
+	{
+		.bitmask = BIT(13),
+		.err_name = "IFE DSP TX PROTOCOL VIOLATION",
+		.desc = "CCIF protocol violation on the outgoing data to the DSP interface",
+	},
+	{
+		.bitmask = BIT(14),
+		.err_name = "DSP IFE RX PROTOCOL VIOLATION",
+		.desc = "CCIF protocol violation on the incoming data from DSP before processed",
+	},
+	{
+		.bitmask = BIT(15),
+		.err_name = "DSP TX FIFO OVERFLOW",
+		.desc = "Overflow on DSP interface TX path FIFO",
+	},
+	{
+		.bitmask = BIT(16),
+		.err_name = "DSP RX FIFO OVERFLOW",
+		.desc = "Overflow on DSP interface RX path FIFO",
+	},
+	{
+		.bitmask = BIT(17),
+		.err_name = "DSP ERROR VIOLATION",
+		.desc = "When DSP sends a error signal",
+	},
+	{
+		.bitmask = BIT(18),
+		.err_name = "DIAG VIOLATION",
+		.desc = "HBI is less than the minimum required HBI",
+	},
+};
+
+static struct cam_vfe_top_ver4_pdaf_violation_desc vfe680_pdaf_violation_desc[] = {
+	{
+		.bitmask = BIT(0),
+		.desc = "Sim monitor 1 violation - SAD output",
+	},
+	{
+		.bitmask = BIT(1),
+		.desc = "Sim monitor 2 violation - pre-proc output, LSB aligned",
+	},
+};
+
 static struct cam_irq_register_set vfe680_top_irq_reg_set[3] = {
 	{
 		.mask_reg_offset   = 0x00000034,
@@ -422,7 +481,8 @@ static struct cam_vfe_top_ver4_reg_offset_common vfe680_top_common_reg = {
 	.diag_sensor_status_1     = 0x00000058,
 	.diag_frm_cnt_status_0    = 0x0000005C,
 	.diag_frm_cnt_status_1    = 0x00000060,
-	.violation_status         = 0x00000064,
+	.ipp_violation_status     = 0x00000064,
+	.pdaf_violation_status    = 0x00000404,
 	.core_cfg_3               = 0x00000068,
 	.core_cgc_ovd_0           = 0x00000018,
 	.core_cgc_ovd_1           = 0x0000001C,
@@ -472,7 +532,8 @@ static struct cam_vfe_ver4_path_reg_data vfe_pp_common_reg_data = {
 	.error_irq_mask                  = 0x7F050,
 	.enable_diagnostic_hw            = 0x1,
 	.top_debug_cfg_en                = 3,
-	.pp_violation_mask               = 0x10,
+	.ipp_violation_mask              = 0x10,
+	.pdaf_violation_mask             = 0x40,
 };
 
 static struct cam_vfe_ver4_path_reg_data vfe680_vfe_full_rdi_reg_data[3] = {
@@ -537,7 +598,7 @@ static struct cam_vfe_top_ver4_hw_info vfe680_top_hw_info = {
 	.rdi_hw_info[1] = &vfe680_rdi_hw_info_arr[1],
 	.rdi_hw_info[2] = &vfe680_rdi_hw_info_arr[2],
 	.wr_client_desc         = vfe680_wr_client_desc,
-	.module_desc            = vfe680_pp_mod_desc,
+	.ipp_module_desc        = vfe680_ipp_mod_desc,
 	.num_mux = 5,
 	.mux_type = {
 		CAM_VFE_CAMIF_VER_4_0,
@@ -550,7 +611,11 @@ static struct cam_vfe_top_ver4_hw_info vfe680_top_hw_info = {
 	.path_port_map = {
 		{CAM_ISP_HW_VFE_IN_PDLIB, CAM_ISP_IFE_OUT_RES_2PD},
 		{CAM_ISP_HW_VFE_IN_PDLIB, CAM_ISP_IFE_OUT_RES_PREPROCESS_2PD}
-	}
+	},
+	.num_top_errors                  = ARRAY_SIZE(vfe680_top_irq_err_desc),
+	.top_err_desc                    = vfe680_top_irq_err_desc,
+	.num_pdaf_violation_errors       = ARRAY_SIZE(vfe680_pdaf_violation_desc),
+	.pdaf_violation_desc             = vfe680_pdaf_violation_desc,
 };
 
 static struct cam_irq_register_set vfe680_bus_irq_reg[2] = {

drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe17x/cam_vfe780.h

@@ -12,7 +12,7 @@
 
 #define CAM_VFE_BUS_VER3_780_MAX_CLIENTS     27
 
-static struct cam_vfe_top_ver4_module_desc vfe780_pp_mod_desc[] = {
+static struct cam_vfe_top_ver4_module_desc vfe780_ipp_mod_desc[] = {
 	{
 		.id = 0,
 		.desc = "CLC_DEMUX",
@@ -394,6 +394,83 @@ static struct cam_vfe_top_ver4_wr_client_desc vfe780_wr_client_desc[] = {
 	},
 };
 
+static struct cam_vfe_top_ver4_top_err_irq_desc vfe780_top_irq_err_desc[] = {
+	{
+		.bitmask = BIT(4),
+		.err_name = "PP VIOLATION",
+		.desc = "",
+	},
+	{
+		.bitmask = BIT(6),
+		.err_name = "PDAF VIOLATION",
+		.desc = "",
+	},
+	{
+		.bitmask = BIT(7),
+		.err_name = "DYNAMIC PDAF SWITCH VIOLATION",
+		.desc = "PD exposure changes dynamically and the sensor gap is not large enough",
+	},
+	{
+		.bitmask = BIT(8),
+		.err_name = "LCR PD INPUT TIMING PROTOCOL VIOLATION",
+		.desc = "Input timing protocol on the LCR  and PD path is not met",
+	},
+	{
+		.bitmask = BIT(12),
+		.err_name = "DSP IFE PROTOCOL VIOLATION",
+		.desc = "CCIF protocol violation on the output Data",
+	},
+	{
+		.bitmask = BIT(13),
+		.err_name = "IFE DSP TX PROTOCOL VIOLATION",
+		.desc = "CCIF protocol violation on the outgoing data to the DSP interface",
+	},
+	{
+		.bitmask = BIT(14),
+		.err_name = "DSP IFE RX PROTOCOL VIOLATION",
+		.desc = "CCIF protocol violation on the incoming data from DSP before processed",
+	},
+	{
+		.bitmask = BIT(15),
+		.err_name = "DSP TX FIFO OVERFLOW",
+		.desc = "Overflow on DSP interface TX path FIFO",
+	},
+	{
+		.bitmask = BIT(16),
+		.err_name = "DSP RX FIFO OVERFLOW",
+		.desc = "Overflow on DSP interface RX path FIFO",
+	},
+	{
+		.bitmask = BIT(17),
+		.err_name = "DSP ERROR VIOLATION",
+		.desc = "When DSP sends a error signal",
+	},
+	{
+		.bitmask = BIT(18),
+		.err_name = "DIAG VIOLATION",
+		.desc = "HBI is less than the minimum required HBI",
+	},
+};
+
+static struct cam_vfe_top_ver4_pdaf_violation_desc vfe780_pdaf_violation_desc[] = {
+	{
+		.bitmask = BIT(0),
+		.desc = "Sim monitor 1 violation - SAD output",
+	},
+	{
+		.bitmask = BIT(1),
+		.desc = "Sim monitor 2 violation - pre-proc output",
+	},
+	{
+		.bitmask = BIT(2),
+		.desc = "Sim monitor 3 violation - parsed output",
+	},
+	{
+		.bitmask = BIT(3),
+		.desc = "Constraint violation",
+	},
+};
+
 static struct cam_irq_register_set vfe780_top_irq_reg_set[2] = {
 	{
 		.mask_reg_offset   = 0x00000034,
@@ -430,7 +507,8 @@ static struct cam_vfe_top_ver4_reg_offset_common vfe780_top_common_reg = {
 	.diag_sensor_status_1     = 0x00000058,
 	.diag_frm_cnt_status_0    = 0x0000005C,
 	.diag_frm_cnt_status_1    = 0x00000060,
-	.violation_status         = 0x00000064,
+	.ipp_violation_status     = 0x00000064,
+	.pdaf_violation_status    = 0x00000404,
 	.core_cgc_ovd_0           = 0x00000018,
 	.core_cgc_ovd_1           = 0x0000001C,
 	.ahb_cgc_ovd              = 0x00000020,
@@ -479,7 +557,8 @@ static struct cam_vfe_ver4_path_reg_data vfe780_pp_common_reg_data = {
 	.error_irq_mask                  = 0x7F1D0,
 	.enable_diagnostic_hw            = 0x1,
 	.top_debug_cfg_en                = 3,
-	.pp_violation_mask               = 0x10,
+	.ipp_violation_mask              = 0x10,
+	.pdaf_violation_mask             = 0x40,
 };
 
 static struct cam_vfe_ver4_path_reg_data vfe780_vfe_full_rdi_reg_data[3] = {
@@ -544,7 +623,7 @@ static struct cam_vfe_top_ver4_hw_info vfe780_top_hw_info = {
 	.rdi_hw_info[1] = &vfe780_rdi_hw_info_arr[1],
 	.rdi_hw_info[2] = &vfe780_rdi_hw_info_arr[2],
 	.wr_client_desc         = vfe780_wr_client_desc,
-	.module_desc            = vfe780_pp_mod_desc,
+	.ipp_module_desc        = vfe780_ipp_mod_desc,
 	.num_mux = 5,
 	.mux_type = {
 		CAM_VFE_CAMIF_VER_4_0,
@@ -558,7 +637,11 @@ static struct cam_vfe_top_ver4_hw_info vfe780_top_hw_info = {
 		{CAM_ISP_HW_VFE_IN_PDLIB, CAM_ISP_IFE_OUT_RES_2PD},
 		{CAM_ISP_HW_VFE_IN_PDLIB, CAM_ISP_IFE_OUT_RES_PREPROCESS_2PD},
 		{CAM_ISP_HW_VFE_IN_PDLIB, CAM_ISP_IFE_OUT_RES_PDAF_PARSED_DATA}
-	}
+	},
+	.num_top_errors                  = ARRAY_SIZE(vfe780_top_irq_err_desc),
+	.top_err_desc                    = vfe780_top_irq_err_desc,
+	.num_pdaf_violation_errors       = ARRAY_SIZE(vfe780_pdaf_violation_desc),
+	.pdaf_violation_desc             = vfe780_pdaf_violation_desc,
 };
 
 static struct cam_irq_register_set vfe780_bus_irq_reg[2] = {

drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe17x/cam_vfe_lite68x.h

@@ -12,7 +12,7 @@
 #include "cam_vfe_bus_ver3.h"
 #include "cam_irq_controller.h"
 
-static struct cam_vfe_top_ver4_module_desc vfe68x_pp_mod_desc[] = {
+static struct cam_vfe_top_ver4_module_desc vfe68x_ipp_mod_desc[] = {
 	{
 		.id = 0,
 		.desc = "CLC_BLS",
@@ -83,7 +83,7 @@ static struct cam_vfe_top_ver4_reg_offset_common vfe68x_top_common_reg = {
 	.diag_config              = 0x00001040,
 	.diag_sensor_status_0     = 0x00001044,
 	.diag_sensor_status_1     = 0x00001048,
-	.violation_status         = 0x00001054,
+	.ipp_violation_status     = 0x00001054,
 	.bus_violation_status     = 0x00001264,
 	.bus_overflow_status      = 0x00001268,
 	.top_debug_cfg            = 0x00001074,
@@ -104,7 +104,7 @@ static struct cam_vfe_ver4_path_reg_data vfe68x_ipp_reg_data =
 	.error_irq_mask                  = 0x2,
 	.enable_diagnostic_hw            = 0x1,
 	.top_debug_cfg_en                = 0x3,
-	.pp_violation_mask               = 0x10,
+	.ipp_violation_mask              = 0x10,
 };
 
 static struct cam_vfe_ver4_path_reg_data vfe68x_rdi_reg_data[4] = {
@@ -170,7 +170,7 @@ static struct cam_vfe_top_ver4_hw_info vfe68x_top_hw_info = {
 		.common_reg     = &vfe68x_top_common_reg,
 		.reg_data       = &vfe68x_ipp_reg_data,
 	},
-	.module_desc            = vfe68x_pp_mod_desc,
+	.ipp_module_desc        = vfe68x_ipp_mod_desc,
 	.wr_client_desc         = vfe680x_wr_client_desc,
 	.num_mux = 5,
 	.mux_type = {

drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe17x/cam_vfe_lite78x.h

@@ -12,7 +12,7 @@
 #include "cam_vfe_bus_ver3.h"
 #include "cam_irq_controller.h"
 
-static struct cam_vfe_top_ver4_module_desc vfe_lite78x_pp_mod_desc[] = {
+static struct cam_vfe_top_ver4_module_desc vfe_lite78x_ipp_mod_desc[] = {
 	{
 		.id = 0,
 		.desc = "CLC_BLS",
@@ -83,7 +83,7 @@ static struct cam_vfe_top_ver4_reg_offset_common vfe_lite78x_top_common_reg = {
 	.diag_config              = 0x00001040,
 	.diag_sensor_status_0     = 0x00001044,
 	.diag_sensor_status_1     = 0x00001048,
-	.violation_status         = 0x00001054,
+	.ipp_violation_status     = 0x00001054,
 	.bus_violation_status     = 0x00001264,
 	.bus_overflow_status      = 0x00001268,
 	.top_debug_cfg            = 0x00001074,
@@ -104,7 +104,7 @@ static struct cam_vfe_ver4_path_reg_data vfe_lite78x_ipp_reg_data =
 	.error_irq_mask                  = 0x2,
 	.enable_diagnostic_hw            = 0x1,
 	.top_debug_cfg_en                = 0x3,
-	.pp_violation_mask               = 0x10,
+	.ipp_violation_mask              = 0x10,
 };
 
 static struct cam_vfe_ver4_path_reg_data vfe_lite78x_rdi_reg_data[4] = {
@@ -170,7 +170,7 @@ static struct cam_vfe_top_ver4_hw_info vfe_lite78x_top_hw_info = {
 		.common_reg     = &vfe_lite78x_top_common_reg,
 		.reg_data       = &vfe_lite78x_ipp_reg_data,
 	},
-	.module_desc            = vfe_lite78x_pp_mod_desc,
+	.ipp_module_desc        = vfe_lite78x_ipp_mod_desc,
 	.wr_client_desc         = vfe_lite78x_wr_client_desc,
 	.num_mux = 5,
 	.mux_type = {

drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_top/cam_vfe_top_ver4.c

@@ -784,6 +784,89 @@ static void cam_vfe_top_ver4_check_module_status(
 	}
 }
 
+static void cam_vfe_top_ver4_print_pdaf_violation_info(
+	struct cam_vfe_mux_ver4_data *vfe_priv)
+{
+	struct cam_vfe_top_ver4_priv        *top_priv;
+	struct cam_hw_soc_info              *soc_info;
+	struct cam_vfe_top_ver4_common_data *common_data;
+	void __iomem                        *base;
+	uint32_t                             val = 0;
+	uint32_t                             i = 0;
+
+	top_priv    =  vfe_priv->top_priv;
+	common_data = &top_priv->common_data;
+	soc_info    =  top_priv->top_common.soc_info;
+	base        =  soc_info->reg_map[VFE_CORE_BASE_IDX].mem_base;
+	val         =  cam_io_r(base +
+			    common_data->common_reg->pdaf_violation_status),
+
+	CAM_INFO(CAM_ISP, "VFE[%u] PDAF HW Violation status 0x%x",
+	     soc_info->index, val);
+
+	for (i = 0; i < common_data->hw_info->num_pdaf_violation_errors; i++) {
+		if (common_data->hw_info->pdaf_violation_desc[i].bitmask &
+			val) {
+			CAM_ERR(CAM_ISP, "%s",
+				common_data->hw_info->pdaf_violation_desc[i].desc);
+
+		}
+	}
+}
+
+static void cam_vfe_top_ver4_print_ipp_violation_info(
+	struct cam_vfe_top_ver4_priv *top_priv)
+{
+	struct cam_hw_soc_info              *soc_info;
+	struct cam_vfe_top_ver4_common_data *common_data;
+	void __iomem                        *base;
+	uint32_t                             val = 0;
+
+	common_data = &top_priv->common_data;
+	soc_info    =  top_priv->top_common.soc_info;
+	base        =  soc_info->reg_map[VFE_CORE_BASE_IDX].mem_base;
+	val         =  cam_io_r(base +
+			    common_data->common_reg->ipp_violation_status),
+
+	CAM_INFO(CAM_ISP, "VFE[%u] IPP Violation status 0x%x",
+	     soc_info->index, val);
+
+	if (common_data->hw_info->ipp_module_desc)
+		CAM_ERR(CAM_ISP, "VFE[%u] IPP Violation Module id: [%u %s]",
+			soc_info->index,
+			common_data->hw_info->ipp_module_desc[val].id,
+			common_data->hw_info->ipp_module_desc[val].desc);
+
+}
+
+static void cam_vfe_top_ver4_print_top_irq_error(
+	struct cam_vfe_mux_ver4_data *vfe_priv,
+	uint32_t irq_status)
+{
+	uint32_t                                    i = 0;
+	struct cam_vfe_top_ver4_priv               *top_priv;
+	struct cam_vfe_top_ver4_common_data        *common_data;
+
+	top_priv    =  vfe_priv->top_priv;
+	common_data = &top_priv->common_data;
+
+	for (i = 0; i < common_data->hw_info->num_top_errors; i++) {
+		if (common_data->hw_info->top_err_desc[i].bitmask &
+			irq_status) {
+			CAM_ERR(CAM_ISP, "%s %s",
+				common_data->hw_info->top_err_desc[i].err_name,
+				common_data->hw_info->top_err_desc[i].desc);
+
+		}
+	}
+
+	if (irq_status & vfe_priv->reg_data->ipp_violation_mask)
+		cam_vfe_top_ver4_print_ipp_violation_info(top_priv);
+
+	if (irq_status & vfe_priv->reg_data->pdaf_violation_mask)
+		cam_vfe_top_ver4_print_pdaf_violation_info(vfe_priv);
+}
+
 static void cam_vfe_top_ver4_print_debug_reg_status(
 	struct cam_vfe_top_ver4_priv *top_priv)
 {
@@ -1207,31 +1290,6 @@ int cam_vfe_top_ver4_release(void *device_priv,
 	return 0;
 }
 
-static void cam_vfe_top_ver4_print_violation_info(
-	struct cam_vfe_top_ver4_priv *top_priv)
-{
-	struct cam_hw_soc_info              *soc_info;
-	struct cam_vfe_top_ver4_common_data *common_data;
-	void __iomem                        *base;
-	uint32_t                             val = 0;
-
-	common_data = &top_priv->common_data;
-	soc_info    =  top_priv->top_common.soc_info;
-	base        =  soc_info->reg_map[VFE_CORE_BASE_IDX].mem_base;
-	val         =  cam_io_r(base +
-			    common_data->common_reg->violation_status),
-
-	CAM_ERR(CAM_ISP, "VFE[%u] PP Violation status 0x%x",
-	     soc_info->index, val);
-
-	if (common_data->hw_info->module_desc)
-		CAM_ERR(CAM_ISP, "VFE[%u] PP Violation Module id: %u %s]",
-			soc_info->index,
-			common_data->hw_info->module_desc[val].id,
-			common_data->hw_info->module_desc[val].desc);
-
-}
-
 int cam_vfe_top_ver4_start(void *device_priv,
 	void *start_args, uint32_t arg_size)
 {
@@ -1644,10 +1702,8 @@ static int cam_vfe_handle_irq_bottom_half(void *handler_priv,
 
 		cam_vfe_top_ver4_print_debug_reg_status(vfe_priv->top_priv);
 
-		if (irq_status[CAM_IFE_IRQ_CAMIF_REG_STATUS0] &
-			vfe_priv->reg_data->pp_violation_mask)
-			cam_vfe_top_ver4_print_violation_info(
-				vfe_priv->top_priv);
+		cam_vfe_top_ver4_print_top_irq_error(vfe_priv,
+			irq_status[CAM_IFE_IRQ_CAMIF_REG_STATUS0]);
 
 		ret = CAM_VFE_IRQ_STATUS_ERR;
 	}

drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_top/cam_vfe_top_ver4.h

@@ -38,7 +38,8 @@ struct cam_vfe_top_ver4_reg_offset_common {
 	uint32_t period_cfg;
 	uint32_t reg_update_cmd;
 	uint32_t trigger_cdm_events;
-	uint32_t violation_status;
+	uint32_t ipp_violation_status;
+	uint32_t pdaf_violation_status;
 	uint32_t custom_frame_idx;
 	uint32_t dsp_status;
 	uint32_t diag_config;
@@ -81,6 +82,17 @@ struct cam_vfe_top_ver4_wr_client_desc {
 	uint8_t  *desc;
 };
 
+struct cam_vfe_top_ver4_top_err_irq_desc {
+	uint32_t  bitmask;
+	char     *err_name;
+	char     *desc;
+};
+
+struct cam_vfe_top_ver4_pdaf_violation_desc {
+	uint32_t  bitmask;
+	char     *desc;
+};
+
 struct cam_vfe_ver4_path_hw_info {
 	struct cam_vfe_top_ver4_reg_offset_common  *common_reg;
 	struct cam_vfe_ver4_path_reg_data          *reg_data;
@@ -95,24 +107,29 @@ struct cam_vfe_top_ver4_hw_info {
 
 	struct cam_vfe_ver4_path_reg_data          *reg_data;
 	struct cam_vfe_top_ver4_wr_client_desc     *wr_client_desc;
-	struct cam_vfe_top_ver4_module_desc        *module_desc;
+	struct cam_vfe_top_ver4_module_desc        *ipp_module_desc;
 	uint32_t                                    num_reg;
 	uint32_t                                    num_mux;
 	uint32_t                                    num_path_port_map;
 	uint32_t mux_type[CAM_VFE_TOP_MUX_MAX];
 	uint32_t path_port_map[CAM_ISP_HW_PATH_PORT_MAP_MAX][2];
+	uint32_t                                     num_top_errors;
+	struct cam_vfe_top_ver4_top_err_irq_desc    *top_err_desc;
+	uint32_t                                     num_pdaf_violation_errors;
+	struct cam_vfe_top_ver4_pdaf_violation_desc *pdaf_violation_desc;
 };
 
 struct cam_vfe_ver4_path_reg_data {
-	uint32_t     epoch_line_cfg;
-	uint32_t     sof_irq_mask;
-	uint32_t     epoch0_irq_mask;
-	uint32_t     epoch1_irq_mask;
-	uint32_t     eof_irq_mask;
-	uint32_t     error_irq_mask;
-	uint32_t     enable_diagnostic_hw;
-	uint32_t     top_debug_cfg_en;
-	uint32_t     pp_violation_mask;
+	uint32_t                                     epoch_line_cfg;
+	uint32_t                                     sof_irq_mask;
+	uint32_t                                     epoch0_irq_mask;
+	uint32_t                                     epoch1_irq_mask;
+	uint32_t                                     eof_irq_mask;
+	uint32_t                                     error_irq_mask;
+	uint32_t                                     enable_diagnostic_hw;
+	uint32_t                                     top_debug_cfg_en;
+	uint32_t                                     ipp_violation_mask;
+	uint32_t                                     pdaf_violation_mask;
 };