soc: swr-mstr-ctrl: dedicated ports for enable/disable of PCM usescases
For PCM usecase enable/disable we have dedicated ports, so no need of using counter to manage enable and disable of ports. This is revert of change-id: I2c65e7658bf90ae01203ebb1b15f14db581ffa55. Change-Id: Id1953f529569ae48b01dce1c88d2790479cf1a6b Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
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@@ -1,7 +1,7 @@
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// SPDX-License-Identifier: GPL-2.0-only
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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/*
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* Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
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* Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
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* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) 2022-2023, Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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*/
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#include <linux/irq.h>
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#include <linux/irq.h>
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@@ -800,19 +800,9 @@ static int swrm_pcm_port_config(struct swr_mstr_ctrl *swrm, u8 port_num,
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reg_addr = ((dir) ? SWRM_DIN_DP_PCM_PORT_CTRL(port_num) : \
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reg_addr = ((dir) ? SWRM_DIN_DP_PCM_PORT_CTRL(port_num) : \
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SWRM_DOUT_DP_PCM_PORT_CTRL(port_num));
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SWRM_DOUT_DP_PCM_PORT_CTRL(port_num));
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reg_val = enable ? 0x3 : 0x0;
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reg_val = enable ? 0x3 : 0x0;
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if (enable) {
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swr_master_write(swrm, reg_addr, reg_val);
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if (swrm->pcm_enable_count == 0)
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dev_dbg(swrm->dev, "%s : pcm port %s, reg_val = %d, for addr %x\n",
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swr_master_write(swrm, reg_addr, reg_val);
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__func__, enable ? "Enabled" : "disabled", reg_val, reg_addr);
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swrm->pcm_enable_count++;
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} else {
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if (swrm->pcm_enable_count > 0)
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swrm->pcm_enable_count--;
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if (swrm->pcm_enable_count == 0)
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swr_master_write(swrm, reg_addr, reg_val);
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}
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dev_dbg(swrm->dev, "%s : pcm port %s, reg_val = %d, for addr %x, pcm_enable_cnt:%d\n",
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__func__, enable ? "Enabled" : "disabled", reg_val, reg_addr,
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swrm->pcm_enable_count);
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return 0;
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return 0;
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}
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}
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@@ -1710,8 +1700,6 @@ static int swrm_slvdev_datapath_control(struct swr_master *master, bool enable)
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}
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}
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clear_bit(DISABLE_PENDING, &swrm->port_req_pending);
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clear_bit(DISABLE_PENDING, &swrm->port_req_pending);
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swrm_cleanup_disabled_port_reqs(master);
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swrm_cleanup_disabled_port_reqs(master);
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/* reset enable_count to 0 in SSR if master is already down */
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swrm->pcm_enable_count = 0;
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if (!swrm_is_port_en(master)) {
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if (!swrm_is_port_en(master)) {
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dev_dbg(&master->dev, "%s: pm_runtime auto suspend triggered\n",
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dev_dbg(&master->dev, "%s: pm_runtime auto suspend triggered\n",
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__func__);
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__func__);
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@@ -2846,7 +2834,7 @@ static int swrm_probe(struct platform_device *pdev)
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dev_err(swrm->dev, "missing port mapping\n");
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dev_err(swrm->dev, "missing port mapping\n");
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goto err_pdata_fail;
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goto err_pdata_fail;
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}
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}
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swrm->pcm_enable_count = 0;
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map_length = map_size / (3 * sizeof(u32));
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map_length = map_size / (3 * sizeof(u32));
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if (num_ports > SWR_MSTR_PORT_LEN) {
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if (num_ports > SWR_MSTR_PORT_LEN) {
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dev_err(&pdev->dev, "%s:invalid number of swr ports\n",
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dev_err(&pdev->dev, "%s:invalid number of swr ports\n",
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@@ -1,6 +1,7 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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/*
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* Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
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* Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
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* Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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*/
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#ifndef _SWR_WCD_CTRL_H
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#ifndef _SWR_WCD_CTRL_H
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@@ -185,7 +186,6 @@ struct swr_mstr_ctrl {
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struct clk *lpass_core_hw_vote;
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struct clk *lpass_core_hw_vote;
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struct clk *lpass_core_audio;
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struct clk *lpass_core_audio;
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u8 num_usecase;
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u8 num_usecase;
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u32 pcm_enable_count;
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u32 swr_irq_wakeup_capable;
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u32 swr_irq_wakeup_capable;
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int hw_core_clk_en;
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int hw_core_clk_en;
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int aud_core_clk_en;
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int aud_core_clk_en;
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