qcacmn: Add changes to move ioremap outside interrupt context
Add changes to move ioremap of PMM SCRATCH register outside interrupt context, as ioremap in interrupt context in not valid. Change-Id: I0fa645c55e10a5241011a1f4ffdccdca48c50d29 CRs-Fixed: 3371194
This commit is contained in:

committed by
Madan Koyyalamudi

parent
6414ec0d33
commit
f75a30225c
@@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
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* Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for
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* any purpose with or without fee is hereby granted, provided that the
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@@ -1426,6 +1426,8 @@ struct hal_soc {
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void *dev_base_addr_ce;
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void *dev_base_addr_cmem;
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void *dev_base_addr_pmm;
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/* HAL internal state for all SRNG rings.
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* TODO: See if this is required
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*/
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@@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
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* Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for
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* any purpose with or without fee is hereby granted, provided that the
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@@ -1112,6 +1112,7 @@ void *hal_attach(struct hif_opaque_softc *hif_handle, qdf_device_t qdf_dev)
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hal->dev_base_addr = hif_get_dev_ba(hif_handle); /* UMAC */
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hal->dev_base_addr_ce = hif_get_dev_ba_ce(hif_handle); /* CE */
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hal->dev_base_addr_cmem = hif_get_dev_ba_cmem(hif_handle); /* CMEM */
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hal->dev_base_addr_pmm = hif_get_dev_ba_pmm(hif_handle); /* PMM */
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hal->qdf_dev = qdf_dev;
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hal->shadow_rdptr_mem_vaddr = (uint32_t *)qdf_mem_alloc_consistent(
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qdf_dev, qdf_dev->dev, sizeof(*(hal->shadow_rdptr_mem_vaddr)) *
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@@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2021 The Linux Foundation. All rights reserved.
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* Copyright (c) 2021-2022, Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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@@ -110,8 +110,6 @@
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#include "hal_be_rx_tlv.h"
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#include <hal_be_generic_api.h>
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#define PMM_SCRATCH_BASE_QCA5332 0xCB500FC
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#define PMM_SCRATCH_SIZE 0x100
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/**
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* hal_read_pmm_scratch_reg_5332(): API to read PMM Scratch register
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@@ -126,11 +124,9 @@ uint32_t hal_read_pmm_scratch_reg_5332(struct hal_soc *soc,
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enum hal_scratch_reg_enum reg_enum)
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{
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uint32_t val = 0;
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void __iomem *bar;
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bar = ioremap_nocache(PMM_SCRATCH_BASE_QCA5332, PMM_SCRATCH_SIZE);
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pld_reg_read(soc->qdf_dev->dev, (reg_enum * 4), &val, bar);
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iounmap(bar);
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pld_reg_read(soc->qdf_dev->dev, (reg_enum * 4), &val,
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soc->dev_base_addr_pmm);
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return val;
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}
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@@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2013-2021 The Linux Foundation. All rights reserved.
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* Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for
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* any purpose with or without fee is hereby granted, provided that the
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@@ -2054,6 +2054,7 @@ void hif_allow_link_low_power_states(struct hif_opaque_softc *hif)
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void *hif_get_dev_ba(struct hif_opaque_softc *hif_handle);
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void *hif_get_dev_ba_ce(struct hif_opaque_softc *hif_handle);
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void *hif_get_dev_ba_pmm(struct hif_opaque_softc *hif_handle);
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/**
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* hif_get_dev_ba_cmem() - get base address of CMEM
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@@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2015-2020 The Linux Foundation. All rights reserved.
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* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for
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* any purpose with or without fee is hereby granted, provided that the
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@@ -665,6 +665,7 @@ struct ce_reg_def {
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uint32_t d_HOST_IE_REG3_CE_LSB;
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uint32_t d_HOST_CE_ADDRESS;
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uint32_t d_HOST_CMEM_ADDRESS;
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uint32_t d_PMM_SCRATCH_BASE;
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};
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#endif
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@@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2016-2020 The Linux Foundation. All rights reserved.
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* tCopyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for
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* any purpose with or without fee is hereby granted, provided that the
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@@ -382,6 +382,10 @@ struct targetdef_s *MY_TARGET_DEF = &my_target_def;
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#if !defined(HOST_CMEM_ADDRESS)
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#define HOST_CMEM_ADDRESS ATH_UNSUPPORTED_REG_OFFSET
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#endif
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#if !defined(PMM_SCRATCH_BASE)
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#define PMM_SCRATCH_BASE ATH_UNSUPPORTED_REG_OFFSET
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#endif
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static struct ce_reg_def my_ce_reg_def = {
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@@ -470,7 +474,8 @@ static struct ce_reg_def my_ce_reg_def = {
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.d_A_WIFI_APB_3_A_WCMN_APPS_CE_INTR_STATUS
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= A_WIFI_APB_3_A_WCMN_APPS_CE_INTR_STATUS,
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.d_HOST_CE_ADDRESS = HOST_CE_ADDRESS,
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.d_HOST_CMEM_ADDRESS = HOST_CMEM_ADDRESS
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.d_HOST_CMEM_ADDRESS = HOST_CMEM_ADDRESS,
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.d_PMM_SCRATCH_BASE = PMM_SCRATCH_BASE
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};
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struct ce_reg_def *MY_CEREG_DEF = &my_ce_reg_def;
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@@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2015-2020 The Linux Foundation. All rights reserved.
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* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for
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* any purpose with or without fee is hereby granted, provided that the
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@@ -213,6 +213,7 @@
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#define HOST_IS_ADDRESS (scn->target_ce_def->d_HOST_IS_ADDRESS)
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#define HOST_CE_ADDRESS (scn->target_ce_def->d_HOST_CE_ADDRESS)
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#define HOST_CMEM_ADDRESS (scn->target_ce_def->d_HOST_CMEM_ADDRESS)
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#define PMM_SCRATCH_BASE (scn->target_ce_def->d_PMM_SCRATCH_BASE)
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#define SRC_WATERMARK_LOW_SET(x) \
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(((x) << SRC_WATERMARK_LOW_LSB) & SRC_WATERMARK_LOW_MASK)
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@@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2015-2021 The Linux Foundation. All rights reserved.
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* Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for
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* any purpose with or without fee is hereby granted, provided that the
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@@ -533,6 +533,22 @@ void *hif_get_dev_ba_ce(struct hif_opaque_softc *hif_handle)
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qdf_export_symbol(hif_get_dev_ba_ce);
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/**
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* hif_get_dev_ba_pmm(): API to get device pmm base address.
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* @scn: scn
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*
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* Return: dev mem base address for PMM
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*/
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void *hif_get_dev_ba_pmm(struct hif_opaque_softc *hif_handle)
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{
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struct hif_softc *scn = (struct hif_softc *)hif_handle;
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return scn->mem_pmm_base;
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}
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qdf_export_symbol(hif_get_dev_ba_pmm);
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uint32_t hif_get_soc_version(struct hif_opaque_softc *hif_handle)
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{
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struct hif_softc *scn = (struct hif_softc *)hif_handle;
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@@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2013-2021 The Linux Foundation. All rights reserved.
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* Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for
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* any purpose with or without fee is hereby granted, provided that the
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@@ -253,6 +253,7 @@ struct hif_softc {
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void __iomem *mem;
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void __iomem *mem_ce;
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void __iomem *mem_cmem;
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void __iomem *mem_pmm_base;
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enum qdf_bus_type bus_type;
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struct hif_bus_ops bus_ops;
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void *ce_id_to_state[CE_COUNT_MAX];
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@@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2013-2021 The Linux Foundation. All rights reserved.
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* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for
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* any purpose with or without fee is hereby granted, provided that the
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@@ -120,6 +120,7 @@ struct hif_pci_softc {
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void __iomem *mem; /* PCI address. */
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void __iomem *mem_ce; /* PCI address for CE. */
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void __iomem *mem_cmem; /* PCI address for CMEM. */
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void __iomem *mem_pmm_base; /* address for PMM. */
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size_t mem_len;
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struct device *dev; /* For efficiency, should be first in struct */
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@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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@@ -154,6 +154,7 @@
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#define CE_DDR_ADDRESS_FOR_RRI_HIGH MISSING
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#define HOST_CMEM_ADDRESS 0xC100000
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#define PMM_SCRATCH_BASE 0xCB500FC
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#define HOST_CE_ADDRESS CE_CFG_WFSS_CE_REG_BASE
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#define HOST_IE_ADDRESS \
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HWIO_WFSS_CE_COMMON_R0_CE_HOST_IE_0_ADDR(\
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@@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2013-2021 The Linux Foundation. All rights reserved.
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* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for
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* any purpose with or without fee is hereby granted, provided that the
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@@ -421,9 +421,15 @@ void hif_ahb_disable_bus(struct hif_softc *scn)
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sc->mem_ce = NULL;
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scn->mem_ce = NULL;
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}
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if (sc->mem_pmm_base) {
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iounmap(sc->mem_pmm_base);
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sc->mem_pmm_base = NULL;
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scn->mem_pmm_base = NULL;
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}
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if (sc->mem_cmem) {
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iounmap(sc->mem_cmem);
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sc->mem_cmem = NULL;
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scn->mem_cmem = NULL;
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}
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mem = (void __iomem *)sc->mem;
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if (mem) {
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@@ -568,13 +574,13 @@ QDF_STATUS hif_ahb_enable_bus(struct hif_softc *ol_sc,
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ol_sc->mem_ce = sc->mem_ce;
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}
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/*
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* In QCA5332 CMEM region is outside WCSS block.
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* Allocate separate I/O remap to access CMEM address.
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*/
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if (tgt_info->target_type == TARGET_TYPE_QCA5332) {
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struct hif_softc *scn = HIF_GET_SOFTC(sc);
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/*
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* In QCA5332 CMEM region is outside WCSS block.
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* Allocate separate I/O remap to access CMEM address.
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*/
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sc->mem_cmem = ioremap_nocache(HOST_CMEM_ADDRESS,
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HOST_CMEM_SIZE);
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if (IS_ERR(sc->mem_cmem)) {
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@@ -582,6 +588,17 @@ QDF_STATUS hif_ahb_enable_bus(struct hif_softc *ol_sc,
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return QDF_STATUS_E_IO;
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}
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ol_sc->mem_cmem = sc->mem_cmem;
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/*
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* PMM SCRATCH Register for QCA5332
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*/
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sc->mem_pmm_base = ioremap_nocache(PMM_SCRATCH_BASE,
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PMM_SCRATCH_SIZE);
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if (IS_ERR(sc->mem_pmm_base)) {
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hif_err("CE: ioremap failed");
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return QDF_STATUS_E_IO;
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}
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ol_sc->mem_pmm_base = sc->mem_pmm_base;
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}
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hif_info("X - hif_type = 0x%x, target_type = 0x%x",
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@@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2013-2020 The Linux Foundation. All rights reserved.
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* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for
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* any purpose with or without fee is hereby granted, provided that the
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@@ -47,6 +47,7 @@
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#define TCSR_WCSS1_HALTACK 0x52014
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#define ATH_AHB_RESET_WAIT_MAX 10 /* Ms */
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#define HOST_CMEM_SIZE 0x40000
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#define PMM_SCRATCH_SIZE 0x100
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#define HOST_CE_SIZE 0x200000
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irqreturn_t hif_ahb_interrupt_handler(int irq, void *context);
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