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qcacmn: Add changes to move ioremap outside interrupt context

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Add changes to move ioremap of PMM SCRATCH register outside
interrupt context, as ioremap in interrupt context in not valid.

Change-Id: I0fa645c55e10a5241011a1f4ffdccdca48c50d29
CRs-Fixed: 3371194
This commit is contained in:
Hariharan Ramanathan
2023-01-02 19:07:21 +05:30
committed by Madan Koyyalamudi
parent 6414ec0d33
commit f75a30225c
13 changed files with 68 additions and 24 deletions
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4
hal/wifi3.0/hal_internal.h
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@@ -1,6 +1,6 @@
/*
* Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
@@ -1426,6 +1426,8 @@ struct hal_soc {
void *dev_base_addr_ce;
void *dev_base_addr_cmem;
void *dev_base_addr_pmm;
/* HAL internal state for all SRNG rings.
* TODO: See if this is required
*/

3
hal/wifi3.0/hal_srng.c
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@@ -1,6 +1,6 @@
/*
* Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
@@ -1112,6 +1112,7 @@ void *hal_attach(struct hif_opaque_softc *hif_handle, qdf_device_t qdf_dev)
hal->dev_base_addr = hif_get_dev_ba(hif_handle); /* UMAC */
hal->dev_base_addr_ce = hif_get_dev_ba_ce(hif_handle); /* CE */
hal->dev_base_addr_cmem = hif_get_dev_ba_cmem(hif_handle); /* CMEM */
hal->dev_base_addr_pmm = hif_get_dev_ba_pmm(hif_handle); /* PMM */
hal->qdf_dev = qdf_dev;
hal->shadow_rdptr_mem_vaddr = (uint32_t *)qdf_mem_alloc_consistent(
qdf_dev, qdf_dev->dev, sizeof(*(hal->shadow_rdptr_mem_vaddr)) *

10
hal/wifi3.0/qca5332/hal_5332.c
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@@ -1,6 +1,6 @@
/*
* Copyright (c) 2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2021-2022, Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@@ -110,8 +110,6 @@
#include "hal_be_rx_tlv.h"
#include <hal_be_generic_api.h>
#define PMM_SCRATCH_BASE_QCA5332 0xCB500FC
#define PMM_SCRATCH_SIZE 0x100
/**
* hal_read_pmm_scratch_reg_5332(): API to read PMM Scratch register
@@ -126,11 +124,9 @@ uint32_t hal_read_pmm_scratch_reg_5332(struct hal_soc *soc,
enum hal_scratch_reg_enum reg_enum)
{
uint32_t val = 0;
void __iomem *bar;
bar = ioremap_nocache(PMM_SCRATCH_BASE_QCA5332, PMM_SCRATCH_SIZE);
pld_reg_read(soc->qdf_dev->dev, (reg_enum * 4), &val, bar);
iounmap(bar);
pld_reg_read(soc->qdf_dev->dev, (reg_enum * 4), &val,
soc->dev_base_addr_pmm);
return val;
}

3
hif/inc/hif.h
View File

@@ -1,6 +1,6 @@
/*
* Copyright (c) 2013-2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
@@ -2054,6 +2054,7 @@ void hif_allow_link_low_power_states(struct hif_opaque_softc *hif)
void *hif_get_dev_ba(struct hif_opaque_softc *hif_handle);
void *hif_get_dev_ba_ce(struct hif_opaque_softc *hif_handle);
void *hif_get_dev_ba_pmm(struct hif_opaque_softc *hif_handle);
/**
* hif_get_dev_ba_cmem() - get base address of CMEM

3
hif/inc/reg_struct.h
View File

@@ -1,6 +1,6 @@
/*
* Copyright (c) 2015-2020 The Linux Foundation. All rights reserved.
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
@@ -665,6 +665,7 @@ struct ce_reg_def {
uint32_t d_HOST_IE_REG3_CE_LSB;
uint32_t d_HOST_CE_ADDRESS;
uint32_t d_HOST_CMEM_ADDRESS;
uint32_t d_PMM_SCRATCH_BASE;
};
#endif

9
hif/inc/target_reg_init.h
View File

@@ -1,6 +1,6 @@
/*
* Copyright (c) 2016-2020 The Linux Foundation. All rights reserved.
* tCopyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
@@ -382,6 +382,10 @@ struct targetdef_s *MY_TARGET_DEF = &my_target_def;
#if !defined(HOST_CMEM_ADDRESS)
#define HOST_CMEM_ADDRESS ATH_UNSUPPORTED_REG_OFFSET
#endif
#if !defined(PMM_SCRATCH_BASE)
#define PMM_SCRATCH_BASE ATH_UNSUPPORTED_REG_OFFSET
#endif
static struct ce_reg_def my_ce_reg_def = {
@@ -470,7 +474,8 @@ static struct ce_reg_def my_ce_reg_def = {
.d_A_WIFI_APB_3_A_WCMN_APPS_CE_INTR_STATUS
= A_WIFI_APB_3_A_WCMN_APPS_CE_INTR_STATUS,
.d_HOST_CE_ADDRESS = HOST_CE_ADDRESS,
.d_HOST_CMEM_ADDRESS = HOST_CMEM_ADDRESS
.d_HOST_CMEM_ADDRESS = HOST_CMEM_ADDRESS,
.d_PMM_SCRATCH_BASE = PMM_SCRATCH_BASE
};
struct ce_reg_def *MY_CEREG_DEF = &my_ce_reg_def;

3
hif/src/ce/ce_reg.h
View File

@@ -1,6 +1,6 @@
/*
* Copyright (c) 2015-2020 The Linux Foundation. All rights reserved.
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
@@ -213,6 +213,7 @@
#define HOST_IS_ADDRESS (scn->target_ce_def->d_HOST_IS_ADDRESS)
#define HOST_CE_ADDRESS (scn->target_ce_def->d_HOST_CE_ADDRESS)
#define HOST_CMEM_ADDRESS (scn->target_ce_def->d_HOST_CMEM_ADDRESS)
#define PMM_SCRATCH_BASE (scn->target_ce_def->d_PMM_SCRATCH_BASE)
#define SRC_WATERMARK_LOW_SET(x) \
(((x) << SRC_WATERMARK_LOW_LSB) & SRC_WATERMARK_LOW_MASK)

18
hif/src/hif_main.c
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@@ -1,6 +1,6 @@
/*
* Copyright (c) 2015-2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
@@ -533,6 +533,22 @@ void *hif_get_dev_ba_ce(struct hif_opaque_softc *hif_handle)
qdf_export_symbol(hif_get_dev_ba_ce);
/**
* hif_get_dev_ba_pmm(): API to get device pmm base address.
* @scn: scn
*
* Return: dev mem base address for PMM
*/
void *hif_get_dev_ba_pmm(struct hif_opaque_softc *hif_handle)
{
struct hif_softc *scn = (struct hif_softc *)hif_handle;
return scn->mem_pmm_base;
}
qdf_export_symbol(hif_get_dev_ba_pmm);
uint32_t hif_get_soc_version(struct hif_opaque_softc *hif_handle)
{
struct hif_softc *scn = (struct hif_softc *)hif_handle;

3
hif/src/hif_main.h
View File

@@ -1,6 +1,6 @@
/*
* Copyright (c) 2013-2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
@@ -253,6 +253,7 @@ struct hif_softc {
void __iomem *mem;
void __iomem *mem_ce;
void __iomem *mem_cmem;
void __iomem *mem_pmm_base;
enum qdf_bus_type bus_type;
struct hif_bus_ops bus_ops;
void *ce_id_to_state[CE_COUNT_MAX];

3
hif/src/pcie/if_pci.h
View File

@@ -1,6 +1,6 @@
/*
* Copyright (c) 2013-2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
@@ -120,6 +120,7 @@ struct hif_pci_softc {
void __iomem *mem; /* PCI address. */
void __iomem *mem_ce; /* PCI address for CE. */
void __iomem *mem_cmem; /* PCI address for CMEM. */
void __iomem *mem_pmm_base; /* address for PMM. */
size_t mem_len;
struct device *dev; /* For efficiency, should be first in struct */

3
hif/src/qca5332def.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@@ -154,6 +154,7 @@
#define CE_DDR_ADDRESS_FOR_RRI_HIGH MISSING
#define HOST_CMEM_ADDRESS 0xC100000
#define PMM_SCRATCH_BASE 0xCB500FC
#define HOST_CE_ADDRESS CE_CFG_WFSS_CE_REG_BASE
#define HOST_IE_ADDRESS \
HWIO_WFSS_CE_COMMON_R0_CE_HOST_IE_0_ADDR(\

25
hif/src/snoc/if_ahb.c
View File

@@ -1,6 +1,6 @@
/*
* Copyright (c) 2013-2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
@@ -421,9 +421,15 @@ void hif_ahb_disable_bus(struct hif_softc *scn)
sc->mem_ce = NULL;
scn->mem_ce = NULL;
}
if (sc->mem_pmm_base) {
iounmap(sc->mem_pmm_base);
sc->mem_pmm_base = NULL;
scn->mem_pmm_base = NULL;
}
if (sc->mem_cmem) {
iounmap(sc->mem_cmem);
sc->mem_cmem = NULL;
scn->mem_cmem = NULL;
}
mem = (void __iomem *)sc->mem;
if (mem) {
@@ -568,13 +574,13 @@ QDF_STATUS hif_ahb_enable_bus(struct hif_softc *ol_sc,
ol_sc->mem_ce = sc->mem_ce;
}
if (tgt_info->target_type == TARGET_TYPE_QCA5332) {
struct hif_softc *scn = HIF_GET_SOFTC(sc);
/*
* In QCA5332 CMEM region is outside WCSS block.
* Allocate separate I/O remap to access CMEM address.
*/
if (tgt_info->target_type == TARGET_TYPE_QCA5332) {
struct hif_softc *scn = HIF_GET_SOFTC(sc);
sc->mem_cmem = ioremap_nocache(HOST_CMEM_ADDRESS,
HOST_CMEM_SIZE);
if (IS_ERR(sc->mem_cmem)) {
@@ -582,6 +588,17 @@ QDF_STATUS hif_ahb_enable_bus(struct hif_softc *ol_sc,
return QDF_STATUS_E_IO;
}
ol_sc->mem_cmem = sc->mem_cmem;
/*
* PMM SCRATCH Register for QCA5332
*/
sc->mem_pmm_base = ioremap_nocache(PMM_SCRATCH_BASE,
PMM_SCRATCH_SIZE);
if (IS_ERR(sc->mem_pmm_base)) {
hif_err("CE: ioremap failed");
return QDF_STATUS_E_IO;
}
ol_sc->mem_pmm_base = sc->mem_pmm_base;
}
hif_info("X - hif_type = 0x%x, target_type = 0x%x",

3
hif/src/snoc/if_ahb.h
View File

@@ -1,6 +1,6 @@
/*
* Copyright (c) 2013-2020 The Linux Foundation. All rights reserved.
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
@@ -47,6 +47,7 @@
#define TCSR_WCSS1_HALTACK 0x52014
#define ATH_AHB_RESET_WAIT_MAX 10 /* Ms */
#define HOST_CMEM_SIZE 0x40000
#define PMM_SCRATCH_SIZE 0x100
#define HOST_CE_SIZE 0x200000
irqreturn_t hif_ahb_interrupt_handler(int irq, void *context);