From 2b4adfd6d3b1ffd02e67b60cd1b769a5b89b6590 Mon Sep 17 00:00:00 2001 From: Yashwanth Date: Fri, 7 Jan 2022 09:20:34 +0530 Subject: [PATCH] disp: msm: sde: update uidle ctl register only for master encoder In case of dual dsi usecase, since both the encoders use the same CTL path, this change ensures that uidle ctl settings are updated only by the master encoder. Change-Id: Ic47703aeee69999b4535034b5cd7a65cf53cd0fb Signed-off-by: Yashwanth --- msm/sde/sde_encoder.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/msm/sde/sde_encoder.c b/msm/sde/sde_encoder.c index 1db1d8b5c2..b2795ba1db 100644 --- a/msm/sde/sde_encoder.c +++ b/msm/sde/sde_encoder.c @@ -145,7 +145,8 @@ void sde_encoder_uidle_enable(struct drm_encoder *drm_enc, bool enable) for (i = 0; i < sde_enc->num_phys_encs; i++) { struct sde_encoder_phys *phys = sde_enc->phys_encs[i]; - if (phys && phys->hw_ctl && phys->hw_ctl->ops.uidle_enable) { + if (phys && phys->hw_ctl && phys->hw_ctl->ops.uidle_enable && + phys->split_role != ENC_ROLE_SLAVE) { if (enable) SDE_EVT32(DRMID(drm_enc), enable); phys->hw_ctl->ops.uidle_enable(phys->hw_ctl, enable);