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qcacmn: Fix hal/wifi3.0/qcn9224 documentation

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The kernel-doc script identified some documentation issues in the
hal/wifi3.0/qcn9224 folder, so fix them.

Change-Id: I30e75bf3febabfb1c655f96f039059cf365916c8
CRs-Fixed: 3411783
This commit is contained in:
Jeff Johnson
2023-02-20 12:41:40 -08:00
committed by Madan Koyyalamudi
parent c6a6c4563d
commit f6ce196cab
4 changed files with 87 additions and 87 deletions
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104
hal/wifi3.0/qcn9224/hal_9224.h
View File

@@ -139,8 +139,7 @@
#define PMM_REG_BASE_QCN9224 0xB500F8
/**
* hal_read_pmm_scratch_reg(): API to read PMM Scratch register
*
* hal_read_pmm_scratch_reg() - API to read PMM Scratch register
* @soc: HAL soc
* @base_addr: Base PMM register
* @reg_enum: Enum of the scratch register
@@ -159,8 +158,7 @@ uint32_t hal_read_pmm_scratch_reg(struct hal_soc *soc,
}
/**
* hal_get_tsf2_scratch_reg_qcn9224(): API to read tsf2 scratch register
*
* hal_get_tsf2_scratch_reg_qcn9224() - API to read tsf2 scratch register
* @hal_soc_hdl: HAL soc context
* @mac_id: mac id
* @value: Pointer to update tsf2 value
@@ -188,8 +186,7 @@ static void hal_get_tsf2_scratch_reg_qcn9224(hal_soc_handle_t hal_soc_hdl,
}
/**
* hal_get_tqm_scratch_reg_qcn9224(): API to read tqm scratch register
*
* hal_get_tqm_scratch_reg_qcn9224() - API to read tqm scratch register
* @hal_soc_hdl: HAL soc context
* @value: Pointer to update tqm value
*
@@ -217,7 +214,7 @@ static void hal_get_tqm_scratch_reg_qcn9224(hal_soc_handle_t hal_soc_hdl,
#define HAL_PPE_VP_SEARCH_IDX_REG_MAX 8
/**
* hal_get_link_desc_size_9224(): API to get the link desc size
* hal_get_link_desc_size_9224() - API to get the link desc size
*
* Return: uint32_t
*/
@@ -227,9 +224,9 @@ static uint32_t hal_get_link_desc_size_9224(void)
}
/**
* hal_rx_get_tlv_9224(): API to get the tlv
*
* hal_rx_get_tlv_9224() - API to get the tlv
* @rx_tlv: TLV data extracted from the rx packet
*
* Return: uint8_t
*/
static uint8_t hal_rx_get_tlv_9224(void *rx_tlv)
@@ -238,9 +235,8 @@ static uint8_t hal_rx_get_tlv_9224(void *rx_tlv)
}
/**
* hal_rx_wbm_err_msdu_continuation_get_9224 () - API to check if WBM
* msdu continuation bit is set
*
* hal_rx_wbm_err_msdu_continuation_get_9224() - API to check if WBM msdu
* continuation bit is set
* @wbm_desc: wbm release ring descriptor
*
* Return: true if msdu continuation bit is set.
@@ -337,9 +333,11 @@ static void hal_rx_get_evm_info(void *tlv_tag, void *ppdu_info_hdl)
#endif /* WLAN_SA_API_ENABLE && QCA_WIFI_QCA9574 */
/**
* hal_rx_proc_phyrx_other_receive_info_tlv_9224(): API to get tlv info
* hal_rx_proc_phyrx_other_receive_info_tlv_9224() - API to get tlv info
* @rx_tlv_hdr: RX TLV header
* @ppdu_info_hdl: Handle to PPDU info to update
*
* Return: uint32_t
* Return: None
*/
static inline
void hal_rx_proc_phyrx_other_receive_info_tlv_9224(void *rx_tlv_hdr,
@@ -459,9 +457,9 @@ void hal_rx_get_rtt_info_9224(void *rx_tlv, void *ppdu_info_hdl)
#ifdef CONFIG_WORD_BASED_TLV
/**
* hal_rx_dump_mpdu_start_tlv_9224: dump RX mpdu_start TLV in structured
* hal_rx_dump_mpdu_start_tlv_9224() - dump RX mpdu_start TLV in structured
* human readable format.
* @mpdu_start: pointer the rx_attention TLV in pkt.
* @mpdustart: pointer the rx_attention TLV in pkt.
* @dbg_level: log level.
*
* Return: void
@@ -559,9 +557,9 @@ static inline void hal_rx_dump_mpdu_start_tlv_9224(void *mpdustart,
}
/**
* hal_rx_dump_msdu_end_tlv_9224: dump RX msdu_end TLV in structured
* human readable format.
* @ msdu_end: pointer the msdu_end TLV in pkt.
* hal_rx_dump_msdu_end_tlv_9224() - dump RX msdu_end TLV in structured human
* readable format.
* @msduend: pointer the msdu_end TLV in pkt.
* @dbg_level: log level.
*
* Return: void
@@ -809,12 +807,12 @@ static void hal_rx_dump_msdu_end_tlv_9224(void *msduend,
#endif
/**
* hal_reo_status_get_header_9224 - Process reo desc info
* @d - Pointer to reo descriptor
* @b - tlv type info
* @h1 - Pointer to hal_reo_status_header where info to be stored
* hal_reo_status_get_header_9224() - Process reo desc info
* @ring_desc: Pointer to reo descriptor
* @b: tlv type info
* @h1: Pointer to hal_reo_status_header where info to be stored
*
* Return - none.
* Return: none.
*
*/
static void hal_reo_status_get_header_9224(hal_ring_desc_t ring_desc,
@@ -937,7 +935,7 @@ void *hal_dst_mpdu_desc_info_9224(void *dst_ring_desc)
}
/**
* hal_reo_config_9224(): Set reo config parameters
* hal_reo_config_9224() - Set reo config parameters
* @soc: hal soc handle
* @reg_val: value to be set
* @reo_params: reo parameters
@@ -954,9 +952,9 @@ hal_reo_config_9224(struct hal_soc *soc,
/**
* hal_rx_msdu_desc_info_get_ptr_9224() - Get msdu desc info ptr
* @msdu_details_ptr - Pointer to msdu_details_ptr
* @msdu_details_ptr: Pointer to msdu_details_ptr
*
* Return - Pointer to rx_msdu_desc_info structure.
* Return: Pointer to rx_msdu_desc_info structure.
*
*/
static void *hal_rx_msdu_desc_info_get_ptr_9224(void *msdu_details_ptr)
@@ -965,10 +963,10 @@ static void *hal_rx_msdu_desc_info_get_ptr_9224(void *msdu_details_ptr)
}
/**
* hal_rx_link_desc_msdu0_ptr_9224 - Get pointer to rx_msdu details
* @link_desc - Pointer to link desc
* hal_rx_link_desc_msdu0_ptr_9224() - Get pointer to rx_msdu details
* @link_desc: Pointer to link desc
*
* Return - Pointer to rx_msdu_details structure
* Return: Pointer to rx_msdu_details structure
*
*/
static void *hal_rx_link_desc_msdu0_ptr_9224(void *link_desc)
@@ -977,7 +975,7 @@ static void *hal_rx_link_desc_msdu0_ptr_9224(void *link_desc)
}
/**
* hal_get_window_address_9224(): Function to get hp/tp address
* hal_get_window_address_9224() - Function to get hp/tp address
* @hal_soc: Pointer to hal_soc
* @addr: address offset of register
*
@@ -1125,9 +1123,9 @@ void hal_compute_reo_remap_ix0_9224(struct hal_soc *soc)
/**
* hal_rx_flow_setup_fse_9224() - Setup a flow search entry in HW FST
* @fst: Pointer to the Rx Flow Search Table
* @rx_fst: Pointer to the Rx Flow Search Table
* @table_offset: offset into the table where the flow is to be setup
* @flow: Flow Parameters
* @rx_flow: Flow Parameters
*
* Return: Success/Failure
*/
@@ -1249,14 +1247,14 @@ hal_rx_flow_setup_fse_9224(uint8_t *rx_fst, uint32_t table_offset,
return fse;
}
#ifndef NO_RX_PKT_HDR_TLV
/**
* hal_rx_dump_pkt_hdr_tlv: dump RX pkt header TLV in hex format
* @ pkt_hdr_tlv: pointer the pkt_hdr_tlv in pkt.
* hal_rx_dump_pkt_hdr_tlv_9224() - dump RX pkt header TLV in hex format
* @pkt_tlvs: pointer the pkt_hdr_tlv in pkt.
* @dbg_level: log level.
*
* Return: void
*/
#ifndef NO_RX_PKT_HDR_TLV
static inline void hal_rx_dump_pkt_hdr_tlv_9224(struct rx_pkt_tlvs *pkt_tlvs,
uint8_t dbg_level)
{
@@ -1272,21 +1270,14 @@ static inline void hal_rx_dump_pkt_hdr_tlv_9224(struct rx_pkt_tlvs *pkt_tlvs,
sizeof(pkt_hdr_tlv->rx_pkt_hdr));
}
#else
/**
* hal_rx_dump_pkt_hdr_tlv: dump RX pkt header TLV in hex format
* @ pkt_hdr_tlv: pointer the pkt_hdr_tlv in pkt.
* @ dbg_level: log level.
*
* Return: void
*/
static inline void hal_rx_dump_pkt_hdr_tlv_9224(struct rx_pkt_tlvs *pkt_tlvs,
uint8_t dbg_level)
{
}
#endif
/*
* hal_tx_dump_ppe_vp_entry_9224()
/**
* hal_tx_dump_ppe_vp_entry_9224() - API to print PPE VP entries
* @hal_soc_hdl: HAL SoC handle
*
* Return: void
@@ -1308,7 +1299,7 @@ void hal_tx_dump_ppe_vp_entry_9224(hal_soc_handle_t hal_soc_hdl)
}
/**
* hal_rx_dump_pkt_tlvs_9224(): API to print RX Pkt TLVS QCN9224
* hal_rx_dump_pkt_tlvs_9224() - API to print RX Pkt TLVS QCN9224
* @hal_soc_hdl: hal_soc handle
* @buf: pointer the pkt buffer
* @dbg_level: log level
@@ -1366,7 +1357,7 @@ static void hal_cmem_write_9224(hal_soc_handle_t hal_soc_hdl,
/**
* hal_tx_get_num_tcl_banks_9224() - Get number of banks in target
*
* Returns: number of bank
* Return: number of bank
*/
static uint8_t hal_tx_get_num_tcl_banks_9224(void)
{
@@ -1471,8 +1462,11 @@ static uint16_t hal_get_rx_max_ba_window_qcn9224(int tid)
}
/**
* hal_qcn9224_get_reo_qdesc_size()- Get the reo queue descriptor size
* from the give Block-Ack window size
* hal_qcn9224_get_reo_qdesc_size() - Get the reo queue descriptor size from the
* given Block-Ack window size
* @ba_window_size: Block-Ack window size
* @tid: Traffic id
*
* Return: reo queue descriptor size
*/
static uint32_t hal_qcn9224_get_reo_qdesc_size(uint32_t ba_window_size, int tid)
@@ -1513,8 +1507,8 @@ static uint32_t hal_qcn9224_get_reo_qdesc_size(uint32_t ba_window_size, int tid)
sizeof(struct rx_reo_queue_1k);
}
/*
* hal_tx_get_num_ppe_vp_tbl_entries_9224()
/**
* hal_tx_get_num_ppe_vp_tbl_entries_9224() - get number of PPE VP entries
* @hal_soc_hdl: HAL SoC handle
*
* Return: Number of PPE VP entries
@@ -1525,8 +1519,9 @@ uint32_t hal_tx_get_num_ppe_vp_tbl_entries_9224(hal_soc_handle_t hal_soc_hdl)
return HAL_PPE_VP_ENTRIES_MAX;
}
/*
* hal_tx_get_num_ppe_vp_search_idx_reg_entries_9224()
/**
* hal_tx_get_num_ppe_vp_search_idx_reg_entries_9224() - get number of PPE VP
* search index registers
* @hal_soc_hdl: HAL SoC handle
*
* Return: Number of PPE VP search index registers
@@ -1539,8 +1534,9 @@ uint32_t hal_tx_get_num_ppe_vp_search_idx_reg_entries_9224(hal_soc_handle_t hal_
/**
* hal_rx_tlv_msdu_done_copy_get_9224() - Get msdu done copy bit from rx_tlv
* @buf: pointer the RX TLV
*
* Returns: msdu done copy bit
* Return: msdu done copy bit
*/
static inline uint32_t hal_rx_tlv_msdu_done_copy_get_9224(uint8_t *buf)
{

32
hal/wifi3.0/qcn9224/hal_9224_tx.h
View File

@@ -1,6 +1,6 @@
/*
* Copyright (c) 2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
@@ -33,7 +33,7 @@
#define HAL_TX_NUM_DSCP_REGISTER_SIZE 32
/**
* hal_tx_ppe2tcl_ring_halt_set() - Enable ring halt for the ppe2tcl ring
* hal_tx_ppe2tcl_ring_halt_set_9224() - Enable ring halt for the ppe2tcl ring
* @hal_soc: HAL SoC context
*
* Return: none
@@ -57,7 +57,8 @@ static void hal_tx_ppe2tcl_ring_halt_set_9224(hal_soc_handle_t hal_soc)
}
/**
* hal_tx_ppe2tcl_ring_halt_reset() - Disable ring halt for the ppe2tcl ring
* hal_tx_ppe2tcl_ring_halt_reset_9224() - Disable ring halt for the ppe2tcl
* ring
* @hal_soc: HAL SoC context
*
* Return: none
@@ -80,7 +81,8 @@ static void hal_tx_ppe2tcl_ring_halt_reset_9224(hal_soc_handle_t hal_soc)
}
/**
* hal_tx_ppe2tcl_ring_halt_done() - Check if ring halt is done for ppe2tcl ring
* hal_tx_ppe2tcl_ring_halt_done_9224() - Check if ring halt is done
* for ppe2tcl ring
* @hal_soc: HAL SoC context
*
* Return: true if halt done
@@ -102,7 +104,7 @@ static bool hal_tx_ppe2tcl_ring_halt_done_9224(hal_soc_handle_t hal_soc)
/**
* hal_tx_set_dscp_tid_map_9224() - Configure default DSCP to TID map table
* @soc: HAL SoC context
* @hal_soc: HAL SoC context
* @map: DSCP-TID mapping table
* @id: mapping table ID - 0-31
*
@@ -173,9 +175,9 @@ static void hal_tx_set_dscp_tid_map_9224(struct hal_soc *hal_soc, uint8_t *map,
* hal_tx_update_dscp_tid_9224() - Update the dscp tid map table as updated
* by the user
* @soc: HAL SoC context
* @map: DSCP-TID mapping table
* @tid: TID
* @id: MAP ID
* @dscp: DSCP_TID map index
* @dscp: DSCP
*
* Return: void
*/
@@ -260,8 +262,8 @@ static void hal_tx_update_dscp_tid_9224(struct hal_soc *soc, uint8_t tid,
(HWIO_TCL_R0_RBM_MAPPING0_SW2TCL_CREDIT_RING_SHFT >> 2)
/**
* hal_tx_config_rbm_mapping_be() - Update return buffer manager ring id
* @hal_soc: HAL SoC context
* hal_tx_config_rbm_mapping_be_9224() - Update return buffer manager ring id
* @hal_soc_hdl: HAL SoC context
* @hal_ring_hdl: Source ring pointer
* @rbm_id: return buffer manager ring id
*
@@ -315,7 +317,7 @@ hal_tx_config_rbm_mapping_be_9224(hal_soc_handle_t hal_soc_hdl,
/**
* hal_tx_init_cmd_credit_ring_9224() - Initialize command/credit SRNG
* @hal_soc_hdl: Handle to HAL SoC structure
* @hal_srng: Handle to HAL SRNG structure
* @hal_ring_hdl: Handle to HAL SRNG structure
*
* Return: none
*/
@@ -412,7 +414,7 @@ void hal_tx_set_ppe_cmn_config_9224(hal_soc_handle_t hal_soc_hdl,
/**
* hal_tx_set_ppe_vp_entry_9224() - Set the PPE VP entry
* @hal_soc_hdl: HAL SoC handle
* @vp_cfg: PPE VP config
* @cfg: PPE VP config
* @ppe_vp_idx : PPE VP index to the table
*
* Return: void
@@ -455,7 +457,7 @@ hal_ppeds_cfg_ast_override_map_reg_9224(hal_soc_handle_t hal_soc_hdl,
}
/**
* hal_tx_set_ppe_pri2tid_map1_9224()
* hal_tx_set_ppe_pri2tid_map_9224() - Set PPE PRI to TID map
* @hal_soc_hdl: HAL SoC handle
* @val : PRI to TID value
* @map_no: Map number
@@ -481,10 +483,10 @@ void hal_tx_set_ppe_pri2tid_map_9224(hal_soc_handle_t hal_soc_hdl,
}
/**
* hal_tx_set_ppe_pri2tid_map1_9224()
* hal_tx_enable_pri2tid_map_9224() - Enable PRI to TID map
* @hal_soc_hdl: HAL SoC handle
* @val: PRI to TID value
* @map_no: Map number
* @ppe_vp_idx: Map number
*
* Return: void
*/
@@ -515,7 +517,7 @@ void hal_tx_enable_pri2tid_map_9224(hal_soc_handle_t hal_soc_hdl,
}
/**
* hal_tx_update_ppe_pri2tid_9224()
* hal_tx_update_ppe_pri2tid_9224() - Update PPE PRI to TID
* @hal_soc_hdl: HAL SoC handle
* @pri: INT_PRI
* @tid: Wi-Fi TID

6
hal/wifi3.0/qcn9224/v1/hal_9224v1.c
View File

@@ -1,6 +1,6 @@
/*
* Copyright (c) 2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@@ -548,8 +548,10 @@ struct hal_hw_srng_config hw_srng_table_9224v1[] = {
};
/**
* hal_qcn9224_attach()- Attach 9224 target specific hal_soc ops,
* hal_qcn9224v1_attach() - Attach 9224v1 target specific hal_soc ops,
* offset and srng table
* @hal_soc: HAL SoC context
*
* Return: void
*/
void hal_qcn9224v1_attach(struct hal_soc *hal_soc)

16
hal/wifi3.0/qcn9224/v2/hal_9224v2.c
View File

@@ -1,6 +1,6 @@
/*
* Copyright (c) 2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@@ -547,8 +547,8 @@ struct hal_hw_srng_config hw_srng_table_9224v2[] = {
},
};
/*
* hal_reo_config_reo2ppe_dest_info() - Configure reo2ppe dest info
/**
* hal_reo_config_reo2ppe_dest_info_9224() - Configure reo2ppe dest info
* @hal_soc_hdl: HAL SoC Context
*
* Return: None.
@@ -564,8 +564,7 @@ void hal_reo_config_reo2ppe_dest_info_9224(hal_soc_handle_t hal_soc_hdl)
#define PMM_REG_BASE_QCN9224_V2 0xB500FC
/**
* hal_get_tsf2_scratch_reg_qcn9224_v2(): API to read tsf2 scratch register
*
* hal_get_tsf2_scratch_reg_qcn9224_v2() - API to read tsf2 scratch register
* @hal_soc_hdl: HAL soc context
* @mac_id: mac id
* @value: Pointer to update tsf2 value
@@ -593,8 +592,7 @@ static void hal_get_tsf2_scratch_reg_qcn9224_v2(hal_soc_handle_t hal_soc_hdl,
}
/**
* hal_get_tqm_scratch_reg_qcn9224_v2(): API to read tqm scratch register
*
* hal_get_tqm_scratch_reg_qcn9224_v2() - API to read tqm scratch register
* @hal_soc_hdl: HAL soc context
* @value: Pointer to update tqm value
*
@@ -628,8 +626,10 @@ static void hal_hw_txrx_ops_override_qcn9224_v2(struct hal_soc *hal_soc)
hal_get_tqm_scratch_reg_qcn9224_v2;
}
/**
* hal_qcn9224_attach()- Attach 9224 target specific hal_soc ops,
* hal_qcn9224v2_attach() - Attach 9224v2 target specific hal_soc ops,
* offset and srng table
* @hal_soc: HAL SoC context
*
* Return: void
*/
void hal_qcn9224v2_attach(struct hal_soc *hal_soc)