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@@ -1,7 +1,7 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
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- * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
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+ * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#include <linux/iopoll.h>
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#include "dsi_ctrl_hw.h"
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@@ -24,18 +24,26 @@
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#define DSI_MDP_MISR_CTRL 0x364
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#define DSI_MDP_MISR_SIGNATURE 0x368
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-void dsi_ctrl_hw_22_setup_lane_map(struct dsi_ctrl_hw *ctrl,
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+void dsi_ctrl_hw_22_setup_lane_map(struct dsi_ctrl_hw *ctrl_hw,
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struct dsi_lane_map *lane_map)
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{
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- u32 reg_value = lane_map->lane_map_v2[DSI_LOGICAL_LANE_0] |
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+ struct dsi_ctrl *ctrl = container_of(ctrl_hw, struct dsi_ctrl, hw);
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+ u32 reg_value;
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+
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+ /* Lane swap is performed through PHY for controller version 2.2/PHY versions 3.0 and above */
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+ if (ctrl->version >= DSI_CTRL_VERSION_2_2) {
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+ DSI_CTRL_HW_DBG(ctrl_hw, "DSI controller version is >=2.2, lane swap is performed through PHY");
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+ return;
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+ }
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+ reg_value = lane_map->lane_map_v2[DSI_LOGICAL_LANE_0] |
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(lane_map->lane_map_v2[DSI_LOGICAL_LANE_1] << 4) |
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(lane_map->lane_map_v2[DSI_LOGICAL_LANE_2] << 8) |
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(lane_map->lane_map_v2[DSI_LOGICAL_LANE_3] << 12);
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- DSI_W32(ctrl, DSI_LANE_SWAP_CTRL, reg_value);
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+ DSI_W32(ctrl_hw, DSI_LOGICAL_LANE_SWAP_CTRL, reg_value);
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- DSI_CTRL_HW_DBG(ctrl, "[DSI_%d] Lane swap setup complete\n",
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- ctrl->index);
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+ DSI_CTRL_HW_DBG(ctrl_hw, "[DSI_%d] Lane swap setup complete\n",
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+ ctrl_hw->index);
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}
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int dsi_ctrl_hw_22_wait_for_lane_idle(struct dsi_ctrl_hw *ctrl,
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