disp: msm: dsi: consolidate DSI HW register macros

Cleanup DSI HW register access layer to minimize the number of macros that
access readl/writel functions.

Change-Id: Id78025b3837f9126f64681b4c1c1e13aec762081
Signed-off-by: Michael Ru <mru@codeaurora.org>

msm/dsi/dsi_ctrl_hw.h

@@ -12,6 +12,7 @@
 #include <linux/bitmap.h>
 
 #include "dsi_defs.h"
+#include "dsi_hw.h"
 
 #define DSI_CTRL_HW_DBG(c, fmt, ...)	DRM_DEV_DEBUG(NULL, "[msm-dsi-debug]: DSI_%d: "\
 		fmt, c ? c->index : -1,	##__VA_ARGS__)
@@ -20,6 +21,18 @@
 #define DSI_CTRL_HW_INFO(c, fmt, ...)	DRM_DEV_INFO(NULL, "[msm-dsi-info]: DSI_%d: "\
 		fmt, c ? c->index : -1,	##__VA_ARGS__)
 
+#define DSI_MMSS_MISC_R32(dsi_ctrl_hw, off) DSI_GEN_R32((dsi_ctrl_hw)->mmss_misc_base, off)
+#define DSI_MMSS_MISC_W32(dsi_ctrl_hw, off, val) \
+	DSI_GEN_W32_DEBUG((dsi_ctrl_hw)->mmss_misc_base, (dsi_ctrl_hw)->index, off, val)
+
+#define DSI_DISP_CC_R32(dsi_ctrl_hw, off) DSI_GEN_R32((dsi_ctrl_hw)->disp_cc_base, off)
+#define DSI_DISP_CC_W32(dsi_ctrl_hw, off, val) \
+	DSI_GEN_W32_DEBUG((dsi_ctrl_hw)->disp_cc_base, (dsi_ctrl_hw)->index, off, val)
+
+#define DSI_MDP_INTF_R32(dsi_ctrl_hw, off) DSI_GEN_R32((dsi_ctrl_hw)->mdp_intf_base, off)
+#define DSI_MDP_INTF_W32(dsi_ctrl_hw, off, val) \
+	DSI_GEN_W32_DEBUG((dsi_ctrl_hw)->mdp_intf_base, (dsi_ctrl_hw)->index, off, val)
+
 /**
  * Modifier flag for command transmission. If this flag is set, command
  * information is programmed to hardware and transmission is not triggered.

msm/dsi/dsi_ctrl_hw_2_2.c

@@ -274,11 +274,10 @@ u32 dsi_ctrl_hw_22_log_line_count(struct dsi_ctrl_hw *ctrl, bool cmd_mode)
 		return reg;
 
 	if (cmd_mode)
-		reg = readl_relaxed(ctrl->mdp_intf_base + MDP_INTF_TEAR_OFFSET
+		reg = DSI_MDP_INTF_R32(ctrl, MDP_INTF_TEAR_OFFSET
 					+ MDP_INTF_TEAR_LINE_COUNT_OFFSET);
 	else
-		reg = readl_relaxed(ctrl->mdp_intf_base
+		reg = DSI_MDP_INTF_R32(ctrl, MDP_INTF_LINE_COUNT_OFFSET);
-					+ MDP_INTF_LINE_COUNT_OFFSET);
 	return reg;
 }
 

msm/dsi/dsi_hw.h

@@ -1,57 +1,33 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 /*
- * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  */
 
 #ifndef _DSI_HW_H_
 #define _DSI_HW_H_
 #include <linux/io.h>
 
-#define DSI_R32(dsi_hw, off) readl_relaxed((dsi_hw)->base + (off))
+#define DSI_GEN_R32(base, offset) readl_relaxed((base) + (offset))
-#define DSI_W32(dsi_hw, off, val) \
+#define DSI_GEN_W32(base, offset, val) writel_relaxed((val), (base) + (offset))
-	do {\
-		pr_debug("[DSI_%d][%s] - [0x%08x]\n", \
-			(dsi_hw)->index, #off, (uint32_t)(val)); \
-		writel_relaxed((val), (dsi_hw)->base + (off)); \
-	} while (0)
-
-#define DSI_MMSS_MISC_R32(dsi_hw, off) \
-	readl_relaxed((dsi_hw)->mmss_misc_base + (off))
-#define DSI_MMSS_MISC_W32(dsi_hw, off, val) \
-	do {\
-		pr_debug("[DSI_%d][%s] - [0x%08x]\n", \
-			(dsi_hw)->index, #off, val); \
-		writel_relaxed((val), (dsi_hw)->mmss_misc_base + (off)); \
-	} while (0)
-
-#define DSI_MISC_R32(dsi_hw, off) \
-	readl_relaxed((dsi_hw)->phy_clamp_base + (off))
-#define DSI_MISC_W32(dsi_hw, off, val) \
-	do {\
-		pr_debug("[DSI_%d][%s] - [0x%08x]\n", \
-			(dsi_hw)->index, #off, val); \
-		writel_relaxed((val), (dsi_hw)->phy_clamp_base + (off)); \
-	} while (0)
-#define DSI_DISP_CC_R32(dsi_hw, off) \
-	readl_relaxed((dsi_hw)->disp_cc_base + (off))
-#define DSI_DISP_CC_W32(dsi_hw, off, val) \
-	do {\
-		pr_debug("[DSI_%d][%s] - [0x%08x]\n", \
-			(dsi_hw)->index, #off, val); \
-		writel_relaxed((val), (dsi_hw)->disp_cc_base + (off)); \
-	} while (0)
 
 #define DSI_R64(dsi_hw, off) readq_relaxed((dsi_hw)->base + (off))
 #define DSI_W64(dsi_hw, off, val) writeq_relaxed((val), (dsi_hw)->base + (off))
 
+#define DSI_GEN_W32_DEBUG(base, index, offset, val) \
+	do {\
+		pr_debug("[DSI_%d][%s] - [0x%08x]\n", \
+			(index), #offset, (uint32_t)(val)); \
+		DSI_GEN_W32(base, offset, val); \
+	} while (0)
+
+#define DSI_R32(dsi_hw, off) DSI_GEN_R32((dsi_hw)->base, off)
+#define DSI_W32(dsi_hw, off, val) DSI_GEN_W32_DEBUG((dsi_hw)->base,	\
+	(dsi_hw)->index, off, val)
+
 #define PLL_CALC_DATA(addr0, addr1, data0, data1)      \
 	(((data1) << 24) | ((((addr1)/4) & 0xFF) << 16) | \
 	 ((data0) << 8) | (((addr0)/4) & 0xFF))
 
 #define DSI_DYN_REF_REG_W(base, offset, addr0, addr1, data0, data1)   \
-	writel_relaxed(PLL_CALC_DATA(addr0, addr1, data0, data1), \
+	DSI_GEN_W32(base, offset, PLL_CALC_DATA(addr0, addr1, data0, data1))
-			(base) + (offset))
-
-#define DSI_GEN_R32(base, offset) readl_relaxed(base + (offset))
-#define DSI_GEN_W32(base, offset, val) writel_relaxed((val), base + (offset))
 #endif /* _DSI_HW_H_ */

msm/dsi/dsi_phy_hw.h

@@ -7,6 +7,7 @@
 #define _DSI_PHY_HW_H_
 
 #include "dsi_defs.h"
+#include "dsi_hw.h"
 
 #define DSI_MAX_SETTINGS 8
 #define DSI_PHY_TIMING_V3_SIZE 12
@@ -21,6 +22,10 @@
 #define DSI_PHY_WARN(p, fmt, ...)	DRM_WARN("[msm-dsi-warn]: DSI_%d: " fmt,\
 		p ? p->index : -1, ##__VA_ARGS__)
 
+#define DSI_MISC_R32(dsi_phy_hw, off) DSI_GEN_R32((dsi_phy_hw)->phy_clamp_base, off)
+#define DSI_MISC_W32(dsi_phy_hw, off, val) \
+	DSI_GEN_W32_DEBUG((dsi_phy_hw)->phy_clamp_base, (dsi_phy_hw)->index, off, val)
+
 /**
  * enum dsi_phy_version - DSI PHY version enumeration
  * @DSI_PHY_VERSION_UNKNOWN:    Unknown version.

msm/dsi/dsi_pll.h

@@ -15,6 +15,7 @@
 #include "clk-regmap-divider.h"
 #include "clk-regmap-mux.h"
 #include "dsi_defs.h"
+#include "dsi_hw.h"
 
 #define DSI_PLL_DBG(p, fmt, ...)	DRM_DEV_DEBUG(NULL, "[msm-dsi-debug]: DSI_PLL_%d: "\
 		fmt, p ? p->index : -1,	##__VA_ARGS__)
@@ -25,17 +26,16 @@
 #define DSI_PLL_WARN(p, fmt, ...)	DRM_WARN("[msm-dsi-warn]: DSI_PLL_%d: "\
 		fmt, p ? p->index : -1, ##__VA_ARGS__)
 
-#define DSI_PLL_REG_W(base, offset, data)	\
+#define DSI_PLL_REG_W(base, offset, data) \
-				writel_relaxed((data), (base) + (offset))
+	do {\
-#define DSI_PLL_REG_R(base, offset)	readl_relaxed((base) + (offset))
+		pr_debug("[DSI_PLL][%s] - [0x%08x]\n", #offset, (uint32_t)(data)); \
+		DSI_GEN_W32(base, offset, data); \
+	} while (0)
 
-#define PLL_CALC_DATA(addr0, addr1, data0, data1)      \
+#define DSI_PLL_REG_R(base, offset)	DSI_GEN_R32(base, offset)
-	(((data1) << 24) | ((((addr1) / 4) & 0xFF) << 16) | \
-	 ((data0) << 8) | (((addr0) / 4) & 0xFF))
 
 #define DSI_DYN_PLL_REG_W(base, offset, addr0, addr1, data0, data1)   \
-		writel_relaxed(PLL_CALC_DATA(addr0, addr1, data0, data1), \
+		DSI_DYN_REF_REG_W(base, offset, addr0, addr1, data0, data1)
-			(base) + (offset))
 
 #define upper_8_bit(x) ((((x) >> 2) & 0x100) >> 8)