fw-api: CL 13965803 - update fw common interface files

HTT stats: add counters for 320 MHz and puncturing patterns

Change-Id: Id06c60238f0ae9d2ad1c6b0bc847354776f9bb85
CRs-Fixed: 2262693

fw/htt_stats.h

@@ -1353,7 +1353,7 @@ typedef enum {
     HTT_STATS_PREAM_HT,
     HTT_STATS_PREAM_VHT,
     HTT_STATS_PREAM_HE,
-    HTT_STATS_PREAM_RSVD,
+    HTT_STATS_PREAM_EHT,
     HTT_STATS_PREAM_RSVD1,
 
     HTT_STATS_PREAM_COUNT,
@@ -3525,6 +3525,7 @@ typedef struct {
 
 #define HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS 12 /* 0-11 */
 #define HTT_TX_PDEV_STATS_NUM_EXTRA_MCS_COUNTERS 2 /* 12, 13 */
+#define HTT_TX_PDEV_STATS_NUM_EXTRA2_MCS_COUNTERS 2 /* 14, 15 */
 #define HTT_TX_PDEV_STATS_NUM_GI_COUNTERS 4
 #define HTT_TX_PDEV_STATS_NUM_DCM_COUNTERS 5
 #define HTT_TX_PDEV_STATS_NUM_BW_COUNTERS 4
@@ -3551,6 +3552,18 @@ typedef struct {
         ((_var) |= ((_val) << HTT_TX_PDEV_RATE_STATS_MAC_ID_S)); \
     } while (0)
 
+/*
+ * Introduce new TX counters to support 320MHz support and punctured modes
+ */
+typedef enum {
+    HTT_TX_PDEV_STATS_PUNCTURED_NONE = 0,
+    HTT_TX_PDEV_STATS_PUNCTURED_20 = 1,
+    HTT_TX_PDEV_STATS_PUNCTURED_40 = 2,
+    HTT_TX_PDEV_STATS_PUNCTURED_80 = 3,
+    HTT_TX_PDEV_STATS_PUNCTURED_120 = 4,
+    HTT_TX_PDEV_STATS_NUM_PUNCTURED_MODE_COUNTERS = 5
+} HTT_TX_PDEV_STATS_NUM_PUNCTURED_MODE_TYPE;
+
 typedef struct {
     htt_tlv_hdr_t tlv_hdr;
 
@@ -3652,6 +3665,11 @@ typedef struct {
     A_UINT32 ax_mu_mimo_tx_gi_ext[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_TX_PDEV_STATS_NUM_EXTRA_MCS_COUNTERS];
     /* 11AX VHT DL MU OFDMA extended TX guard interval stats for MCS 12/13 */
     A_UINT32 ofdma_tx_gi_ext[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_TX_PDEV_STATS_NUM_EXTRA_MCS_COUNTERS];
+    /* Stats for MCS 14/15 */
+    A_UINT32 tx_mcs_ext_2[HTT_TX_PDEV_STATS_NUM_EXTRA2_MCS_COUNTERS];
+    A_UINT32 tx_bw_320mhz;
+    A_UINT32 tx_gi_ext_2[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_TX_PDEV_STATS_NUM_EXTRA2_MCS_COUNTERS];
+    A_UINT32 tx_su_punctured_mode[HTT_TX_PDEV_STATS_NUM_PUNCTURED_MODE_COUNTERS];
 } htt_tx_pdev_rate_stats_tlv;
 
 /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_TX_RATE
@@ -3672,6 +3690,7 @@ typedef struct {
 #define HTT_RX_PDEV_STATS_NUM_LEGACY_OFDM_STATS 8
 #define HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS 12 /* 0-11 */
 #define HTT_RX_PDEV_STATS_NUM_EXTRA_MCS_COUNTERS 2 /* 12, 13 */
+#define HTT_RX_PDEV_STATS_NUM_EXTRA2_MCS_COUNTERS 2 /* 14, 15 */
 #define HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS_EXT 14 /* 0-13 */
 #define HTT_RX_PDEV_STATS_NUM_GI_COUNTERS 4
 #define HTT_RX_PDEV_STATS_NUM_DCM_COUNTERS 5
@@ -3717,6 +3736,16 @@ typedef struct {
         ((_var) |= ((_val) << HTT_RX_PDEV_RATE_STATS_MAC_ID_S)); \
     } while (0)
 
+/* Introduce new RX counters to support 320MHZ support and punctured modes */
+typedef enum {
+    HTT_RX_PDEV_STATS_PUNCTURED_NONE = 0,
+    HTT_RX_PDEV_STATS_PUNCTURED_20 = 1,
+    HTT_RX_PDEV_STATS_PUNCTURED_40 = 2,
+    HTT_RX_PDEV_STATS_PUNCTURED_80 = 3,
+    HTT_RX_PDEV_STATS_PUNCTURED_120 = 4,
+    HTT_RX_PDEV_STATS_NUM_PUNCTURED_MODE_COUNTERS = 5
+} HTT_RX_PDEV_STATS_NUM_PUNCTURED_MODE_TYPE;
+
 typedef struct {
     htt_tlv_hdr_t tlv_hdr;
 
@@ -3861,6 +3890,11 @@ typedef struct {
     A_UINT32 rx_11ax_su_txbf_mcs_ext[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS_EXT];
     A_UINT32 rx_11ax_mu_txbf_mcs_ext[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS_EXT];
     A_UINT32 rx_11ax_dl_ofdma_mcs_ext[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS_EXT];
+    /* MCS 14,15 */
+    A_UINT32 rx_mcs_ext_2[HTT_RX_PDEV_STATS_NUM_EXTRA2_MCS_COUNTERS];
+    A_UINT32 rx_bw_320mhz;
+    A_UINT32 rx_gi_ext_2[HTT_RX_PDEV_STATS_NUM_GI_COUNTERS][HTT_RX_PDEV_STATS_NUM_EXTRA2_MCS_COUNTERS];
+    A_UINT32 rx_su_punctured_mode[HTT_RX_PDEV_STATS_NUM_PUNCTURED_MODE_COUNTERS];
 } htt_rx_pdev_rate_ext_stats_tlv;
 
 /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_RX_RATE_EXT