disp: msm: dsi: create generic interface for read poll timeout

Creating a generic api that can be used with the driver
for read poll timeouts. This allows for easy overriding
of the function, if necessary.

Change-Id: I7bc5176ebabe782089b1a4d6e94c17ad3eb9ada4
Signed-off-by: Nilaan Gunabalachandran <[email protected]>
Signed-off-by: Michael Ru <[email protected]>

msm/dsi/dsi_ctrl_hw_2_2.c

@@ -56,7 +56,7 @@ int dsi_ctrl_hw_22_wait_for_lane_idle(struct dsi_ctrl_hw *ctrl,
 
 	DSI_CTRL_HW_DBG(ctrl, "%s: polling for fifo empty, mask=0x%08x\n",
 		__func__, fifo_empty_mask);
-	rc = readl_poll_timeout(ctrl->base + DSI_FIFO_STATUS, val,
+	rc = DSI_READ_POLL_TIMEOUT(ctrl, DSI_FIFO_STATUS, val,
 			(val & fifo_empty_mask), sleep_us, timeout_us);
 	if (rc) {
 		DSI_CTRL_HW_ERR(ctrl,

msm/dsi/dsi_ctrl_hw_cmn.c

@@ -1072,7 +1072,7 @@ u32 dsi_ctrl_hw_cmn_poll_dma_status(struct dsi_ctrl_hw *ctrl)
 	u32 const delay_us = 10;
 	u32 const timeout_us = 5000;
 
-	rc = readl_poll_timeout_atomic(ctrl->base + DSI_INT_CTRL, status,
+	rc = DSI_READ_POLL_TIMEOUT_ATOMIC(ctrl, DSI_INT_CTRL, status,
 				      ((status & DSI_CMD_MODE_DMA_DONE) > 0), delay_us, timeout_us);
 	if (rc) {
 		DSI_CTRL_HW_DBG(ctrl, "CMD_MODE_DMA_DONE failed\n");
@@ -1776,7 +1776,7 @@ int dsi_ctrl_hw_cmn_wait_for_cmd_mode_mdp_idle(struct dsi_ctrl_hw *ctrl)
 	u32 const sleep_us = 2 * 1000;
 	u32 const timeout_us = 200 * 1000;
 
-	rc = readl_poll_timeout(ctrl->base + DSI_STATUS, val,
+	rc = DSI_READ_POLL_TIMEOUT(ctrl, DSI_STATUS, val,
 			!(val & cmd_mode_mdp_busy_mask), sleep_us, timeout_us);
 	if (rc)
 		DSI_CTRL_HW_ERR(ctrl, "timed out waiting for idle\n");
@@ -1817,7 +1817,7 @@ int dsi_ctrl_hw_cmn_wait4dynamic_refresh_done(struct dsi_ctrl_hw *ctrl)
 	u32 const timeout_us = 84000; /* approximately 5 vsyncs */
 	u32 reg = 0, dyn_refresh_done = BIT(28);
 
-	rc = readl_poll_timeout(ctrl->base + DSI_INT_CTRL, reg,
+	rc = DSI_READ_POLL_TIMEOUT(ctrl, DSI_INT_CTRL, reg,
 				(reg & dyn_refresh_done), sleep_us, timeout_us);
 	if (rc) {
 		DSI_CTRL_HW_ERR(ctrl, "wait4dynamic refresh timedout %d\n", rc);
@@ -1839,7 +1839,7 @@ bool dsi_ctrl_hw_cmn_vid_engine_busy(struct dsi_ctrl_hw *ctrl)
 	u32 const sleep_us = 1000;
 	u32 const timeout_us = 50000;
 
-	rc = readl_poll_timeout(ctrl->base + DSI_STATUS, reg,
+	rc = DSI_READ_POLL_TIMEOUT(ctrl, DSI_STATUS, reg,
 			!(reg & video_engine_busy), sleep_us, timeout_us);
 	if (rc)
 		return true;

msm/dsi/dsi_hw.h

@@ -13,6 +13,12 @@
 #define DSI_R64(dsi_hw, off) readq_relaxed((dsi_hw)->base + (off))
 #define DSI_W64(dsi_hw, off, val) writeq_relaxed((val), (dsi_hw)->base + (off))
 
+#define DSI_READ_POLL_TIMEOUT(dsi_hw, off, val, cond, delay_us, timeout_us) \
+	readl_poll_timeout((dsi_hw)->base + (off), (val), (cond), (delay_us), (timeout_us))
+
+#define DSI_READ_POLL_TIMEOUT_ATOMIC_GEN(base, index, off, val, cond, delay_us, timeout_us) \
+	readl_poll_timeout_atomic((base) + (off), (val), (cond), (delay_us), (timeout_us))
+
 #define DSI_GEN_W32_DEBUG(base, index, offset, val) \
 	do {\
 		pr_debug("[DSI_%d][%s] - [0x%08x]\n", \
@@ -24,6 +30,9 @@
 #define DSI_W32(dsi_hw, off, val) DSI_GEN_W32_DEBUG((dsi_hw)->base,	\
 	(dsi_hw)->index, off, val)
 
+#define DSI_READ_POLL_TIMEOUT_ATOMIC(dsi_hw, off, val, cond, delay_us, timeout_us) \
+	DSI_READ_POLL_TIMEOUT_ATOMIC_GEN((dsi_hw)->base, (dsi_hw)->index, off, val, cond, delay_us, timeout_us)
+
 #define PLL_CALC_DATA(addr0, addr1, data0, data1)      \
 	(((data1) << 24) | ((((addr1)/4) & 0xFF) << 16) | \
 	 ((data0) << 8) | (((addr0)/4) & 0xFF))

msm/dsi/dsi_phy_hw_v3_0.c

@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0-only
 /*
- * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  */
 
 #include <linux/math64.h>
@@ -245,8 +245,8 @@ void dsi_phy_hw_v3_0_enable(struct dsi_phy_hw *phy,
 		DSI_PHY_WARN(phy, "PLL turned on before configuring PHY\n");
 
 	/* wait for REFGEN READY */
-	rc = readl_poll_timeout_atomic(phy->base + DSIPHY_CMN_PHY_STATUS,
-		status, (status & BIT(0)), delay_us, timeout_us);
+	rc = DSI_READ_POLL_TIMEOUT_ATOMIC(phy, DSIPHY_CMN_PHY_STATUS,
+			status, (status & BIT(0)), delay_us, timeout_us);
 	if (rc) {
 		DSI_PHY_ERR(phy, "Ref gen not ready. Aborting\n");
 		return;
@@ -364,7 +364,7 @@ int dsi_phy_hw_v3_0_wait_for_lane_idle(
 
 	DSI_PHY_DBG(phy, "polling for lanes to be in stop state, mask=0x%08x\n",
 		stop_state_mask);
-	rc = readl_poll_timeout(phy->base + DSIPHY_CMN_LANE_STATUS1, val,
+	rc = DSI_READ_POLL_TIMEOUT(phy, DSIPHY_CMN_LANE_STATUS1, val,
 				((val & stop_state_mask) == stop_state_mask),
 				sleep_us, timeout_us);
 	if (rc) {

msm/dsi/dsi_phy_hw_v4_0.c

@@ -497,7 +497,7 @@ void dsi_phy_hw_v4_0_enable(struct dsi_phy_hw *phy,
 	}
 
 	/* wait for REFGEN READY */
-	rc = readl_poll_timeout_atomic(phy->base + DSIPHY_CMN_PHY_STATUS,
+	rc = DSI_READ_POLL_TIMEOUT_ATOMIC(phy, DSIPHY_CMN_PHY_STATUS,
 		status, (status & BIT(0)), delay_us, timeout_us);
 	if (rc) {
 		DSI_PHY_ERR(phy, "Ref gen not ready. Aborting\n");
@@ -583,7 +583,7 @@ int dsi_phy_hw_v4_0_wait_for_lane_idle(
 
 	DSI_PHY_DBG(phy, "polling for lanes to be in stop state, mask=0x%08x\n",
 		stop_state_mask);
-	rc = readl_poll_timeout(phy->base + DSIPHY_CMN_LANE_STATUS1, val,
+	rc = DSI_READ_POLL_TIMEOUT(phy, DSIPHY_CMN_LANE_STATUS1, val,
 				((val & stop_state_mask) == stop_state_mask),
 				sleep_us, timeout_us);
 	if (rc) {

msm/dsi/dsi_pll_5nm.c

@@ -598,7 +598,7 @@ static int dsi_pll_5nm_lock_status(struct dsi_pll_resource *pll)
 	u32 const delay_us = 100;
 	u32 const timeout_us = 5000;
 
-	rc = readl_poll_timeout_atomic(pll->pll_base + PLL_COMMON_STATUS_ONE,
+	rc = DSI_READ_POLL_TIMEOUT_ATOMIC_GEN(pll->pll_base, pll->index, PLL_COMMON_STATUS_ONE,
 				       status,
 				       ((status & BIT(0)) > 0),
 				       delay_us,