qcacmn: Add CDP APIs for FISA HTT msgs

Add CDP APIs for sending HTT messages used for FISA
related configurations.

Change-Id: Ie4076794b8b4b53611ecb71fbb11d19bd0c36442
CRs-Fixed: 3512038

dp/inc/cdp_txrx_cmn_struct.h

@@ -3022,6 +3022,30 @@ enum cdp_fisa_stats_id {
 };
 
 #ifdef WLAN_SUPPORT_RX_FISA
+/**
+ * enum cdp_fisa_config_id - FISA config ID
+ * @CDP_FISA_HTT_RX_FISA_CFG: FISA config HTT message
+ * @CDP_FISA_HTT_RX_FSE_OP_CFG: FSE operation HTT message
+ * @CDP_FISA_HTT_RX_FSE_SETUP_CFG: FSE setup HTT message
+ */
+enum cdp_fisa_config_id {
+	CDP_FISA_HTT_RX_FISA_CFG,
+	CDP_FISA_HTT_RX_FSE_OP_CFG,
+	CDP_FISA_HTT_RX_FSE_SETUP_CFG,
+};
+
+/**
+ * union cdp_fisa_config - FISA HTT message data
+ * @fisa_config: FISA config HTT msg data
+ * @fse_op_cmd: FSE operation HTT msg data
+ * @fse_setup_info: FSE setup HTT msg data
+ */
+union cdp_fisa_config {
+	struct dp_htt_rx_fisa_cfg *fisa_config;
+	struct dp_htt_rx_flow_fst_operation *fse_op_cmd;
+	struct dp_htt_rx_flow_fst_setup *fse_setup_info;
+};
+
 struct cdp_flow_stats {
 	uint32_t aggr_count;
 	uint32_t curr_aggr_count;

dp/inc/cdp_txrx_ctrl.h

@@ -1429,4 +1429,24 @@ cdp_umac_reset_is_inprogress(ol_txrx_soc_handle soc)
 
 	return soc->ops->ctrl_ops->umac_reset_is_inprogress(soc);
 }
+
+#ifdef WLAN_SUPPORT_RX_FISA
+static inline
+QDF_STATUS cdp_txrx_fisa_config(struct cdp_soc_t *soc, uint8_t pdev_id,
+				enum cdp_fisa_config_id config_id,
+				union cdp_fisa_config *cfg)
+{
+	if (!soc || !soc->ops) {
+		dp_cdp_debug("Invalid Instance:");
+		QDF_BUG(0);
+		return QDF_STATUS_E_FAILURE;
+	}
+
+	if (!soc->ops->ctrl_ops || !soc->ops->ctrl_ops->txrx_fisa_config)
+		return QDF_STATUS_E_FAILURE;
+
+	return soc->ops->ctrl_ops->txrx_fisa_config(soc, pdev_id, config_id,
+						    cfg);
+}
+#endif
 #endif /* _CDP_TXRX_CTRL_H_ */

dp/inc/cdp_txrx_ops.h

@@ -955,6 +955,11 @@ struct cdp_ctrl_ops {
 						     uint32_t *mask_cont);
 #endif
 	bool (*umac_reset_is_inprogress)(struct cdp_soc_t *psoc);
+#ifdef WLAN_SUPPORT_RX_FISA
+	QDF_STATUS (*txrx_fisa_config)(struct cdp_soc_t *soc, uint8_t pdev_id,
+				       enum cdp_fisa_config_id config_id,
+				       union cdp_fisa_config *cfg);
+#endif
 };
 
 struct cdp_me_ops {

dp/wifi3.0/dp_internal.h

@@ -4125,6 +4125,17 @@ void dp_update_num_mac_rings_for_dbs(struct dp_soc *soc,
  */
 void dp_rx_fst_update_cmem_params(struct dp_soc *soc, uint16_t num_entries,
 				  uint32_t cmem_ba_lo, uint32_t cmem_ba_hi);
+
+/**
+ * dp_fisa_config() - FISA config handler
+ * @cdp_soc: CDP SoC handle
+ * @pdev_id: PDEV ID
+ * @config_id: FISA config ID
+ * @cfg: FISA config msg data
+ */
+QDF_STATUS dp_fisa_config(ol_txrx_soc_handle cdp_soc, uint8_t pdev_id,
+			  enum cdp_fisa_config_id config_id,
+			  union cdp_fisa_config *cfg);
 #else
 static inline void
 dp_rx_fst_update_cmem_params(struct dp_soc *soc, uint16_t num_entries,

dp/wifi3.0/dp_main.c

@@ -11239,6 +11239,9 @@ static struct cdp_ctrl_ops dp_ops_ctrl = {
 #endif
 	.txrx_peer_flush_frags = dp_peer_flush_frags,
 	.umac_reset_is_inprogress = dp_umac_reset_is_inprogress,
+#ifdef WLAN_SUPPORT_RX_FISA
+	.txrx_fisa_config = dp_fisa_config,
+#endif
 };
 
 static struct cdp_me_ops dp_ops_me = {

dp/wifi3.0/dp_rx.c

@@ -2826,6 +2826,37 @@ void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
 #endif /* QCA_HOST_MODE_WIFI_DISABLED */
 
 #ifdef WLAN_SUPPORT_RX_FISA
+QDF_STATUS dp_fisa_config(ol_txrx_soc_handle cdp_soc, uint8_t pdev_id,
+			  enum cdp_fisa_config_id config_id,
+			  union cdp_fisa_config *cfg)
+{
+	struct dp_soc *soc = (struct dp_soc *)cdp_soc;
+	struct dp_pdev *pdev;
+	QDF_STATUS status;
+
+	pdev = dp_get_pdev_from_soc_pdev_id_wifi3(soc, pdev_id);
+	if (!pdev) {
+		dp_err("pdev is NULL for pdev_id %u", pdev_id);
+		return QDF_STATUS_E_INVAL;
+	}
+
+	switch (config_id) {
+	case CDP_FISA_HTT_RX_FISA_CFG:
+		status = dp_htt_rx_fisa_config(pdev, cfg->fisa_config);
+		break;
+	case CDP_FISA_HTT_RX_FSE_OP_CFG:
+		status = dp_htt_rx_flow_fse_operation(pdev, cfg->fse_op_cmd);
+		break;
+	case CDP_FISA_HTT_RX_FSE_SETUP_CFG:
+		status = dp_htt_rx_flow_fst_setup(pdev, cfg->fse_setup_info);
+		break;
+	default:
+		status = QDF_STATUS_E_INVAL;
+	}
+
+	return status;
+}
+
 void dp_rx_skip_tlvs(struct dp_soc *soc, qdf_nbuf_t nbuf, uint32_t l3_padding)
 {
 	QDF_NBUF_CB_RX_PACKET_L3_HDR_PAD(nbuf) = l3_padding;